74AHCT2G08GM [NXP]
Dual 2-input AND gate; 双路2输入与门
| 型号： | 74AHCT2G08GM |
| 厂家： | 
NXP |
| 描述： | Dual 2-input AND gate |
| 文件： | 总17页 (文件大小：88K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74AHC2G08; 74AHCT2G08
Dual 2-input AND gate
Rev. 02 — 18 October 2004
Product data sheet
1. General description
The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device.
The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates.
2. Features
■ Symmetrical output impedance
■ High noise immunity
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V
◆ CDM EIA/JESD22-C101 exceeds 1000 V.
■ Low power dissipation
■ Balanced propagation delays
■ Multiple package options
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C.
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
Symbol
Parameter
Conditions
Min Typ Max Unit
Type 74AHC2G08
tPHL, tPLH
propagation delay
CL = 15 pF; VCC = 5 V
-
3.2
5.9
ns
A and B to Y
CI
input capacitance
-
-
1.5
17
10
-
pF
pF
[1] [2]
CPD
power dissipation
capacitance
CL = 50 pF; fi = 1 MHz
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
Table 1:
Quick reference data …continued
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
Symbol
Parameter
Conditions
Min Typ Max Unit
Type 74AHCT2G08
tPHL, tPLH
propagation delay
CL = 15 pF; VCC = 5 V
-
3.6
6.2
ns
A and B to Y
CI
input capacitance
-
-
1.5
19
10
-
pF
pF
[1] [2]
CPD
power dissipation
capacitance
CL = 50 pF; fi = 1 MHz
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[2] The condition is Vi = GND to VCC
.
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC2G08DP
74AHCT2G08DP
74AHC2G08DC
74AHCT2G08DC
74AHC2G08GM
74AHCT2G08GM
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
TSSOP8
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
TSSOP8
VSSOP8
VSSOP8
XSON8
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
SOT765-1
SOT765-1
SOT833-1
SOT833-1
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
plastic extremely thin small outline package;
no leads; 8 terminals; body 0.95 × 1.95 × 0.5 mm
XSON8
plastic extremely thin small outline package;
no leads; 8 terminals; body 0.95 × 1.95 × 0.5 mm
5. Marking
Table 3:
Marking
Type number
Marking code
74AHC2G08DP
74AHCT2G08DP
74AHC2G08DC
74AHCT2G08DC
74AHC2G08GM
74AHCT2G08GM
A08
C08
A08
C08
A08
C08
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
2 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
6. Functional diagram
1
&
7
3
2
1
2
1A
1B
1Y
2Y
7
3
5
6
5
6
2A
2B
&
mna724
mna725
Fig 1. Logic symbol.
Fig 2. IEC logic symbol.
A
Y
B
mna221
Fig 3. Logic diagram (one gate).
7. Pinning information
7.1 Pinning
08
1A
1B
1
2
3
4
8
7
6
5
V
CC
1
2
3
4
8
7
6
5
1A
V
CC
1Y
2B
2A
1B
2Y
1Y
2B
2A
08
2Y
GND
001aab564
GND
001aab565
Transparent top view
Fig 4. Pin configuration TSSOP8 and
VSSOP8.
Fig 5. Pin configuration XSON8.
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
3 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
7.2 Pin description
Table 4:
Symbol
1A
Pin description
Pin
1
Description
data input
1B
2
data input
2Y
3
data output
ground (0 V)
data input
GND
2A
4
5
2B
6
data input
1Y
7
data output
supply voltage
VCC
8
8. Functional description
8.1 Function table
Table 5:
Function table[1]
Input
nA
L
Output
nB
L
nY
L
L
H
L
L
H
L
H
H
H
[1] H = HIGH voltage level;
L = LOW voltage level.
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−0.5
-
Max
+7.0
+7.0
−20
Unit
V
supply voltage
input voltage
V
IIK
input diode current VI < −0.5 V
mA
mA
[1]
IOK
output diode
current
VO < −0.5 V or
VO > VCC + 0.5 V
-
±20
IO
output source or
sink current
VO > −0.5 V and
VO < VCC + 0.5 V
-
±25
mA
ICC, IGND
Tstg
VCC or GND current
-
±75
mA
storage
−65
+150
°C
temperature
Ptot
power dissipation
Tamb = −40 °C to +125 °C
-
250
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
4 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
10. Recommended operating conditions
Table 7:
Symbol
Recommended operating operations
Parameter
Conditions
Min
Typ
Max
Unit
Type 74AHC2G08
VCC
VI
supply voltage
2.0
0
5.0
5.5
5.5
VCC
V
V
V
input voltage
-
VO
output voltage
0
-
Tamb
ambient
temperature
see Section 11 and
Section 12
−40
+25
+125 °C
tr, tf
input rise and fall
times
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
-
-
-
-
100
20
ns/V
ns/V
Type 74AHCT2G08
VCC
VI
supply voltage
4.5
0
5.0
5.5
5.5
VCC
V
V
V
input voltage
-
VO
output voltage
0
-
Tamb
ambient
temperature
see Section 11 and
Section 12
−40
+25
+125 °C
tr, tf
input rise and fall
times
VCC = 4.5 V to 5.5 V
-
-
20 ns/V
11. Static characteristics
Table 8:
Static characteristics type 74AHC2G08
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 °C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input
voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 3.0 V
2.1
-
VCC = 5.5 V
3.85
-
VIL
LOW-level input
voltage
VCC = 2.0 V
-
-
-
0.5
0.9
1.65
VCC = 3.0 V
VCC = 5.5 V
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −50 µA; VCC = 2.0 V
IO = −50 µA; VCC = 3.0 V
IO = −50 µA; VCC = 4.5 V
IO = −4.0 mA; VCC = 3.0 V
IO = −8.0 mA; VCC = 4.5 V
1.9
2.0
3.0
4.5
-
-
-
-
-
-
V
V
V
V
V
2.9
4.4
2.58
3.94
-
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
5 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
Table 8:
Static characteristics type 74AHC2G08 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output
voltage
VI = VIH or VIL
IO = 50 µA; VCC = 2.0 V
IO = 50 µA; VCC = 3.0 V
IO = 50 µA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
0
0
0
-
0.1
V
0.1
V
0.1
V
0.36
0.36
0.1
V
-
V
ILI
input leakage current VI = VCC or GND; VCC = 5.5 V
-
µA
µA
ICC
quiescent supply
current
VI = VCC or GND; IO = 0 A;
CC = 5.5 V
-
1.0
V
CI
input capacitance
-
1.5
10
pF
Tamb = −40 °C to +85 °C
VIH HIGH-level input
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
voltage
VCC = 3.0 V
2.1
-
VCC = 5.5 V
3.85
-
VIL
LOW-level input
voltage
VCC = 2.0 V
-
-
-
0.5
0.9
1.65
VCC = 3.0 V
VCC = 5.5 V
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −50 µA; VCC = 2.0 V
IO = −50 µA; VCC = 3.0 V
IO = −50 µA; VCC = 4.5 V
IO = −4.0 mA; VCC = 3.0 V
IO = −8.0 mA; VCC = 4.5 V
VI = VIH or VIL
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level output
voltage
IO = 50 µA; VCC = 2.0 V
IO = 50 µA; VCC = 3.0 V
IO = 50 µA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
10
V
V
V
V
V
ILI
input leakage current VI = VCC or GND; VCC = 5.5 V
µA
µA
ICC
quiescent supply
current
VI = VCC or GND; IO = 0 A;
CC = 5.5 V
V
CI
input capacitance
-
-
10
pF
Tamb = −40 °C to +125 °C
VIH
HIGH-level input
voltage
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
2.1
-
3.85
-
VIL
LOW-level input
voltage
-
-
-
0.5
0.9
1.65
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
6 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
Table 8:
Static characteristics type 74AHC2G08 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −50 µA; VCC = 2.0 V
IO = −50 µA; VCC = 3.0 V
IO = −50 µA; VCC = 4.5 V
IO = −4.0 mA; VCC = 3.0 V
IO = −8.0 mA; VCC = 4.5 V
VI = VIH or VIL
1.9
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
2.9
4.4
2.40
3.70
VOL
LOW-level output
voltage
IO = 50 µA; VCC = 2.0 V
IO = 50 µA; VCC = 3.0 V
IO = 50 µA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
V
V
V
V
V
ILI
input leakage current VI = VCC or GND; VCC = 5.5 V
µA
µA
ICC
quiescent supply
current
VI = VCC or GND; IO = 0 A;
CC = 5.5 V
V
CI
input capacitance
-
-
10
pF
Table 9:
Static characteristics type 74AHCT2G08
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 °C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input
voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
VIL
LOW-level input
voltage
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −50 µA; VCC = 4.5 V
IO = −8.0 mA; VCC = 4.5 V
VI = VIH or VIL
4.4
4.5
-
-
-
V
V
3.94
VOL
LOW-level output
voltage
IO = 50 µA; VCC = 4.5 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
0
-
0.1
0.36
0.1
1.0
V
V
ILI
input leakage current VI = VIH or VIL; VCC = 5.5 V
-
µA
µA
ICC
quiescent supply
current
VI = VCC or GND; IO = 0 A;
CC = 5.5 V
-
V
∆ICC
additional quiescent
supply current per
input pin
VI = 3.4 V; other inputs at
-
-
-
1.35
10
mA
pF
VCC or GND; IO = 0 A;
CC = 5.5 V
V
CI
input capacitance
1.5
Tamb = −40 °C to +85 °C
VIH
HIGH-level input
voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
VIL
LOW-level input
voltage
0.8
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
7 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
Table 9:
Static characteristics type 74AHCT2G08 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −50 µA; VCC = 4.5 V
IO = −8.0 mA; VCC = 4.5 V
VI = VIH or VIL
4.4
3.8
-
-
-
-
V
V
VOL
LOW-level output
voltage
IO = 50 µA; VCC = 4.5 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
-
0.1
0.44
1.0
10
V
V
ILI
input leakage current VI = VIH or VIL; VCC = 5.5 V
µA
µA
ICC
quiescent supply
current
VI = VCC or GND; IO = 0 A;
CC = 5.5 V
V
∆ICC
additional quiescent
supply current per
input pin
VI = 3.4 V; other inputs at
-
-
-
-
1.5
10
mA
pF
VCC or GND; IO = 0 A;
CC = 5.5 V
V
CI
input capacitance
Tamb = −40 °C to +125 °C
VIH
HIGH-level input
voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
VIL
LOW-level input
voltage
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −50 µA; VCC = 4.5 V
IO = −8.0 mA; VCC = 4.5 V
VI = VIH or VIL
4.4
-
-
-
-
V
V
3.70
VOL
LOW-level output
voltage
IO = 50 µA; VCC = 4.5 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
-
-
-
-
0.1
0.55
2.0
40
V
V
ILI
input leakage current VI = VIH or VIL; VCC = 5.5 V
µA
µA
ICC
quiescent supply
current
VI = VCC or GND; IO = 0 A;
CC = 5.5 V
V
∆ICC
additional quiescent
supply current per
input pin
VI = 3.4 V; other inputs at
-
-
-
-
1.5
10
mA
pF
VCC or GND; IO = 0 A;
CC = 5.5 V
V
CI
input capacitance
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
8 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
12. Dynamic characteristics
Table 10: Dynamic characteristics type 74AHC2G08
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 7.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
tPHL, tPLH propagation delay see Figure 6
nA and nB to nY
[1]
[2]
VCC = 3.0 V to 3.6 V; CL = 15 pF
-
-
-
-
-
4.6
3.2
6.5
4.6
17
8.8
5.9
12.3
7.9
-
ns
ns
ns
ns
pF
VCC = 4.5 V to 5.5 V; CL = 15 pF
VCC = 3.0 V to 3.6 V; CL = 50 pF
VCC = 4.5 V to 5.5 V; CL = 50 pF
[1]
[2]
[3] [4]
CPD
power dissipation CL = 50 pF; fi = 1 MHz
capacitance
Tamb = −40 °C to +85 °C
tPHL, tPLH propagation delay see Figure 6
nA and nB to nY
VCC = 3.0 V to 3.6 V; CL = 15 pF
1.0
1.0
1.0
1.0
-
-
-
-
10.5
7.0
ns
ns
ns
ns
VCC = 4.5 V to 5.5 V; CL = 15 pF
VCC = 3.0 V to 3.6 V; CL = 50 pF
VCC = 4.5 V to 5.5 V; CL = 50 pF
14.0
9.0
Tamb = −40 °C to +125 °C
tPHL, tPLH propagation delay see Figure 6
nA and nB to nY
VCC = 3.0 V to 3.6 V; CL = 15 pF
1.0
1.0
1.0
1.0
-
-
-
-
12.0
8.0
ns
ns
ns
ns
VCC = 4.5 V to 5.5 V; CL = 15 pF
VCC = 3.0 V to 3.6 V; CL = 50 pF
VCC = 4.5 V to 5.5 V; CL = 50 pF
16.0
10.5
[1] Typical values are measured at VCC = 3.3 V.
[2] Typical values are measured at VCC = 5.0 V.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[4] The condition is VI = GND to VCC
.
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
9 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
Table 11: Dynamic characteristics type 74AHCT2G08
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 7.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
tPHL, tPLH propagation delay see Figure 6
nA and nB to nY
[1]
[1]
VCC = 4.5 V to 5.5 V; CL = 15 pF
-
-
-
3.6
5.1
19
6.2
7.9
-
ns
ns
pF
VCC = 4.5 V to 5.5 V; CL = 50 pF
power dissipation CL = 50 pF; fi = 1 MHz
capacitance
[2] [3]
CPD
Tamb = −40 °C to +85 °C
tPHL, tPLH propagation delay see Figure 6
nA and nB to nY
VCC = 4.5 V to 5.5 V; CL = 15 pF
1.0
1.0
-
-
7.1
9.0
ns
ns
VCC = 4.5 V to 5.5 V; CL = 50 pF
Tamb = −40 °C to +125 °C
tPHL, tPLH propagation delay see Figure 6
nA and nB to nY
VCC = 4.5 V to 5.5 V; CL = 15 pF
1.0
1.0
-
-
8.0
ns
ns
VCC = 4.5 V to 5.5 V; CL = 50 pF
10.5
[1] Typical values are measured at VCC = 5.0 V.
[2] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
[3] The condition is VI = GND to VCC
.
13. Waveforms
V
I
V
nA, nB input
GND
M
t
t
PLH
PHL
V
OH
nY output
V
M
V
OL
mna224
74AHC2G08: VM = 50 % VCC; VI = GND to VCC
74AHCT2G08: VM = 1.5 V; VI = GND to 3.0 V.
.
Fig 6. The input (nA and nB) to output (nY) propagation delays.
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
10 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
V
CC
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
L
R
T
mna101
Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance (See Section 12 for the value).
RT = Termination resistance should be equal to the output impedance Zo of the pulse
generator.
Fig 7. Load circuitry for switching times.
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
11 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
14. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
4.1
3.9
0.47
0.33
0.70
0.35
8°
0°
mm
1.1
0.65
0.25
0.5
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-01-16
SOT505-2
- - -
Fig 8. Package outline SOT505-2 (TSSOP8).
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
12 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
Q
A
2
A
A
1
(A )
3
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
A
A
A
b
c
D
E
e
H
L
L
p
Q
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.15
0.00
0.85
0.60
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
3.2
3.0
0.40
0.15
0.21
0.19
0.4
0.1
8°
0°
mm
1
0.5
0.12
0.4
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-06-07
SOT765-1
MO-187
Fig 9. Package outline SOT765-1 (VSSOP8).
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
13 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 x 1.95 x 0.5 mm
SOT833-1
b
1
2
3
4
4×
(2)
L
L
1
e
8
7
6
5
e
1
e
1
e
1
8×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
2.0
1.9
1.0
0.9
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
- - -
04-07-15
04-07-22
SOT833-1
- - -
MO-252
Fig 10. Package outline SOT833_1 (XSON8).
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
14 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
15. Revision history
Table 12: Revision history
Document ID
Release date Data sheet status Change notice Doc. number
Supersedes
74AHC_AHCT2G08_2 20041018
Product data sheet
-
9397 750 13735 74AHC_AHCT2G08_1
Modifications:
Adding features, ordering information, pinning, and package outline
74AHC_AHCT2G08_1 20040206
Product data sheet
-
9397 750 12533
-
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
15 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
16. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
18. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
19. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 13735
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 18 October 2004
16 of 17
74AHC2G08; 74AHCT2G08
Philips Semiconductors
Dual 2-input AND gate
20. Contents
1
2
3
4
5
6
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
7
7.1
7.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
8
8.1
9
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Contact information . . . . . . . . . . . . . . . . . . . . 16
10
11
12
13
14
15
16
17
18
19
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 18 October 2004
Document number: 9397 750 13735
Published in The Netherlands
相关型号：
74AHCT2G125DC-G
Bus buffer/line driver; 3-state - Description: Dual Buffer/Line Driver with Active LOW Output Enable; TTL Enabled (3-State) ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 8 mA ; Power dissipation considerations: Low Power ; Propagation delay: 3.4 ns; Voltage: 4.5-5.5 V
NXP
74AHCT2G125DC-Q100
AHCT/VHCT/VT SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8
NXP
74AHCT2G125DP-G
Bus buffer/line driver; 3-state - Description: Dual Buffer/Line Driver with Active LOW Output Enable; TTL Enabled (3-State) ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 8 mA ; Power dissipation considerations: Low Power ; Propagation delay: 3.4 ns; Voltage: 4.5-5.5 V
NXP
©2020 ICPDF网 联系我们和版权申明