74AHCT2G125_技术文档

INTEGRATED CIRCUITS

DATA SHEET

74AHC2G125; 74AHCT2G125

Bus buffer/line driver; 3-state

Product speciﬁcation

2004 Jan 13

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

FEATURES

DESCRIPTION

• Symmetrical output impedance

• High noise immunity

The 74AHC2G/AHCT2G125 is a high-speed Si-gate

CMOS device.

The 74AHC2G/AHCT2G125 provides a dual non-inverting

buffer/line driver with 3-state output. The 3-state output is

controlled by the output enable input (nOE). A HIGH at

pin nOE causes the output to assume a high-impedance

OFF-state.

• ESD protection:

– HBM EIA/JESD22-A114-A exceeds 2000 V

– MM EIA/JESD22-A115-A exceeds 200 V

– CDM EIA/JESD22-C101 exceeds 1000 V.

• Low power dissipation

• Balanced propagation delays

• SOT505-2 and SOT765-1 package

• Specified from−40 to +85 °C and −40 to +125 °C.

QUICK REFERENCE DATA

GND = 0 V; T_amb= 25 °C; t_r= t_f≤ 3.0 ns.

TYPICAL

SYMBOL

PARAMETER

CONDITIONS

C_L= 15 pF; V_CC= 5 V

UNIT

ns

AHC2G AHCT2G

t_PHL/t_PLH

C_I

propagation delay nA to nY

input capacitance

3.4

1.5

11

1.5

9

pF

C_PD

power dissipation capacitance C_L= 50 pF; f = 1 MHz; notes 1 and 2

Notes

1. C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i× N + ∑(C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

N = total load switching outputs;

∑(C_L× V_CC²× f_o) = sum of outputs.

2. The condition is V_I= GND to V_CC

.

2004 Jan 13

2

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

FUNCTION TABLE

See note 1.

INPUT

OUTPUT

nY

nOE

nA

L

H

X

L

H

Z

H

Note

1. H = HIGH voltage level;

L = LOW voltage level;

X = don’t care;

Z = high-impedance OFF-state.

ORDERING INFORMATION

PACKAGE

PACKAGE MATERIAL

TYPE NUMBER

TEMPERATURE

PINS

CODE

MARKING

RANGE

74AHC2G125DP

74AHCT2G125DP

74AHC2G125DC

74AHCT2G125DC

−40 to +125 °C

8

TSSOP8

VSSOP8

plastic

SOT505-2

SOT765-1

A25

C25

A25

C25

PINNING

1

SYMBOL

DESCRIPTION

1OE

output enable input (active LOW)

data input

2

1A

3

2Y

data output

4

GND

2A

ground (0 V)

5

data input

6

1Y

data output

7

2OE

V_CC

output enable input (active LOW)

supply voltage

8

2004 Jan 13

3

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

handbook, halfpage

1A

1Y

6

3

2

1

5

7

handbook, halfpage

1OE

1A

1

2

3

4

8

7

6

5

V

CC

1OE

2A

2OE

1Y

125

2Y

2A

GND

2OE

MCE184

MCE185

Fig.1 Pin configuration.

Fig.2 Logic symbol.

2

handbook, halfpage

6

1

handbook, halfpage

1OE

nY

nA

5

3

nOE

7

MCE187

2OE

MCE186

Fig.3 IEC logic symbol.

Fig.4 Logic diagram.

2004 Jan 13

4

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

RECOMMENDED OPERATING CONDITIONS

74AHC2G125

74AHCT2G125

SYMBOL

PARAMETER

supply voltage

CONDITIONS

UNIT

MIN. TYP. MAX. MIN. TYP. MAX.

V_CC

V_I

2.0

0

5.0

−

5.5

V_CC

4.5

0

5.0

−

5.5

V_CC

V

input voltage

V_O

output voltage

0

−

0

−

T_amb

operating ambient

temperature

see DC and AC

characteristics per device

−40

+25

+125 −40

+25

+125 °C

t_r, t_f

input rise and fall times V_CC= 3.3 ± 0.3 V

V_CC= 5 ± 0.5 V

−

100

20

−

ns/V

20

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

supply voltage

CONDITIONS

MIN. MAX. UNIT

V_CC

V_I

−0.5 +7.0

V

input voltage

V

I_IK

input diode current

output diode current

output source or sink current

V_I< −0.5 V

−

−20

±20

±25

±75

mA

I_OK

I_O

V_O< −0.5 V or V_O> V_CC+ 0.5 V; note 1

−0.5 V < V_O< V_CC+ 0.5 V

−

I_CC, I_GNDV_CCor GND current

−

T_stg

P_tot

storage temperature

power dissipation

−65

−

+150 °C

250 mW

T_amb= −40 to +125 °C

Note

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2004 Jan 13

5

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

DC CHARACTERISTICS

Type 74AHC2G125

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP. MAX. UNIT

OTHER

V_CC(V)

T_amb= 25 °C

V_IH

HIGH-level input voltage

LOW-level input voltage

2.0

3.0

5.5

2.0

3.0

5.5

1.5

−

V

2.1

3.85

−

V_IL

0.5

0.9

1.65

−

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA

I_O= −4.0 mA

I_O= −8.0 mA

2.0

3.0

4.5

3.0

4.5

1.9

2.0

3.0

4.5

−

V

2.9

4.4

2.58

3.94

−

V_OL

LOW-level output voltage V_I= V_IHor V_IL

I_O= 50 µA

I_O= 4.0 mA

I_O= 8.0 mA

2.0

3.0

4.5

3.0

4.5

5.5

−

0

−

0.1

V

0.1

V

0.1

V

0.36

0.25

V

I_OZ

3-state output OFF-state V_I= V_CCor GND

current

µA

I_LI

input leakage current

V_I= V_CCor GND

5.5

−

0.1

1.0

10

µA

pF

I_CC

C_I

quiescent supply current V_I= V_CCor GND; I_O= 0

input capacitance

−

1.5

2004 Jan 13

6

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

CONDITIONS

OTHER

SYMBOL

PARAMETER

MIN.

TYP. MAX. UNIT

V_CC(V)

T_amb= −40 to +85 °C

V_IHHIGH-level input voltage

2.0

3.0

5.5

2.0

3.0

5.5

1.5

−

V

2.1

3.85

−

V_IL

LOW-level input voltage

0.5

0.9

1.65

−

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA

2.0

3.0

4.5

3.0

4.5

1.9

2.9

4.4

2.48

3.8

−

V

I_O= −4.0 mA

I_O= −8.0 mA

V_OL

LOW-level output voltage V_I= V_IHor V_IL

I_O= 50 µA

I_O= 4.0 mA

I_O= 8.0 mA

2.0

3.0

4.5

3.0

4.5

5.5

−

0.1

V

0.1

V

0.1

V

0.44

2.5

V

I_OZ

3-state output OFF-state V_I= V_CCor GND

current

µA

I_LI

input leakage current

V_I= V_CCor GND

5.5

−

1.0

10

µA

pF

I_CC

C_I

quiescent supply current V_I= V_CCor GND; I_O= 0

input capacitance

2004 Jan 13

7

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

CONDITIONS

OTHER

SYMBOL

PARAMETER

MIN.

TYP. MAX. UNIT

V_CC(V)

T_amb= −40 to +125 °C

V_IHHIGH-level input voltage

2.0

3.0

5.5

2.0

3.0

5.5

1.5

−

V

2.1

3.85

−

V_IL

LOW-level input voltage

0.5

0.9

1.65

−

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA

2.0

3.0

4.5

3.0

4.5

1.9

−

V

2.9

4.4

I_O= −4.0 mA

I_O= −8.0 mA

2.40

3.70

V_OL

LOW-level output voltage V_I= V_IHor V_IL

I_O= 50 µA

I_O= 4.0 mA

I_O= 8.0 mA

2.0

3.0

4.5

3.0

4.5

5.5

−

0.1

0.55

10

V

I_OZ

3-state output OFF-state V_I= V_CCor GND

current

µA

I_LI

input leakage current

V_I= V_CCor GND

5.5

−

2.0

40

10

µA

pF

I_CC

C_I

quiescent supply current V_I= V_CCor GND; I_O= 0

input capacitance

2004 Jan 13

8

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

Type 74AHCT2G125

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP. MAX. UNIT

OTHER

V_CC(V)

T_amb= 25 °C

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

4.5 to 5.5

2.0

−

V

−

0.8

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −50 µA

4.5

4.4

4.5

−

V

I_O= −8.0 mA

3.94

−

V_OL

LOW-level output voltage

V_I= V_IHor V_IL

I_O= 50 µA

4.5

5.5

−

0

−

0.1

V

I_O= 8.0 mA

0.36

0.25

V

I_OZ

3-state output OFF-state

current

V_I= V_CCor GND

µA

I_LI

input leakage current

V_I= V_IHor V_IL

5.5

−

0.1

µA

mA

I_CC

∆I_CC

quiescent supply current

V_I= V_CCor GND; I_O= 0

1.0

additional quiescent supply V_I= 3.4 V; other inputs at

1.35

current per input pin

V_CCor GND; I_O= 0

C_I

input capacitance

−

1.5

10

pF

T_amb= −40 to +85 °C

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

4.5 to 5.5

2.0

−

V

−

0.8

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −50 µA

4.5

4.4

3.8

−

V

I_O= −8.0 mA

V_OL

LOW-level output voltage

V_I= V_IHor V_IL

I_O= 50 µA

4.5

5.5

−

0.1

V

I_O= 8.0 mA

0.44

2.5

V

I_OZ

3-state output OFF-state

current

V_I= V_CCor GND

µA

I_LI

input leakage current

V_I= V_IHor V_IL

5.5

−

1.0

10

µA

mA

I_CC

∆I_CC

quiescent supply current

V_I= V_CCor GND; I_O= 0

additional quiescent supply V_I= 3.4 V; other inputs at

1.5

current per input pin

V_CCor GND; I_O= 0

C_I

input capacitance

−

10

pF

2004 Jan 13

9

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

CONDITIONS

OTHER

SYMBOL

PARAMETER

MIN.

TYP. MAX. UNIT

V

_CC(V)

T_amb= −40 to +125 °C

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

4.5 to 5.5

2.0

−

V

−

0.8

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −50 µA

4.5

4.4

−

V

I_O= −8.0 mA

V_I= V_IHor V_IL

I_O= 50 µA

3.70

V_OL

LOW-level output voltage

4.5

5.5

−

0.1

0.55

10

V

I_O= 8.0 mA

V

I_OZ

3-state output OFF-state

current

V_I= V_CCor GND

µA

I_LI

input leakage current

V_I= V_IHor V_IL

5.5

−

2.0

40

µA

mA

I_CC

∆I_CC

quiescent supply current

V_I= V_CCor GND; I_O= 0

additional quiescent supply V_I= 3.4 V; other inputs at

1.5

current per input pin

V_CCor GND; I_O= 0

C_I

input capacitance

−

10

pF

2004 Jan 13

10

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

AC CHARACTERISTICS

Type 74AHC2G125

GND = 0 V; t_r= t_f≤ 3.0 ns.

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

WAVEFORMS

C_L(pF)

T_amb= 25 °C

V_CC= 3.0 to 3.6 V; note 1

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

15

50

−

4.7

8.0

ns

5.0

6.0

6.6

6.9

8.3

8.0

ns

9.7

propagation delay nA to nY

see Figs 5 and 7

11.5

13.2

propagation delay nOE to nY see Figs 6 and 7

V_CC= 4.5 to 5.5 V; note 2

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

15

50

−

3.4

3.6

4.1

4.8

4.9

5.7

5.5

5.1

6.8

7.5

8.8

ns

propagation delay nOE to nY see Figs 6 and 7

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

T_amb= −40 to +85 °C

_CC= 3.0 to 3.6 V; note 1

V

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

15

50

1.0

−

9.5

ns

propagation delay nOE to nY see Figs 6 and 7

9.5

11.5

13.0

15.0

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

V_CC= 4.5 to 5.5 V; note 2

_PHL/t_PLHpropagation delay nA to nY

t

see Figs 5 and 7

15

50

1.0

−

6.5

6.0

8.0

8.5

10.0

ns

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nOE to nY see Figs 6 and 7

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

2004 Jan 13

11

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

WAVEFORMS

C_L(pF)

T_amb= −40 to +125 °C

V_CC= 3.0 to 3.6 V; note 1

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

15

50

1.0

−

11.5

ns

1.0

11.5

12.5

14.5

16.5

ns

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

V_CC= 4.5 to 5.5 V; note 2

t_PHL/t_PLH

_PZH/t_PZL

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

15

50

1.0

−

7.0

6.5

8.5

9.5

11.0

ns

t

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

Notes

1. All typical values are measured at V_CC= 3.3 V.

2. All typical values are measured at V_CC= 5.0 V.

Type 74AHCT2G125

GND = 0 V; t_r= t_f≤ 3.0 ns.

TEST CONDITIONS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

WAVEFORMS

C_L(pF)

T_amb= 25 °C

V_CC= 4.5 to 5.5 V; note 1

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

15

50

−

3.4

3.9

4.5

4.8

5.1

6.1

5.5

5.1

6.8

7.5

8.8

ns

propagation delay nOE to nY see Figs 6 and 7

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

T_amb= −40 to +85 °C

_CC= 4.5 to 5.5 V

V

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

propagation delay nA to nY

see Figs 5 and 7

15

50

1.0

−

6.5

6.0

8.0

8.5

ns

propagation delay nOE to nY see Figs 6 and 7

propagation delay nA to nY

see Figs 5 and 7

2004 Jan 13

12

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

TEST CONDITIONS

WAVEFORMS C_L(pF)

SYMBOL

PARAMETER

MIN.

1.0

TYP.

MAX.

8.5

UNIT

ns

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nOE to nY see Figs 6 and 7

50

−

1.0

10.0

ns

T_amb= −40 to +125 °C

V_CC= 4.5 to 5.5 V

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

t_PHL/t_PLH

t_PZH/t_PZL

t_PHZ/t_PLZ

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

15

50

1.0

−

6.5

6.0

8.0

8.5

10.0

ns

propagation delay nA to nY

see Figs 5 and 7

propagation delay nOE to nY see Figs 6 and 7

Note

1. All typical values are measured at V_CC= 5.0 V.

AC WAVEFORMS

V

handbook, halfpage

nA input

I

V

M

GND

t

PHL

PLH

V

OH

V

nY output

M

V

MNA230

OL

V_IINPUT

REQUIREMENTS

FAMILY

V_MINPUT

V_MOUTPUT

AHC2G125

GND to V_CC

50% V_CC

1.5 V

50% V_CC

AHCT2G125 GND to 3.0 V

Fig.5 The input (nA) to output (nY) propagation delays.

2004 Jan 13

13

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

V

handbook, full pagewidth

I

V

OE input

M

GND

t

PLZ

PZL

V

CC

output

LOW-to-OFF

OFF-to-LOW

V

M

V

+0.3 V

OL

V

t

PHZ

PZH

−0.3 V

OH

output

V

HIGH-to-OFF

OFF-to-HIGH

M

GND

output

enabled

output

enabled

output

disabled

MNA122

V_IINPUT

REQUIREMENTS

FAMILY

V_MINPUT

V_MOUTPUT

AHC2G125

GND to V_CC

50% V_CC

1.5 V

50% V_CC

AHCT2G125 GND to 3.0 V

Fig.6 The 3-state enable and disable times.

S

1

handbook, full pagewidth

V

CC

open

V

CC

GND

R

=

L

1000 Ω

V

O

I

PULSE

GENERATOR

D.U.T.

C

R

L

T

MNA232

TEST

S₁

t_PLH/t_PHL

t_PLZ/t_PZL

t_PHZ/t_PZH

open

V_CC

Definitions for test circuit:

R_L= load resistance.

C_L= load capacitance including jig and probe capacitance (see Chapter “AC characteristics” for the value).

R_T= termination resistance should be equal to the output impedance Z_oof the pulse generator.

GND

Fig.7 Load circuitry for switching times.

14

2004 Jan 13

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

PACKAGE OUTLINES

TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm

SOT505-2

D

E

A

X

c

H

v

M

y

A

E

Z

5

8

A

2

A

(A )

3

A

1

pin 1 index

θ

L

p

L

detail X

1

4

e

w

M

b

p

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

A

(1)

A

b

c

D

E

e

H

E

L

p

UNIT

v

w

y

Z

θ

1

2

3

p

max.

0.15

0.00

0.95

0.75

0.38

0.22

0.18

0.08

3.1

2.9

3.1

2.9

4.1

3.9

0.47

0.33

0.70

0.35

8°

0°

mm

1.1

0.65

0.25

0.5

0.2

0.13

0.1

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

02-01-16

SOT505-2

- - -

2004 Jan 13

15

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm

SOT765-1

D

E

A

X

c

y

H

v

M

A

E

Z

5

8

Q

A

2

A

1

(A )

3

pin 1 index

θ

L

p

L

detail X

1

4

e

w

M

b

p

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

A

(1)

(2)

(1)

A

b

c

D

E

e

H

L

p

Q

UNIT

v

w

y

Z

θ

1

2

3

p

E

max.

0.15

0.00

0.85

0.60

0.27

0.17

0.23

0.08

2.1

1.9

2.4

2.2

3.2

3.0

0.40

0.15

0.21

0.19

0.4

0.1

8°

0°

mm

1

0.5

0.12

0.4

0.2

0.13

0.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

02-06-07

SOT765-1

MO-187

2004 Jan 13

16

Philips Semiconductors

Product speciﬁcation

Bus buffer/line driver; 3-state

74AHC2G125; 74AHCT2G125

DATA SHEET STATUS

DATA SHEET

STATUS⁽¹⁾

PRODUCT

STATUS⁽²⁾⁽³⁾

LEVEL

DEFINITION

I

Objective data

Development This data sheet contains data from the objective speciﬁcation for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

II

Preliminary data Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Relevant changes will

be communicated via a Customer Product/Process Change Notiﬁcation

(CPCN).

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DEFINITIONS

DISCLAIMERS

Short-form specification

The data in a short-form

Life support applications

These products are not

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductors customers using or selling these products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

at these or at any other conditions above those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Right to make changes

Philips Semiconductors

reserves the right to make changes in the products -

including circuits, standard cells, and/or software -

described or contained herein in order to improve design

and/or performance. When the product is in full production

(status ‘Production’), relevant changes will be

Application information

Applications that are

communicated via a Customer Product/Process Change

Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these

products, conveys no licence or title under any patent,

copyright, or mask work right to these products, and

makes no representations or warranties that these

products are free from patent, copyright, or mask work

right infringement, unless otherwise specified.

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

no representation or warranty that such applications will be

suitable for the specified use without further testing or

modification.

2004 Jan 13

17

Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales ofﬁces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

SCA76

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

R44/01/pp18

Date of release: 2004 Jan 13

Document order number: 9397 750 12426


型号：	74AHCT2G125
厂家：	NXP
描述：	Bus buffer/line driver 3-state 总线缓冲器/线路驱动器3 -STATE 驱动器
文件：	总18页 (文件大小：114K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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