LM3224MM-ADJ/NOPB_技术文档

September 2005

LM3224

615kHz/1.25MHz Step-up PWM DC/DC Converter

General Description

Features

n Operating voltage range of 2.7V to 7V

The LM3224 is a step-up DC/DC converter with a 0.15Ω

(typ.), 2.45A (typ.) internal switch and pin selectable operat-

ing frequency. With the ability to convert 3.3V to multiple

outputs of 8V, -8V, and 23V, the LM3224 is an ideal part for

biasing TFT displays. With the high current switch it is also

ideal for driving high current white LEDs for flash applica-

tions. The LM3224 can be operated at switching frequencies

of 615kHz and 1.25MHz allowing for easy filtering and low

noise. An external compensation pin gives the user flexibility

in setting frequency compensation, which makes possible

the use of small, low ESR ceramic capacitors at the output.

An external soft-start pin allows the user to control the

amount of inrush current during start up. The LM3224 is

available in a low profile 8-lead MSOP package.

n 615kHz/1.25MHz pin selectable frequency operation

n Over temperature protection

n Optional soft-start function

n 8-Lead MSOP package

Applications

n TFT Bias Supplies

n Handheld Devices

n Portable Applications

n GSM/CDMA Phones

n Digital Cameras

n White LED Flash/Torch Applications

Typical Application Circuit

20097631

DS200976

www.national.com

Connection Diagram

Top View

20097604

8-Lead Plastic MSOP

NS Package Number MUA08A

Ordering Information

Order Number

LM3224MM-ADJ

LM3224MMX-ADJ

LM3224MM-ADJ

LM3224MMX-ADJ

Spec.

Package

Type

NSC Package

Drawing

Supplied As

Package Top Mark

SEKB

MSOP-8

MUA08A

1000 Units, Tape and

Reel

MSOP-8

3500 Units, Tape and

SEKB

Reel

NOPB

1000 Units, Tape and

Reel

3500 Units, Tape and

Reel

Pin Descriptions

1

Name

V_C

Function

Compensation network connection. Connected to the output of the voltage error amplifier.

Output voltage feedback input.

2

FB

3

SHDN

Shutdown control input, active low. This pin has an internal pulldown resistor so the

default condition is off. The pin must be pulled high to turn on the device.

Analog and power ground.

4

5

6

7

8

GND

SW

Power switch input. Switch connected between SW pin and GND pin.

Analog power input.

V_IN

FSLCT

SS

Switching frequency select input. V_IN= 1.25MHz. Ground = 615kHz.

Soft-start Pin.

www.national.com

2

Block Diagram

20097603

inductor current then flows through the schottky diode to the

load and output capacitor, cycle 2 of Figure 1 (b). The NMOS

power device is then set by the oscillator at the end of the

period and current flows through the NMOS power device

once again.

General Description

The LM3224 utilizes a PWM control scheme to regulate the

output voltage over all load conditions. The operation can

best be understood referring to the block diagram and Figure

1 of the Operation section. At the start of each cycle, the

oscillator sets the driver logic and turns on the NMOS power

device conducting current through the inductor, cycle 1 of

Figure 1 (a). During this cycle, the voltage at the V_Cpin

controls the peak inductor current. The V_Cvoltage will in-

crease with larger loads and decrease with smaller. This

voltage is compared with the summation of the SW voltage

and the ramp compensation. The ramp compensation is

used in PWM architectures to eliminate the sub-harmonic

oscillations that occur during duty cycles greater than 50%.

Once the summation of the ramp compensation and switch

voltage equals the V_Cvoltage, the PWM comparator resets

the driver logic turning off the NMOS power device. The

The LM3224 has dedicated protection circuitry running dur-

ing normal operation to protect the IC. The Thermal Shut-

down circuitry turns off the NMOS power device when the

die temperature reaches excessive levels. The UVP com-

parator protects the NMOS power device during supply

power startup and shutdown to prevent operation at voltages

less than the minimum input voltage. The OVP comparator is

used to prevent the output voltage from rising at no loads

allowing full PWM operation over all load conditions. The

LM3224 also features a shutdown mode decreasing the

supply current to 0.1µA (typ.).

3

www.national.com

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Vapor Phase (60 sec.)

Infrared (15 sec.)

ESD Susceptibility

(Note 5)

215˚C

220˚C

V_IN

7.5V

21V

Human Body Model

Machine Model

2kV

SW Voltage

200V

FB Voltage (Note 2)

V_CVoltage (Note 3)

SHDN Voltage

FSLCT

7V

1.26V 0.3V

7.5V

Operating Conditions

Operating Junction

Temperature Range (Note 6)

Storage Temperature

Supply Voltage

7.5V

−40˚C to +125˚C

−65˚C to +150˚C

2.7V to 7V

Maximum Junction

Temperature

150˚C

Power Dissipation(Note 4)

Lead Temperature

Internally Limited

300˚C

Maximum Output Voltage

20V

Electrical Characteristics

Specifications in standard type face are for T_J= 25˚C and those with boldface type apply over the full Operating Tempera-

ture Range ( T_J= −40˚C to +125˚C). V_IN= 2.7V, FSLCT = SHDN = V_IN, and I_L= 0A, unless otherwise specified.

Min

(Note 6)

Typ

(Note 7)

1.3

Max

(Note 6)

2.0

Symbol

Parameter

Conditions

Units

I_Q

Quiescent Current

FB = 2V (Not Switching)

V_SHDN= 0V

mA

µA

V

0.1

2.0

V_FB

Feedback Voltage

1.2285

1.26

2.45

2.1

1.2915

2.8

I

_CL(Note 8) Switch Current Limit

V_IN= 2.7V (Note 9)

V_IN= 3V, V_OUT= 8V

V_IN= 3V, V_OUT= 5V

2.7V ≤ V_IN≤ 7V

1.9

A

2.2

%V_FB/∆V_INFeedback Voltage Line

0.085

35

0.15

%/V

Regulation

I_B

FB Pin Bias Current (Note

10)

250

nA

µA

I_SS

V_SS

V_IN

g_m

SS Pin Current

SS Pin Voltage

Input Voltage Range

7.5

1.2090

2.7

11

13

1.2622

7

1.2430

V

µmho

V/V

%

Error Amp Transconductance ∆I = 5µA

Error Amp Voltage Gain

40

87

78

135

A_V

D_MAX

f_S

Maximum Duty Cycle

85

450

0.9

92.5

615

1.25

2.4

0.3

0.2

0.15

0.8

2.5

2.6

Switching Frequency

Shutdown Pin Current

FSLCT = Ground

750

1.5

5.0

1.2

8.0

0.4

kHz

MHz

µA

FSLCT = V_IN

V_SHDN= 2.7V

V_SHDN= 0.3V

V_SW= 20V

I_SHDN

I_L

Switch Leakage Current

Switch R_DSON

µA

Ω

V

R_DSON

Th_SHDN

V_IN= 2.7V, I_SW= 1A

Output High

Shutdown Threshold

1.2

2.3

Output Low

0.3

2.7

V

UVP

On Threshold

Off Threshold

V

Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to

be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: The FB pin should never exceed V

.

IN

Note 3: Under normal operation the V pin may go to voltages above this value. This maximum rating is for the possibility of a voltage being applied to the pin,

C

however the V pin should never have a voltage directly applied to it.

C

Note 4: The maximum allowable power dissipation is a function of the maximum junction temperature, T (MAX), the junction-to-ambient thermal resistance, θ

,

.

J

JA

and the ambient temperature, T . The maximum allowable power dissipation at any ambient temperature is calculated using: P (MAX) = (T

− T )/θ

A

D

J(MAX)

A

Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.

www.national.com

4

Electrical Characteristics (Continued)

Note 5: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged

directly into each pin.

Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100%

production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to

calculate Average Outgoing Quality Level (AOQL).

Note 7: Typical numbers are at 25˚C and represent the most likely norm.

Note 8: Duty cycle affects current limit due to ramp generator.

Note 9: Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. V

Note 10: Bias current flows into FB pin.

IN

Typical Performance Characteristics

SHDN Pin Current vs. SHDN Pin Voltage

SS Pin Current vs. Temperature

20097616

20097617

FSLCT Pin Current vs. FSLCT Pin Voltage

FB Pin Current vs. Temperature

20097619

20097618

5

www.national.com

Typical Performance Characteristics (Continued)

NMOS R_DSONvs. Input Voltage

615kHz Non-switching I_Qvs. Input Voltage

20097620

20097621

1.25MHz Non-switching I_Qvs. Input Voltage

615kHz Switching I_Qvs. Input Voltage

20097622

20097623

1.25MHz Switching I_Qvs. Input Voltage

615kHz Switching I_Qvs. Temperature

20097624

20097625

www.national.com

6

Typical Performance Characteristics (Continued)

1.25MHz Switching I_Qvs. Temperature

615kHz Switching Frequency vs. Temperature

20097626

20097627

1.25MHz Switching Frequency vs. Temperature

615kHz Maximum Duty Cycle vs. Temperature

20097628

20097629

1.25MHz Maximum Duty Cycle vs. Temperature

Switch Current Limit vs. V_IN

20097651

20097660

7

www.national.com

Typical Performance Characteristics (Continued)

Switch Current Limit vs. Temperature

20097662

20097652

1.25MHz Efficiency vs. Load Current

20097653

www.national.com

8

Operation

20097602

FIGURE 1. Simplified Boost Converter Diagram

(a) First Cycle of Operation (b) Second Cycle Of Operation

CONTINUOUS CONDUCTION MODE

The LM3224 is a current-mode, PWM boost regulator. A

boost regulator steps the input voltage up to a higher output

voltage. In continuous conduction mode (when the inductor

current never reaches zero at steady state), the boost regu-

lator operates in two cycles.

SOFT-START CAPACITOR

In the first cycle of operation, shown in Figure 1 (a), the

transistor is closed and the diode is reverse biased. Energy

is collected in the inductor and the load current is supplied by

The LM3224 has a soft-start pin that can be used to limit the

inductor inrush current on start-up. The external SS pin is

used to tailor the soft-start for a specific application but is not

required for all applications and can be left open when not

needed. When used, a current source charges the external

soft-start capacitor, Css. The soft-start time can be estimated

as:

C_OUT

.

The second cycle is shown in Figure 1 (b). During this cycle,

the transistor is open and the diode is forward biased. The

energy stored in the inductor is transferred to the load and

output capacitor.

Tss = Css*1.24V/Iss

The ratio of these two cycles determines the output voltage.

The output voltage is defined approximately as:

THERMAL SHUTDOWN

The LM3224 includes thermal shutdown protection. If the die

temperature exceeds 140˚C the regulator will shut off the

power switch, significantly reducing power dissipation in the

device. The switch will remain off until the die temperature is

reduced to approximately 120˚C. If the cause of the excess

heating is not removed (excessive ambient temperature,

excessive power dissipation, or both) the device will con-

tinue to cycle on and off in this manner to protect from

damage.

where D is the duty cycle of the switch, D and D' will be

required for design calculations.

SETTING THE OUTPUT VOLTAGE

The output voltage is set using the feedback pin and a

resistor divider connected to the output as shown in the

typical operating circuit. The feedback pin voltage is 1.26V,

so the ratio of the feedback resistors sets the output voltage

according to the following equation:

9

www.national.com

Output Capacitor ESR Compensation) and 680pF ≤ C_C

≤

Operation (Continued)

INTRODUCTION TO COMPENSATION

10nF. Refer to the Applications Information section for rec-

ommended values for specific circuits and conditions. Refer

to the Compensation section for other design requirement.

COMPENSATION

This section will present a general design procedure to help

insure a stable and operational circuit. The designs in this

datasheet are optimized for particular requirements. If differ-

ent conversions are required, some of the components may

need to be changed to ensure stability. Below is a set of

general guidelines in designing a stable circuit for continu-

ous conduction operation, in most all cases this will provide

for stability during discontinuous operation as well. The

power components and their effects will be determined first,

then the compensation components will be chosen to pro-

duce stability.

INDUCTOR AND DIODE SELECTION

Although the inductor sizes mentioned earlier are fine for

most applications, a more exact value can be calculated. To

ensure stability at duty cycles above 50%, the inductor must

have some minimum value determined by the minimum

input voltage and the maximum output voltage. This equa-

tion is:

20097605

FIGURE 2. (a) Inductor current. (b) Diode current.

The LM3224 is a current mode PWM boost converter. The

signal flow of this control scheme has two feedback loops,

one that senses switch current and one that senses output

voltage.

where fs is the switching frequency, D is the duty cycle, and

R_DSONis the ON resistance of the internal switch taken from

the graph "NMOS R_DSONvs. Input Voltage" in the Typical

Performance Characteristics section. This equation is only

To keep a current programmed control converter stable

above duty cycles of 50%, the inductor must meet certain

criteria. The inductor, along with input and output voltage,

will determine the slope of the current through the inductor

(see Figure 2 (a)). If the slope of the inductor current is too

great, the circuit will be unstable above duty cycles of 50%.

A 10µH to 15µH inductor is recommended for most 615 kHz

applications, while a 4.7µH to 10µH inductor may be used for

most 1.25 MHz applications. If the duty cycle is approaching

the maximum of 85%, it may be necessary to increase the

inductance by as much as 2X. See Inductor and Diode

Selection for more detailed inductor sizing.

>

good for duty cycles greater than 50% (D 0.5), for duty

cycles less than 50% the recommended values may be

used. The corresponding inductor current ripple as shown in

Figure 2 (a) is given by:

The inductor ripple current is important for a few reasons.

One reason is because the peak switch current will be the

average inductor current (input current or I_LOAD/D’) plus ∆i_L.

As a side note, discontinuous operation occurs when the

inductor current falls to zero during a switching cycle, or ∆i_L

is greater than the average inductor current. Therefore, con-

tinuous conduction mode occurs when ∆i_Lis less than the

average inductor current. Care must be taken to make sure

that the switch will not reach its current limit during normal

operation. The inductor must also be sized accordingly. It

should have a saturation current rating higher than the peak

inductor current expected. The output voltage ripple is also

affected by the total ripple current.

The LM3224 provides a compensation pin (V_C) to customize

the voltage loop feedback. It is recommended that a series

combination of R_Cand C_Cbe used for the compensation

network, as shown in the typical application circuit. For any

given application, there exists a unique combination of R_C

and C_Cthat will optimize the performance of the LM3224

circuit in terms of its transient response. The series combi-

nation of R_Cand C_Cintroduces a pole-zero pair according to

the following equations:

The output diode for a boost regulator must be chosen

correctly depending on the output voltage and the output

current. The typical current waveform for the diode in con-

tinuous conduction mode is shown in Figure 2 (b). The diode

must be rated for a reverse voltage equal to or greater than

the output voltage used. The average current rating must be

greater than the maximum load current expected, and the

peak current rating must be greater than the peak inductor

current. During short circuit testing, or if short circuit condi-

tions are possible in the application, the diode current rating

where R_Ois the output impedance of the error amplifier,

approximately 900kΩ. For most applications, performance

can be optimized by choosing values within the range 5kΩ ≤

R_C≤ 100kΩ (R_Ccan be up to 200kΩ if C_C2is used, see High

www.national.com

10

source output. The size will generally need to be larger for

applications where the regulator is supplying nearly the

maximum rated output or if large load steps are expected. A

minimum value of 10µF should be used for the less stressful

condtions while a 22µF to 47µF capacitor may be required

for higher power and dynamic loads. Larger values and/or

lower ESR may be needed if the application requires very

low ripple on the input source voltage.

Operation (Continued)

must exceed the switch current limit. Using Schottky diodes

with lower forward voltage drop will decrease power dissipa-

tion and increase efficiency.

DC GAIN AND OPEN-LOOP GAIN

Since the control stage of the converter forms a complete

feedback loop with the power components, it forms a closed-

loop system that must be stabilized to avoid positive feed-

back and instability. A value for open-loop DC gain will be

required, from which you can calculate, or place, poles and

zeros to determine the crossover frequency and the phase

margin. A high phase margin (greater than 45˚) is desired for

the best stability and transient response. For the purpose of

stabilizing the LM3224, choosing a crossover point well be-

low where the right half plane zero is located will ensure

sufficient phase margin.

The choice of output capacitors is also somewhat arbitrary

and depends on the design requirements for output voltage

ripple. It is recommended that low ESR (Equivalent Series

Resistance, denoted R_ESR) capacitors be used such as

ceramic, polymer electrolytic, or low ESR tantalum. Higher

ESR capacitors may be used but will require more compen-

sation which will be explained later on in the section. The

ESR is also important because it determines the peak to

peak output voltage ripple according to the approximate

equation:

1

To ensure a bandwidth of

⁄ or less of the frequency of the

2

∆V_OUT) 2∆i_LR_ESR(in Volts)

RHP zero, calculate the open-loop DC gain, A_DC. After this

value is known, you can calculate the crossover visually by

placing a −20dB/decade slope at each pole, and a +20dB/

decade slope for each zero. The point at which the gain plot

crosses unity gain, or 0dB, is the crossover frequency. If the

A minimum value of 10µF is recommended and may be

increased to a larger value. After choosing the output capaci-

tor you can determine a pole-zero pair introduced into the

control loop by the following equations:

crossover frequency is less than ¹⁄

the RHP zero, the phase

2

margin should be high enough for stability. The phase mar-

gin can also be improved by adding C_C2as discussed later in

this section. The equation for A_DCis given below with addi-

tional equations required for the calculation:

Where R_Lis the minimum load resistance corresponding to

the maximum load current. The zero created by the ESR of

the output capacitor is generally very high frequency if the

ESR is small. If low ESR capacitors are used it can be

neglected. If higher ESR capacitors are used see the High

Output Capacitor ESR Compensation section. Some suit-

able capacitor vendors include Vishay, Taiyo-Yuden, and

TDK.

RIGHT HALF PLANE ZERO

A current mode control boost regulator has an inherent right

half plane zero (RHP zero). This zero has the effect of a zero

in the gain plot, causing an imposed +20dB/decade on the

rolloff, but has the effect of a pole in the phase, subtracting

another 90˚ in the phase plot. This can cause undesirable

effects if the control loop is influenced by this zero. To ensure

the RHP zero does not cause instability issues, the control

mc ) 0.072fs (in V/s)

loop should be designed to have a bandwidth of less than ¹⁄

2

the frequency of the RHP zero. This zero occurs at a fre-

quency of:

where R_Lis the minimum load resistance, V_INis the mini-

mum input voltage, g_mis the error amplifier transconduc-

tance found in the Electrical Characteristics table, and R_D

-

^SONis the value chosen from the graph "NMOS R_DSONvs.

Input Voltage" in the Typical Performance Characteristics

section.

where I_LOADis the maximum load current.

INPUT AND OUTPUT CAPACITOR SELECTION

The switching action of a boost regulator causes a triangular

voltage waveform at the input. A capacitor is required to

reduce the input ripple and noise for proper operation of the

regulator. The size used is dependant on the application and

board layout. If the regulator will be loaded uniformly, with

very little load changes, and at lower current outputs, the

input capacitor size can often be reduced. The size can also

be reduced if the input of the regulator is very close to the

SELECTING THE COMPENSATION COMPONENTS

The first step in selecting the compensation components R_C

and C_Cis to set a dominant low frequency pole in the control

loop. Simply choose values for R_Cand C_Cwithin the ranges

given in the Introduction to Compensation section to set this

pole in the area of 10Hz to 500Hz. The frequency of the pole

created is determined by the equation:

11

www.national.com

changed a little more to optimize performance if desired.

This is best done in the lab on a bench, checking the load

step response with different values until the ringing and

overshoot on the output voltage at the edge of the load steps

is minimal. This should produce a stable, high performance

circuit. For improved transient response, higher values of R_C

should be chosen. This will improve the overall bandwidth

which makes the regulator respond more quickly to tran-

sients. If more detail is required, or the most optimum per-

formance is desired, refer to a more in depth discussion of

compensating current mode DC/DC switching regulators.

Operation (Continued)

where R_Ois the output impedance of the error amplifier,

approximately 900kΩ. Since R_Cis generally much less than

R_O, it does not have much effect on the above equation and

can be neglected until a value is chosen to set the zero f_ZC

.

f_ZCis created to cancel out the pole created by the output

capacitor, f_P1. The output capacitor pole will shift with differ-

ent load currents as shown by the equation, so setting the

zero is not exact. Determine the range of f_P1over the ex-

pected loads and then set the zero f_ZCto a point approxi-

mately in the middle. The frequency of this zero is deter-

mined by:

POWER DISSIPATION

The output power of the LM3224 is limited by its maximum

power dissipation. The maximum power dissipation is deter-

mined by the formula

P_D= (T_jmax- T_A)/θ_JA

where T_jmaxis the maximum specidfied junction temperature

(125˚C), T_Ais the ambient temperature, and θ_JAis the ther-

mal resistance of the package.

Now R_Ccan be chosen with the selected value for C_C.

Check to make sure that the pole f_PCis still in the 10Hz to

500Hz range, change each value slightly if needed to ensure

both component values are in the recommended range.

LAYOUT CONSIDERATIONS

The input bypass capacitor C_IN, as shown in the typical

operating circuit, must be placed close to the IC. This will

reduce copper trace resistance which effects input voltage

ripple of the IC. For additional input voltage filtering, a 100nF

bypass capacitor can be placed in parallel with C_IN, close to

the V_INpin, to shunt any high frequency noise to ground. The

output capacitor, C_OUT, should also be placed close to the

IC. Any copper trace connections for the C_OUTcapacitor can

increase the series resistance, which directly effects output

voltage ripple. The feedback network, resistors R_FB1and

R_FB2, should be kept close to the FB pin, and away from the

inductor, to minimize copper trace connections that can in-

ject noise into the system. Trace connections made to the

inductor and schottky diode should be minimized to reduce

power dissipation and increase overall efficiency. For more

detail on switching power supply layout considerations see

Application Note AN-1149: Layout Guidelines for Switching

Power Supplies.

HIGH OUTPUT CAPACITOR ESR COMPENSATION

When using an output capacitor with a high ESR value, or

just to improve the overall phase margin of the control loop,

another pole may be introduced to cancel the zero created

by the ESR. This is accomplished by adding another capaci-

tor, C_C2, directly from the compensation pin V_Cto ground, in

parallel with the series combination of R_Cand C_C. The pole

should be placed at the same frequency as f_Z1, the ESR

zero. The equation for this pole follows:

To ensure this equation is valid, and that C_C2can be used

without negatively impacting the effects of R_Cand C_C, f_PC2

must be greater than 10f_ZC

.

CHECKING THE DESIGN

With all the poles and zeros calculated the crossover fre-

quency can be checked as described in the section DC Gain

and Open-loop Gain. The compensation values can be

www.national.com

12

Application Information

20097608

FIGURE 3. Triple Output TFT Bias (615 kHz operation)

TRIPLE OUTPUT TFT BIAS

C1 charges to 8V minus a diode drop ()0.4V if using a

Schottky). When the transistor opens in the first cycle, D3

conducts and C1’s polarity is reversed with respect to the

output at C2, producing -8V.

The circuit in Figure 3 shows how the LM3224 can be

configured to provide outputs of 8V, −8V, and 23V, conve-

nient for biasing TFT displays. The 8V output is regulated,

while the −8V and 23V outputs are unregulated.

The 23V output is realized with a series of capacitor charge

pumps. It consists of four stages: the first stage includes C4,

D4, and the LM3224 switch; the second stage uses C5, D5,

and D1; the third stage includes C6, D6, and the LM3224

switch; the final stage is C7 and D7. In the first stage, C4

charges to 8V when the LM3224 switch is closed, which

causes D5 to conduct when the switch is open. In the second

stage, the voltage across C5 is VC4 + VD1 - VD5 = VC4 )

8V when the switch is open. However, because C5 is refer-

enced to the 8V output, the voltage at C5 is 16V when

referenced to ground. In the third stage, the 16V at C5

appears across C6 when the switch is closed. When the

switch opens, C6 is referenced to the 8V output minus a

diode drop, which raises the voltage at C6 with respect to

ground to about 24V. Hence, in the fourth stage, C7 is

charged to 24V when the switch is open. From the first stage

The 8V output is generated by a typical boost topology. The

basic operation of the boost converter is described in the

OPERATION section. The output voltage is set with R_FB1

and R_FB2by:

The compensation network of R_Cand C_Care chosen to

optimally stabilize the converter. The inductor also affects

the stability. When operating at 615 kHz, a 10uH inductor is

recommended to insure the converter is stable at duty cycles

greater than 50%. Refer to the COMPENSATION section for

more information.

The -8V output is derived from a diode inverter. During the

second cycle, when the transistor is open, D2 conducts and

13

www.national.com

voltage closer to 24 - 3xVDIODE (about 22.8V if a 0.4V

forward drop is assumed).

Application Information (Continued)

to the last, there are three diode drops that make the output

20097649

FIGURE 4. PWM White LED Flash/Torch Driver

20097650

FIGURE 5. Continuously Operating White LED Flash/Torch Driver

www.national.com

14

flash enable FET is turned on to increase the current for the

amount of time desired. The minimum guaranteed maximum

output current for this circuit is the same as for Figure 4.

Application Information (Continued)

The LM3224 can be configured to drive high current white

LEDs for the flash and torch functions of a digital camera,

camera phone, or any other similar light source. The flash/

torch can be set up with the circuit in Figure 4 by using the

resistor R_SETto determine the amount of current that will

flow through the LED using the equation:

TABLE 1. Maximum LED Drive current

(F_SW=1.25MHz, L=4.7µH, LED V_FMAX=4V (V_OUT=5.26V)

V_IN

4.2

4.1

4.0

3.9

3.8

3.7

3.6

3.5

3.4

3.3

3.2

3.1

3.0

2.9

2.8

2.7

LED Drive Current (mA)

I_LED= V_FB/R_SET

1077

1047

1017

987

958

929

900

871

842

814

785

757

729

701

673

646

If the flash and torch modes will both be used the resistor

R_SETcan be chosen for the higher current flash value. To

flash the circuit pull the SHDN high for the time duration

needed for the flash. To enable a lower current torch mode a

PWM signal can be applied to the SHDN pin. The torch

current would then be approximately the percent ON time of

the PWM signal multiplied by the flash (or maximum) cur-

rent. The optional disconnect FET can be used to eliminate

leakage current through the LEDs when the part is off and

also to disconnect the LED when the input voltage exceeds

the forward voltage drop of the LED. The maximum output

current the LM3224 can supply in this configuration is shown

in Table 1.

Figure 5 is another method of driving a high current white

LED. This circuit has a higher component count but allows

the switcher to remain on continuously for torch mode reduc-

ing stress on the supply. The two FETs also double for a

disconnect function as described above. In this circuit the

device and the torch enable FET are turned on setting a

lower current through the LED. When flash is needed the

Some Recommended Inductors (Others May Be Used)

Manufacturer

Inductor

Contact Information

www.coilcraft.com

800-3222645

Coilcraft

DO3316 and DT3316 series

TDK

SLF10145 series

www.component.tdk.com

847-803-6100

Pulse

P0751 and P0762 series

www.pulseeng.com

www.sumida.com

Sumida

CDRH8D28 and CDRH8D43 series

Some Recommended Input And Output Capacitors (Others May Be Used)

Manufacturer

Capacitor

Contact Information

Vishay Sprague

293D, 592D, and 595D series tantalum

www.vishay.com

407-324-4140

Taiyo Yuden

High capacitance MLCC ceramic

www.t-yuden.com

408-573-4150

ESRD seriec Polymer Aluminum Electrolytic

SPV and AFK series V-chip series

High capacitance MLCC ceramic

Cornell Dubilier

MuRata

www.cde.com

www.murata.com

15

www.national.com

Application Information (Continued)

20097661

FIGURE 6. 1.25MHz, 5V Output

20097663

FIGURE 7. 1.25MHz, 8V Output

www.national.com

16

Application Information (Continued)

20097664

FIGURE 8. 1.25MHz, 12V Output

20097665

FIGURE 9. 1.25MHz, 15V Output

17

www.national.com

Physical Dimensions inches (millimeters) unless otherwise noted

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves

the right at any time without notice to change said circuitry and specifications.

For the most current product information visit us at www.national.com.

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, and whose failure to perform when

properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to result

in a significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

expected to cause the failure of the life support device or

system, or to affect its safety or effectiveness.

BANNED SUBSTANCE COMPLIANCE

National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products

Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain

no ‘‘Banned Substances’’ as defined in CSP-9-111S2.

Leadfree products are RoHS compliant.

National Semiconductor

Americas Customer

Support Center

National Semiconductor

Europe Customer Support Center

Fax: +49 (0) 180-530 85 86

National Semiconductor

Asia Pacific Customer

Support Center

National Semiconductor

Japan Customer Support Center

Fax: 81-3-5639-7507

Email: new.feedback@nsc.com

Tel: 1-800-272-9959

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 69 9508 6208

English Tel: +44 (0) 870 24 0 2171

Français Tel: +33 (0) 1 41 91 8790

Email: ap.support@nsc.com

Email: jpn.feedback@nsc.com

Tel: 81-3-5639-7560

www.national.com


型号：	LM3224MM-ADJ/NOPB
厂家：	National Semiconductor
描述：	IC 2.8 A SWITCHING REGULATOR, 1500 kHz SWITCHING FREQ-MAX, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8, Switching Regulator or Controller 开关光电二极管
文件：	总18页 (文件大小：906K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LM3224MM-ADJ/NOPB [NSC]

相关型号：

LM3224MMX-ADJ

LM3224MMX-ADJ/NOPB

LM3224_05

LM322H

LM322N

LM322N/B+

LM323

LM323

LM323-155.52M

LM323-N

LM323/D

LM323A