2SJ604-Z-AZ [NEC]
Power Field-Effect Transistor, 45A I(D), 60V, 0.043ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, MP-25Z, TO-220SMD, 3 PIN;型号: | 2SJ604-Z-AZ |
厂家: | NEC |
描述: | Power Field-Effect Transistor, 45A I(D), 60V, 0.043ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, MP-25Z, TO-220SMD, 3 PIN 晶体 晶体管 开关 脉冲 局域网 |
文件: | 总8页 (文件大小:82K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SJ604
SWITCHING
P-CHANNEL POWER MOS FET
ORDERING INFORMATION
DESCRIPTION
The 2SJ604 is P-channel MOS Field Effect Transistor designed
for solenoid, motor and lamp driver.
PART NUMBER
2SJ604
PACKAGE
TO-220AB
TO-262
2SJ604-S
FEATURES
2SJ604-ZJ
TO-263
• Super low on-state resistance:
RDS(on)1 = 30 mΩ MAX. (VGS = −10 V, ID = −23 A)
RDS(on)2 = 43 mΩ MAX. (VGS = −4.0 V, ID = −23 A)
• Low input capacitance:
Note
TO-220SMD
2SJ604-Z
Note TO-220SMD package is produced only in
Japan
Ciss = 3300 pF TYP. (VDS = −10 V, VGS = 0 V)
• Built-in gate protection diode
(TO-220AB)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
VDSS
VGSS
ID(DC)
ID(pulse)
PT
−60
V
V
20
45
m
m
A
120
m
70
A
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
Channel Temperature
W
PT
1.5
150
W
(TO-262)
Tch
°C
°C
A
Storage Temperature
Single Avalanche Current Note2
Tstg
−55 to +150
−35
IAS
Single Avalanche Energy Note2
EAS
123
mJ
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1%
2. Starting Tch = 25°C, VDD = −30 V, RG = 25 Ω, VGS = −20 → 0 V
(TO-263, TO-220SMD)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
Date Published July 2002 NS CP(K)
Printed in Japan
D14649EJ3V0DS00 (3rd edition)
The mark ★ shows major revised points.
2000, 2001
©
2SJ604
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
SYMBOL
IDSS
TEST CONDITIONS
MIN.
TYP. MAX. UNIT
VDS = −60 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
−10
µA
µA
V
10
IGSS
m
m
Gate Cut-off Voltage
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
VDS = −10 V, ID = −1 mA
VDS = −10 V, ID = −23 A
VGS = −10 V, ID = −23 A
VGS = −4.0 V, ID = −23 A
VDS = −10 V
−1.5
−2.0
41
−2.5
Forward Transfer Admittance
Drain to Source On-state Resistance
20
S
23
30
43
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
30
Input Capacitance
3300
580
230
12
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
Crss
VGS = 0 V
f = 1 MHz
td(on)
tr
td(off)
tf
VDD = −30 V, ID = −23 A
VGS = −10 V
11
Turn-off Delay Time
Fall Time
RG = 0 Ω
77
52
Total Gate Charge
QG
VDD= −48 V
63
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
QGS
QGD
VF(S-D)
trr
VGS = −10 V
11
ID = −45 A
16
IF = 45 A, VGS = 0 V
IF = 45 A, VGS = 0 V
di/dt = 100 A/ µs
1.0
51
ns
nC
Qrr
105
TEST CIRCUIT 2 SWITCHING TIME
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
D.U.T.
L
RG
= 25 Ω
V
GS (−)
R
L
90%
PG.
GS = −20 → 0 V
V
GS
V
GS
10%
VDD
50 Ω
Wave Form
0
RG
V
PG.
V
DD
V
DS (−)
90%
90%
−
BVDSS
V
DS
I
AS
V
GS (−)
10% 10%
d(off)
V
DS
0
V
DS
0
Wave Form
I
D
t
d(on)
t
t
f
t
r
VDD
τ
t
on
t
off
µ
τ = 1 s
Starting Tch
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= −2 mA
RL
PG.
V
DD
50 Ω
2
Data Sheet D14649EJ3V0DS
2SJ604
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
100
80
60
40
20
0
100
80
60
40
20
0
0
20
40 60
80 100 120 140 160
20 40
60
80 100 120 140 160
0
T
ch - Channel Temperature - ˚C
T
C
- Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
–1000
–100
–10
I
D(pulse)
I
D(DC)
DC
–1
T
C
= 25˚C
Single Pulse
–0.1
–0.1
–1
–10
–100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
Rth(j-A) = 83.3˚C/W
10
1
R
th(j-C) = 1.79˚C/W
0.1
0.01
Single Pulse
100 1000
10
µ
1 m
10 m
100 m
1
10
100
µ
PW - Pulse Width - s
3
Data Sheet D14649EJ3V0DS
2SJ604
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
–1000
–100
–10
–120
–100
–80
–60
–40
–20
0
V
GS = –10 V
–4.5 V
–4.0 V
T
A
= −55˚C
25˚C
75˚C
–1
125˚C
V
DS = –10 V
Pulsed
–4
–5
Pulsed
–0.1
0
–1
–2
–3
–5
–1
–2
–3
–4
V
GS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
80
100
10
Pulsed
60
40
20
0
I
D
= –45 A
–23 A
–9 A
T
A
= 125˚C
75˚C
25˚C
1
−55˚C
0.1
VDS = –10 V
Pulsed
0.01
0
–5
–10
–15
–20
–0.01
–0.1
ID - Drain Current - A
–1
–10
–100
V
GS - Gate to Source Voltage - V
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
80
60
40
20
0
–4.0
–3.0
–2.0
–1.0
0
Pulsed
V
DS = –10 V
I
D
= –1 mA
V
GS = –4.0 V
–4.5 V
–10 V
–1
–10
–100
–1000
–50
0
50
100
150
ID - Drain Current - A
T
ch - Channel Temperature - ˚C
4
Data Sheet D14649EJ3V0DS
2SJ604
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
60
–1000
–100
–10
Pulsed
Pulsed
V
GS = –4.0 V
50
40
30
20
10
0
–4.5 V
–10 V
V
GS = –10 V
–4.0 V
0 V
–1
I
D
= –23 A
–0.1
−50
0
50
100
150
0
–0.5
–1.0
–1.5
T
ch - Channel Temperature - ˚C
V
SD - Source to Drain Voltage - V
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
SWITCHING CHARACTERISTICS
10000
1000
1000
100
V
V
R
DD = –30 V
GS = –10 V
= 0 Ω
Ciss
G
t
d(off)
t
f
C
oss
rss
t
d(on)
100
10
10
1
C
t
r
V
GS = 0 V
f = 1 MHz
–0.1
–1
–10
–100
–0.1
–1
–10
–100
I
D
- Drain Current - A
VDS - Drain to Source Voltage - V
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
–12
–10
–8
–6
–4
–2
0
–60
1000
100
I = –45 A
D
di/dt = 100 A/
µ
s
V
GS = 0 V
–50
–40
–30
–20
–10
0
V
DD = –48 V
–30 V
–12 V
V
GS
10
1
V
DS
10
20
30
40
50
60
70
0
0.1
1
10
100
Q
G
- Gate Charge - nC
I
D
- Drain Current - A
5
Data Sheet D14649EJ3V0DS
2SJ604
SINGLE AVALANCHE ENERGY
DERATING FACTOR
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
100
10
1
160
140
120
100
80
V
DD = –30 V
= 25 Ω
GS = –20 → 0 V
AS ≤ –35 A
I
AS = –35 A
RG
V
I
60
40
V
DD = –30 V
= 25 Ω
GS = –20 → 0 V
20
R
G
V
0.1
0
10
µ
100
µ
1m
10m
25
50
75
100
125
150
L - Inductive Load - H
Starting Tch - Starting Channel Temperature - ˚C
6
Data Sheet D14649EJ3V0DS
2SJ604
★
PACKAGE DRAWINGS (Unit: mm)
1) TO-220AB (MP-25)
10.6 MAX.
2) TO-262 (MP-25 Fin Cut)
4.8 MAX.
1.3±0.2
4.8 MAX.
1.3±0.2
φ
3.6±0.2
10 TYP.
10.0 TYP.
4
1
2
3
4
1
2 3
1.3±0.2
1.3±0.2
2.8±0.2
0.5±0.2
1.Gate
0.75±0.3
2.54 TYP.
2.54 TYP.
0.75±0.1
2.54 TYP.
0.5±0.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
2.8±0.2
2.54 TYP.
2.Drain
3.Source
4.Fin (Drain)
3) TO-263 (MP-25ZJ)
4) TO-220SMD (MP-25Z) Note
4.8 MAX.
4.8 MAX.
10 TYP.
10 TYP.
4
1.3±0.2
1.3±0.2
4
1
2
3
1
2
3
1.4±0.2
1.4±0.2
0.7±0.2
0.75±0.3
2.54 TYP.
0.5±0.2
0.5±0.2
2.54 TYP.
2.54 TYP.
2.54 TYP.
1.Gate
1.Gate
2.Drain
3.Source
2.Drain
3.Source
4.Fin (Drain)
4.Fin (Drain)
Note This package is produced only in Japan.
EQUIVALENT CIRCUIT
Drain
Remark The diode connected between the gate and source of the transistor
serves as a protector against ESD. When this device actually used,
an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
Body
Diode
Gate
Gate
Protection
Diode
Source
7
Data Sheet D14649EJ3V0DS
2SJ604
•
The information in this document is current as of July, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
•
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written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
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liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
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•
•
•
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M8E 00. 4
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