PM75CLA060 [MITSUBISHI]
FLAT-BASE TYPE INSULATED PACKAGE; FLAT -BASE型绝缘包装型号: | PM75CLA060 |
厂家: | Mitsubishi Group |
描述: | FLAT-BASE TYPE INSULATED PACKAGE |
文件: | 总6页 (文件大小:98K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
PM75CLA060
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.5V @Tj=125°C
b) I adopt the over-temperature conservation by Tj detection of
CSTBT chip, and error output is possible from all each con-
servation upper and lower arm of IPM.
c) New small package
Reduce the package size by 10%, thickness by 22% from
S-DASH series.
• 3φ 75A, 600V Current-sense IGBT type inverter
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short-
circuit, over-temperature & under-voltage (P-Fo available
from upper arm devices)
• Acoustic noise-less 5.5kW/7.5kW class inverter application
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
Dimensions in mm
11
120
106
7
3.25
16
19.75
16
16
16
15.25
6-2
2-φ5.5
3
19.75
3-2
3-2
3-2
MOUNTING HOLES
1
5
9
13
19
B
U
V
W
6-M5 NUTS
22 +–
1
10.75
12
0.5
32.75
23
23
23
Terminal code
1. VUPC 11. WP
19-■0.5
2. UFO
3. UP
12. VWP1
13. VNC
4. VUP1 14. VN1
5. VVPC 15. NC
6. VFO
7. VP
16. UN
17. VN
8. VVP1 18. WN
9. VWPC 19. Fo
10. WFO
Apr. 2004
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
INTERNAL FUNCTIONS BLOCK DIAGRAM
W
P
V
WP1
V
P
V
VP1
UP
VUP1
NC Fo
V
NC
W
N
V
N1
V
N
UN
V
WPC
WF
O
V
VPC
VF
O
V
UPC
UFO
Gnd In Fo Vcc
Gnd In Fo Vcc
Gnd In Fo Vcc
Gnd In Fo Vcc
Gnd In Fo Vcc
Gnd In Fo Vcc
Gnd Si Out OT
Gnd Si Out OT
Gnd Si Out OT
Gnd Si Out OT
Gnd Si Out OT
Gnd Si Out OT
NC
N
W
V
U
P
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
VCES
±IC
Parameter
Collector-Emitter Voltage
Collector Current
Condition
Ratings
600
Unit
V
VD = 15V, VCIN = 15V
TC = 25°C
75
A
±ICP
PC
Collector Current (Peak)
Collector Dissipation
Junction Temperature
TC = 25°C
150
A
TC = 25°C
(Note-1)
297
W
°C
Tj
–20 ~ +150
CONTROL PART
Symbol
Parameter
Condition
Applied between : VUP1-VUPC
VVP1-VVPC, VWP1-VWPC, VN1-VNC
Applied between : UP-VUPC, VP-VVPC
Ratings
20
Unit
V
VD
Supply Voltage
VCIN
20
V
Input Voltage
WP-VWPC, UN • VN • WN-VNC
Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC
FO-VNC
VFO
IFO
Fault Output Supply Voltage
Fault Output Current
20
20
V
Sink current at UFO, VFO, WFO, FO terminals
mA
Apr. 2004
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
TOTAL SYSTEM
Ratings
Unit
Symbol
Parameter
Condition
Supply Voltage Protected by
SC
VD = 13.5 ~ 16.5V, Inverter Part,
Tj = +125°C Start
400
500
V
V
VCC(PROT)
VCC(surge) Supply Voltage (Surge)
Applied between : P-N, Surge value
Module Case Operating
Temperature
TC
(Note-1)
–20 ~ +100
°C
Storage Temperature
Isolation Voltage
Tstg
Viso
–40 ~ +125
°C
60Hz, Sinusoidal, Charged part to Base, AC 1 min.
2500
Vrms
(Note-1) Tc (base plate) measurement point is below.
W
U
B V
Top view
Tc
THERMAL RESISTANCES
Limits
Typ.
—
Condition
Symbol
Unit
Parameter
Min.
—
Max.
0.32*
0.53*
0.42
Inverter IGBT part (per 1/6)
Inverter FWDi part (per 1/6)
Inverter IGBT part (per 1/6)
Inverter FWDi part (per 1/6)
Case to fin, (per 1 module)
Thermal grease applied
(Note-2)
(Note-2)
(Note-1)
(Note-1)
Rth(j-c)Q
Rth(j-c)F
Rth(j-c)Q
Rth(j-c)F
Junction to case Thermal
Resistances
—
—
—
—
°C/W
0.69
—
—
Rth(c-f)
Contact Thermal Resistance
0.038
—
—
(Note-1)
* If you use this value, Rth(f-a) should be measured just under the chips.
(Note-2) Tc (under the chip) measurement point is below.
(unit : mm)
WN
arm
UP
VP
WP
UN
VN
axis
IGBT FWDi IGBT FWDi IGBT FWDi IGBT FWDi IGBT FWDi IGBT FWDi
X
Y
28.7
28.7
0.8
65.2
65.2
2.5
85.3
85.3
2.5
38.0
4.6
38.0
55.4
4.6
55.4
75.5
4.6
75.5
–6.6
–6.6
–6.6
–4.5
–4.5
–4.5
Bottom view
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Limits
Typ.
1.6
1.5
2.2
1.0
0.2
0.4
1.2
0.5
—
Unit
Condition
Symbol
VCE(sat)
Parameter
Collector-Emitter
Min.
Max.
2.1
2.0
3.3
2.4
0.4
1.0
2.5
1.0
1
—
—
—
0.5
—
—
—
—
—
—
VD = 15V, IC = 75A
VCIN = 0V, Pulsed
Tj = 25°C
V
V
Saturation Voltage
(Fig. 1) Tj = 125°C
–IC = 75A, VD = 15V, VCIN = 15V
(Fig. 2)
VEC
ton
FWDi Forward Voltage
VD = 15V, VCIN = 0V↔15V
VCC = 300V, IC = 75A
Tj = 125°C
trr
µs
tc(on)
toff
Switching Time
Inductive Load
(Fig. 3,4)
Tj = 25°C
Tj = 125°C
tc(off)
Collector-Emitter
Cutoff Current
ICES
V
CE = VCES, VCIN = 15V
(Fig. 5)
mA
—
10
Apr. 2004
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
CONTROL PART
Limits
Unit
Symbol
Parameter
Circuit Current
Condition
Min.
—
Typ.
15
5
Max.
25
VN1-VNC
ID
VD = 15V, VCIN = 15V
mA
VXP1-VXPC
—
10
Input ON Threshold Voltage
Input OFF Threshold Voltage
Short Circuit Trip Level
Short Circuit Current Delay
Time
Vth(ON)
Vth(OFF)
SC
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
1.2
1.7
150
1.5
2.0
—
1.8
2.3
—
V
A
UN • VN • WN-VNC
–20≤ Tj ≤ 125°C, VD = 15V
(Fig. 3,6)
(Fig. 3,6)
Trip level
VD = 15V
µs
toff(SC)
—
0.2
—
VD = 15V
OT
135
—
145
125
12.0
12.5
—
—
—
°C
V
Over Temperature Protection
Detect Tj of IGBT chip
Reset level
Trip level
OTr
Supply Circuit Under-Voltage
Protection
UV
11.5
—
12.5
—
–20 ≤ Tj ≤ 125°C
VD = 15V, VFO = 15V
VD = 15V
Reset level
UVr
IFO(H)
IFO(L)
—
0.01
15
mA
ms
(Note-3)
(Note-3)
Fault Output Current
—
10
Minimum Fault Output Pulse
Width
tFO
1.0
1.8
—
(Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to
protect it.
MECHANICAL RATINGS AND CHARACTERISTICS
Limits
Typ.
3.0
Condition
Unit
Parameter
Mounting torque
Symbol
Min.
2.5
2.5
—
Max.
3.5
3.5
—
—
—
—
Main terminal
Mounting part
screw : M5
screw : M5
N • m
3.0
Mounting torque
Weight
N • m
g
380
—
RECOMMENDED CONDITIONS FOR USE
Symbol Parameter
Supply Voltage
Condition
Recommended value
Unit
V
VCC
Applied across P-N terminals
≤ 400
Applied between : VUP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC
VD
Control Supply Voltage
15 ± 1.5
V
V
(Note-4)
Input ON Voltage
Input OFF Voltage
VCIN(ON)
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
≤ 0.8
≥ 9.0
VCIN(OFF)
UN • VN • WN-VNC
kHz
µs
PWM Input Frequency
fPWM
tdead
Using Application Circuit of Fig. 8
≤ 20
Arm Shoot-through
Blocking Time
For IPM’s each input signals
(Fig. 7)
≥ 2.0
(Note-4) With ripple satisfying the following conditions dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak
Apr. 2004
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W)
P, (U,V,W)
IN
IN
Fo
Fo
Ic
–Ic
V
V
VCIN
VCIN
(15V)
(0V)
U,V,W, (N)
U,V,W, (N)
VD (all)
VD (all)
Fig. 1 VCE(sat) Test
Fig. 2 VEC Test
a) Lower Arm Switching
P
Fo
trr
VCE
Signal input
(Upper Arm)
VCIN
Irr
Ic
U,V,W
(15V)
Vcc
CS
90%
Fo
Signal input
(Lower Arm)
90%
10%
VCIN
N
P
10%
VD (all)
Fo
Ic
10%
10%
b) Upper Arm Switching
tc(on)
tc(off)
Signal input
VCIN
VCIN
td(on)
(Upper Arm)
U,V,W
Vcc
CS
tr
td(off)
tf
Fo
VCIN
(15V)
Signal input
(Lower Arm)
(ton= td(on) + tr)
(toff= td(off) + tf)
N
Ic
VD (all)
Fig. 3 Switching time and SC test circuit
Fig. 4 Switching time test waveform
VCIN
Short Circuit Current
P, (U,V,W)
A
Constant Current
SC
IN
Fo
Pulse
VCE
VCIN
(15V)
Ic
U,V,W, (N)
Fo
VD (all)
toff(SC)
Fig. 5 ICES Test
Fig. 6 SC test waveform
IPM’ input signal VCIN
(Upper Arm)
1.5V
2V
t
1.5V
t
0V
IPM’ input signal VCIN
(Lower Arm)
0V
2V
1.5V
2V
t
t
dead
dead
t
dead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead time measurement point example
Apr. 2004
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
P
≥10µ
20kΩ
VUP1
Fo
OT
OUT
Vcc
Fo
→
Rfo
Rfo
Rfo
+
VD
IF
Si
UP
–
In
U
VUPC
GND GND
≥0.1µ
VVP1
Fo
OT
OUT
Vcc
Fo
Si
V
D
D
VP
In
V
VVPC
GND GND
M
VWP1
Fo
OT
OUT
Vcc
Fo
Si
V
WP
In
W
VWPC
GND GND
20kΩ
OT
Vcc
→
OUT
≥10µ
Fo
IF
Si
UN
In
GND GND
≥0.1µ
N
OT
20kΩ
Vcc
→
OUT
≥10µ
Fo
IF
Si
VN
In
GND GND
≥0.1µ
20kΩ
VN1
WN
OT
Vcc
→
≥10µ
OUT
Si
In
Fo
IF
VD
GND GND
NC
≥0.1µ
VNC
NC
Fo
1kΩ
5V
Rfo
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
NOTES FOR STABLE AND SAFE OPERATION ;
Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the
•
stray capacity between the input and output wirings of opto-coupler.
Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.
•
Fast switching opto-couplers: tPLH, tPHL ≤ 0.8µs, Use High CMR type.
•
Slow switching opto-coupler: CTR > 100%
•
Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
•
power supply.
Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
•
terminal.
Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
•
and improve noise immunity of the system.
Apr. 2004
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