PM75CLA120 [MITSUBISHI]

INTELLIGENT POWER MODULES; 智能功率模块
PM75CLA120
型号: PM75CLA120
厂家: Mitsubishi Group    Mitsubishi Group
描述:

INTELLIGENT POWER MODULES
智能功率模块

文件: 总6页 (文件大小:95K)
中文:  中文翻译
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MITSUBISHI <INTELLIGENT POWER MODULES>  
PM75CLA120  
FLAT-BASE TYPE  
INSULATED PACKAGE  
PM75CLA120  
FEATURE  
a) Adopting new 5th generation IGBT (CSTBT) chip, which  
performance is improved by 1µm fine rule process.  
For example, typical Vce(sat)=1.9V @Tj=125°C  
b) I adopt the over-temperature conservation by Tj detection of  
CSTBT chip, and error output is possible from all each con-  
servation upper and lower arm of IPM.  
c) New small package  
Reduce the package size by 10%, thickness by 22% from  
S-DASH series.  
• 3φ 75A, 1200V Current-sense IGBT type inverter  
• Monolithic gate drive & protection logic  
• Detection, protection & status indication circuits for, short-  
circuit, over-temperature & under-voltage (P-Fo available  
from upper arm devices)  
• Acoustic noise-less 11kW/15kW class inverter application  
APPLICATION  
General purpose inverter, servo drives and other motor controls  
PACKAGE OUTLINES  
Dimensions in mm  
120  
106  
7
3.25  
19.75  
16  
16  
16  
15.25  
6-2  
2-φ5.5  
3-2  
3-2  
3-2  
MOUNTING HOLES  
Terminal code  
1. VUPC 11. WP  
2. UFO  
3. UP  
12. VWP1  
13. VNC  
4. VUP1 14. VN1  
5. VVPC 15. NC  
B
U
V
W
6. VFO  
7. VP  
16. UN  
17. VN  
6-φ6  
8. VVP1 18. WN  
9. VWPC 19. Fo  
10. WFO  
10.75  
32.75  
23  
23  
23  
19- 0.5  
Oct. 2003  
MITSUBISHI <INTELLIGENT POWER MODULES>  
PM75CLA120  
FLAT-BASE TYPE  
INSULATED PACKAGE  
INTERNAL FUNCTIONS BLOCK DIAGRAM  
W
P
VWP1  
V
P
VVP1  
UP  
VUP1  
NC Fo  
V
NC  
W
N
VN1  
VN  
UN  
V
WPC  
WF  
O
VVPC  
VF  
O
V
UPC  
UFO  
Gnd In Fo Vcc  
Gnd In Fo Vcc  
Gnd In Fo Vcc  
Gnd In Fo Vcc  
Gnd In Fo Vcc  
Gnd In Fo Vcc  
Gnd Si Out OT  
Gnd Si Out OT  
Gnd Si Out OT  
Gnd Si Out OT  
Gnd Si Out OT  
Gnd Si Out OT  
NC  
N
W
V
U
P
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)  
INVERTER PART  
Symbol  
VCES  
±IC  
Parameter  
Collector-Emitter Voltage  
Collector Current  
Condition  
Ratings  
1200  
75  
Unit  
V
VD = 15V, VCIN = 15V  
TC = 25°C  
A
±ICP  
PC  
Collector Current (Peak)  
Collector Dissipation  
Junction Temperature  
TC = 25°C  
150  
A
TC = 25°C  
(Note-2)  
457  
W
°C  
Tj  
20 ~ +150  
CONTROL PART  
Symbol  
Parameter  
Supply Voltage  
Condition  
Applied between : VUP1-VUPC  
VVP1-VVPC, VWP1-VWPC, VN1-VNC  
Applied between : UP-VUPC, VP-VVPC  
Ratings  
20  
Unit  
V
VD  
VCIN  
20  
V
Input Voltage  
WP-VWPC, UN VN WN-VNC  
Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC  
FO-VNC  
VFO  
IFO  
Fault Output Supply Voltage  
Fault Output Current  
20  
20  
V
Sink current at UFO, VFO, WFO, FO terminals  
mA  
Oct. 2003  
MITSUBISHI <INTELLIGENT POWER MODULES>  
PM75CLA120  
FLAT-BASE TYPE  
INSULATED PACKAGE  
TOTAL SYSTEM  
Ratings  
Unit  
Symbol  
Parameter  
Condition  
Supply Voltage Protected by  
SC  
VD = 13.5 ~ 16.5V, Inverter Part,  
Tj = +125°C Start  
VCC(PROT)  
800  
1000  
V
V
VCC(surge) Supply Voltage (Surge)  
Applied between : P-N, Surge value  
Module Case Operating  
Temperature  
TC  
(Note-2)  
20 ~ +100  
°C  
Storage Temperature  
Isolation Voltage  
Tstg  
Viso  
40 ~ +125  
°C  
60Hz, Sinusoidal, Charged part to Base, AC 1 min.  
2500  
Vrms  
THERMAL RESISTANCES  
Limits  
Typ.  
Condition  
Symbol  
Unit  
Parameter  
Min.  
Max.  
0.21  
0.30  
0.27  
0.39  
Inverter IGBT (per 1 element)  
Inverter FWDi (per 1 element)  
Inverter IGBT (per 1 element)  
Inverter FWDi (per 1 element)  
Case to fin, (per 1 module)  
Thermal grease applied  
(Note-1)  
Rth(j-c)Q  
Rth(j-c)F  
Rth(j-c)Q  
Rth(j-c)F  
(Note-1)  
(Note-2)  
(Note-2)  
Junction to case Thermal  
Resistances  
°C/W  
Rth(c-f)  
Contact Thermal Resistance  
0.038  
(Note-1) TC measurement point is just under the chips (Bottom view).  
If you use this value, Rth(f-a) should be measured just under the chips.  
(Note-2) TC measurement point is as shown below (Top view).  
Table1 : TC measurement point of just under the chips.  
(Unit : mm)  
WN  
arm  
UP  
VP  
WP  
UN  
VN  
axis  
IGBT FWDi IGBT FWDi IGBT FWDi IGBT FWDi IGBT FWDi IGBT FWDi  
X
Y
28.3  
28.3  
2.0  
65.0  
65.0  
2.0  
87.0  
87.0  
2.0  
39.3  
6.2  
39.3  
54.0  
6.2  
54.0  
76.0  
6.2  
76.0  
8.2  
8.2  
8.2  
4.0  
4.0  
4.0  
W
U
B V  
Bottom view  
Top view  
TC (Base plate)  
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)  
INVERTER PART  
Limits  
Typ.  
1.8  
1.9  
2.5  
1.0  
0.5  
0.4  
2.0  
0.7  
Unit  
Condition  
Symbol  
VCE(sat)  
Parameter  
Collector-Emitter  
Min.  
Max.  
2.3  
2.4  
3.5  
2.5  
0.8  
1.0  
3.0  
1.2  
1
0.5  
VD = 15V, IC = 75A  
VCIN = 0V, Pulsed  
Tj = 25°C  
(Fig. 1) Tj = 125°C  
IC = 75A, VD = 15V, VCIN = 15V  
V
V
Saturation Voltage  
(Fig. 2)  
VEC  
ton  
FWDi Forward Voltage  
VD = 15V, VCIN = 0V15V  
VCC = 600V, IC = 75A  
Tj = 125°C  
trr  
µs  
tc(on)  
toff  
Switching Time  
Inductive Load  
(Fig. 3,4)  
Tj = 25°C  
Tj = 125°C  
tc(off)  
Collector-Emitter  
Cutoff Current  
ICES  
V
CE = VCES, VCIN = 15V  
(Fig. 5)  
mA  
10  
Oct. 2003  
MITSUBISHI <INTELLIGENT POWER MODULES>  
PM75CLA120  
FLAT-BASE TYPE  
INSULATED PACKAGE  
CONTROL PART  
Limits  
Unit  
Symbol  
Parameter  
Circuit Current  
Condition  
Min.  
Typ.  
15  
5
Max.  
25  
VN1-VNC  
ID  
VD = 15V, VCIN = 15V  
mA  
VXP1-VXPC  
10  
Input ON Threshold Voltage  
Input OFF Threshold Voltage  
Short Circuit Trip Level  
Short Circuit Current Delay  
Time  
Vth(ON)  
Vth(OFF)  
SC  
1.2  
1.7  
150  
1.5  
2.0  
1.8  
2.3  
Applied between : UP-VUPC, VP-VVPC, WP-VWPC  
V
A
UN VN WN-VNC  
20 Tj 125°C, VD = 15V  
(Fig. 3,6)  
(Fig. 3,6)  
Trip level  
VD = 15V  
µs  
toff(SC)  
0.2  
OT  
135  
145  
125  
12.0  
12.5  
155  
Over Temperature Protection Detect Tj of IGBT chip  
°C  
V
Reset level  
Trip level  
OTr  
Supply Circuit Under-Voltage  
20 Tj 125°C  
UV  
11.5  
12.5  
Protection  
Reset level  
UVr  
IFO(H)  
IFO(L)  
0.01  
15  
VD = 15V, VCIN = 15V  
VD = 15V  
(Note-3)  
(Note-3)  
mA  
ms  
Fault Output Current  
10  
Minimum Fault Output Pulse  
Width  
tFO  
1.0  
1.8  
(Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to  
protect it.  
MECHANICAL RATINGS AND CHARACTERISTICS  
Limits  
Condition  
Unit  
Parameter  
Mounting torque  
Symbol  
Typ.  
3.0  
Min.  
2.5  
2.5  
Max.  
3.5  
3.5  
Main terminal  
Mounting part  
screw : M5  
screw : M5  
N m  
3.0  
Mounting torque  
Weight  
N m  
g
380  
RECOMMENDED CONDITIONS FOR USE  
Symbol Parameter  
Supply Voltage  
Condition  
Recommended value  
Unit  
V
VCC  
Applied across P-N terminals  
800  
Applied between : VUP1-VUPC, VVP1-VVPC  
VWP1-VWPC, VN1-VNC  
VD  
Control Supply Voltage  
15.0 ± 1.5  
V
(Note-4)  
Input ON Voltage  
Input OFF Voltage  
PWM Input Frequency  
Arm Shoot-through  
Blocking Time  
VCIN(ON)  
VCIN(OFF)  
fPWM  
Applied between : UP-VUPC, VP-VVPC, WP-VWPC  
UN VN WN-VNC  
0.8  
9.0  
20  
V
kHz  
µs  
Using Application Circuit of Fig. 8  
tdead  
For IPMs each input signals  
(Fig. 7)  
2.5  
(Note-4) With ripple satisfying the following conditions dv/dt swing ≤ ±5V/µs, Variation 2V peak to peak  
Oct. 2003  
MITSUBISHI <INTELLIGENT POWER MODULES>  
PM75CLA120  
FLAT-BASE TYPE  
INSULATED PACKAGE  
PRECAUTIONS FOR TESTING  
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-  
sponding supply voltage and each input signal should be kept off state.  
After this, the specified ON and OFF level setting for each input signal should be done.  
2. When performing SCtests, the turn-off surge voltage spike at the corresponding protection operation should not be al-  
lowed to rise above VCES rating of the device.  
(These test should not be done by using a curve tracer or its equivalent.)  
P, (U,V,W)  
P, (U,V,W)  
IN  
IN  
Fo  
Fo  
Ic  
Ic  
V
V
V
CIN  
(15V)  
V
CIN  
(0V)  
U,V,W, (N)  
U,V,W, (N)  
V
D
(all)  
VD (all)  
Fig. 1 VCE(sat) Test  
Fig. 2 VEC Test  
a) Lower Arm Switching  
P
Fo  
trr  
Irr  
V
CE  
Signal input  
(Upper Arm)  
V
CIN  
Ic  
U,V,W  
(
15V)  
Vcc  
CS  
90%  
Fo  
Signal input  
(Lower Arm)  
90%  
V
CIN  
N
P
10%  
V
D
(all)  
Fo  
Ic  
10%  
10%  
10%  
b) Upper Arm Switching  
tc (on)  
tc (off)  
Signal input  
(Upper Arm)  
V
CIN  
V
CIN  
U,V,W  
Vcc  
C
S
td (on)  
tr  
td (off)  
tf  
Fo  
V
15V)  
CIN  
Signal input  
(Lower Arm)  
(
(ton= td (on) + tr)  
(toff= td (off) + tf)  
N
Ic  
V
D
(all)  
Fig. 3 Switching time and SC test circuit  
Fig. 4 Switching time test waveform  
V
CIN  
Short Circuit Current  
P, (U,V,W)  
A
Constant Current  
SC  
IN  
Fo  
Pulse  
V
CE  
V
CIN  
(15V)  
Ic  
U,V,W, (N)  
Fo  
V
D
(all)  
toff(SC)  
Fig. 5 ICES Test  
Fig. 6 SC test waveform  
IPMinput signal  
(Upper Arm)  
0V  
V
V
CIN  
CIN  
1.5V  
2V  
t
1.5V  
t
IPMinput signal  
(Lower Arm)  
0V  
2V  
1.5V  
2V  
t
t
dead  
dead  
t
dead  
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value  
Fig. 7 Dead time measurement point example  
Oct. 2003  
MITSUBISHI <INTELLIGENT POWER MODULES>  
PM75CLA120  
FLAT-BASE TYPE  
INSULATED PACKAGE  
P
10µ  
20kΩ  
VUP1  
Fo  
OT  
OUT  
Vcc  
Fo  
Rfo  
Rfo  
Rfo  
+
VD  
IF  
Si  
UP  
In  
U
VUPC  
GND GND  
0.1µ  
VVP1  
Fo  
OT  
OUT  
Vcc  
Fo  
Si  
V
D
D
VP  
In  
V
VVPC  
GND GND  
M
VWP1  
Fo  
OT  
OUT  
Vcc  
Fo  
Si  
V
WP  
In  
W
VWPC  
GND GND  
20kΩ  
OT  
Vcc  
OUT  
10µ  
Fo  
IF  
Si  
UN  
In  
GND GND  
0.1µ  
N
OT  
20kΩ  
Vcc  
OUT  
10µ  
Fo  
IF  
Si  
VN  
In  
GND GND  
0.1µ  
20kΩ  
VN1  
WN  
OT  
Vcc  
10µ  
OUT  
Si  
In  
Fo  
IF  
VD  
GND GND  
NC  
0.1µ  
VNC  
NC  
Fo  
1kΩ  
5V  
Rfo  
: Interface which is the same as the U-phase  
Fig. 8 Application Example Circuit  
NOTES FOR STABLE AND SAFE OPERATION ;  
Design the PCB pattern to minimize wiring length between opto-coupler and IPMs input terminal, and also to minimize the  
stray capacity between the input and output wirings of opto-coupler.  
Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.  
Fast switching opto-couplers: tPLH, tPHL 0.8µs, Use High CMR type.  
Slow switching opto-coupler: CTR > 100%  
Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the  
power supply.  
Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N  
terminal.  
Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line  
and improve noise immunity of the system.  
Oct. 2003  

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