APT37F50B_09 [MICROSEMI]
N-Channel FREDFET; N沟道FREDFET型号: | APT37F50B_09 |
厂家: | Microsemi |
描述: | N-Channel FREDFET |
文件: | 总4页 (文件大小:300K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
APT37F50B
APT37F50S
500V,ꢀ37A,ꢀ0.15ΩꢀMax,ꢀt ,ꢀ≤250ns
rr
N-ChannelꢀFREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
D3PAK
This 'FREDFET' version has a drain-source (body) diode that has been optimized for
high reliability in ZVS phase shifted bridge and other circuits through reduced t , soft
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recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly
reduced ratio of C /C result in excellent noise immunity and low switching loss. The
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APT37F50B
APT37F50S
intrinsic gate resistance and capacitance of the poly-silicon gate structure help control
di/dt during switching, resulting in low EMI and reliable paralleling, even when switching
at very high frequency.
D
S
Single die FREDFET
G
FEATURES
TYPICAL APPLICATIONS
•ꢀ ZVSꢀphaseꢀshiftedꢀandꢀotherꢀfullꢀbridge
•ꢀꢀFastꢀswitchingꢀwithꢀlowꢀEMI
•ꢀꢀHalfꢀbridge
ꢀ •ꢀꢀLowꢀt ꢀforꢀhighꢀreliability
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•ꢀꢀPFCꢀandꢀotherꢀboostꢀconverter
•ꢀ Buckꢀconverter
ꢀ •ꢀꢀUltraꢀlowꢀC ꢀforꢀimprovedꢀnoiseꢀimmunity
rss
ꢀ •ꢀꢀLowꢀgateꢀcharge
ꢀ •ꢀꢀAvalancheꢀenergyꢀrated
•ꢀꢀRoHSꢀcompliant
•ꢀꢀSingleꢀandꢀtwoꢀswitchꢀforward
•ꢀꢀFlyback
Absolute Maximum Ratings
Symbol Parameter
Unit
Ratings
37
Continuous Drain Current @ TC = 25°C
ID
Continuous Drain Current @ TC = 1ꢀꢀ°C
24
A
Pulsed Drain Current 1
IDM
VGS
EAS
IAR
115
3ꢀ
V
mJ
A
Gate-Source Voltage
Single Pulse Avalanche Energy 2
Avalanche Current, Repetitive or Non-Repetitive
78ꢀ
18
Thermal and Mechanical Characteristics
Symbol Characteristic
Min
Typ
Max
52ꢀ
Unit
PD
Total Power Dissipation @ TC = 25°C
W
RθJC
ꢀ.24
Junction to Case Thermal Resistance
°C/W
°C
RθCS
ꢀ.11
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
-55
15ꢀ
3ꢀꢀ
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 1ꢀ Seconds (1.6mm from case)
oz
g
ꢀ.22
6.2
WT
Package Weight
in·lbf
N·m
1ꢀ
Torque
Mounting Torque ( TO-247 Package), 6-32 or M3 screw
1.1
MicrosemiWebsite-http://www.microsemi.com
Static Characteristics
T ꢀ=ꢀ25°Cꢀunlessꢀotherwiseꢀspecified
J
APT37F50B_S
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Symbol
VBR(DSS)
V
= ꢀV, I = 25ꢀµA
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature Coefficient
Drain-Source On Resistance 3
Gate-Source Threshold Voltage
Threshold Voltage Temperature Coefficient
5ꢀꢀ
GS
D
∆VBR(DSS)/∆TJ
Reference to 25°C, I = 25ꢀµA
D
V/°C
Ω
V
ꢀ.6ꢀ
ꢀ.13
4
V
= 1ꢀV, I = 18A
D
RDS(on)
VGS(th)
ꢀ.15
5
GS
2.5
V
= VDS, I = 1mA
D
GS
∆VGS(th)/∆TJ
mV/°C
-1ꢀ
V
= 6ꢀꢀV
= ꢀV
T = 25°C
J
25ꢀ
1ꢀꢀꢀ
1ꢀꢀ
DS
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
µA
nA
V
T = 125°C
J
GS
V
=
3ꢀV
GS
Dynamic Characteristics
T ꢀ=ꢀ25°Cꢀunlessꢀotherwiseꢀspecified
J
Symbol
Parameter
Test Conditions
Min
Typ
27
Max
Unit
gfs
V
= 5ꢀV, I = 18A
S
Forward Transconductance
Input Capacitance
DS
D
Ciss
Crss
Coss
571ꢀ
75
V
= ꢀV, V = 25V
DS
GS
Reverse Transfer Capacitance
Output Capacitance
f = 1MHz
615
pF
4
Co(cr)
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
355
18ꢀ
V
= ꢀV, V = ꢀV to 333V
DS
GS
5
Co(er)
Qg
Qgs
Qgd
td(on)
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
145
32
65
25
29
65
21
V
= ꢀ to 1ꢀV, I = 18A,
GS
D
nC
ns
V
= 25ꢀV
DS
ResistiveꢀSwitching
V = 333V, I = 18A
DD
tr
td(off)
tf
D
R
= 4.7Ω 6 , V
= 15V
GG
G
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Continuous Source Current
(Body Diode)
D
S
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
IS
37
A
G
Pulsed Source Current
(Body Diode) 1
ISM
VSD
trr
115
I
= 18A, T = 25°C, V
= ꢀV
Diode Forward Voltage
1.ꢀ
25ꢀ
45ꢀ
V
SD
J
GS
T = 25°C
J
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Peak Recovery dv/dt
ns
T = 125°C
J
3
I
= 18A
T = 25°C
J
ꢀ.88
2.18
8.4
SD
Qrr
µC
A
diSD/dt = 1ꢀꢀA/µs
= 1ꢀꢀV
T = 125°C
J
V
T = 25°C
J
DD
Irrm
T = 125°C
J
11.8
I
≤ 18A, di/dt ≤1ꢀꢀꢀA/µs, V = 333V,
SD
DD
dv/dt
V/ns
2ꢀ
T = 125°C
J
1
2
3
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at TJ = 25°C, L = 4.81mH, RG = 25Ω, IAS = 18A.
Pulse test: Pulse Width < 38ꢀµs, duty cycle < 2%.
4
5
Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -1.33E-7/VDS^2 + 3.ꢀ6E-8/VDS + 8.83E-11.
6
RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemiꢀreservesꢀtheꢀrightꢀtoꢀchange,ꢀwithoutꢀnotice,ꢀtheꢀspecificationsꢀandꢀinformationꢀcontainedꢀherein.
APT37F50B_S
7ꢀ
6ꢀ
5ꢀ
4ꢀ
3ꢀ
2ꢀ
14ꢀ
12ꢀ
1ꢀꢀ
8ꢀ
V
= 1ꢀV
T
= 125°C
GS
J
V
GS= 7 &,1ꢀV
6.5V
TJ = -55°C
6V
TJ = 25°C
6ꢀ
5.5V
5V
4ꢀ
TJ = 15ꢀ°C
1ꢀ
ꢀ
2ꢀ
ꢀ
TJ = 125°C
ꢀ
5
1ꢀ
15
2ꢀ
25
ꢀ
ꢀ
ꢀ
5
1ꢀ
15
2ꢀ
25
3ꢀ
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS(ON)
DS
Figureꢀ1,ꢀꢀOutputꢀCharacteristicsꢀꢀ
Figureꢀ2,ꢀꢀOutputꢀCharacteristics
2.5
2.ꢀ
1.5
1.ꢀ
12ꢀ
1ꢀꢀ
8ꢀ
6ꢀ
4ꢀ
2ꢀ
ꢀ
NORMALIZED TO
= 1ꢀV 18A
VDS> ID(ON)
x RDS(ON) MAX.
25ꢀµSEC. PULSE TEST
@ <ꢀ.5 % DUTY CYCLE
V
@
GS
TJ = -55°C
TJ = 25°C
TJ = 125°C
ꢀ.5
ꢀ
-55 -25
ꢀ
25 5ꢀ 75 1ꢀꢀ 125 15ꢀ
1
2
3
4
5
6
7
8
T , JUNCTION TEMPERATURE (°C)
V
, GATE-TO-SOURCE VOLTAGE (V)
J
GS
Figureꢀ3,ꢀꢀR
ꢀvsꢀJunctionꢀTemperatureꢀ
Figureꢀ4,ꢀꢀTransferꢀCharacteristics
DS(ON)
1ꢀ,ꢀꢀꢀ
1ꢀꢀꢀ
45
4ꢀ
35
3ꢀ
25
2ꢀ
15
1ꢀ
Ciss
TJ = -55°C
TJ = 25°C
TJ = 125°C
Coss
1ꢀꢀ
1ꢀ
Crss
5
ꢀ
ꢀ
5
1ꢀ
15
2ꢀ
25
3ꢀ
35
1ꢀꢀ
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
2ꢀꢀ
3ꢀꢀ
4ꢀꢀ
5ꢀꢀ
I , DRAIN CURRENT (A)
V
D
Figureꢀ5,ꢀꢀGainꢀvsꢀDrainꢀCurrentꢀ
Figureꢀ6,ꢀCapacitanceꢀvsꢀDrain-to-SourceꢀVoltage
12ꢀ
16
14
12
1ꢀ
8
I
= 18A
D
1ꢀꢀ
8ꢀ
6ꢀ
4ꢀ
2ꢀ
ꢀ
VDS = 12ꢀV
VDS = 3ꢀꢀV
TJ = 25°C
6
VDS = 48ꢀV
TJ = 15ꢀ°C
4
2
ꢀ
ꢀ
5ꢀ
1ꢀꢀ
15ꢀ
2ꢀꢀ
25ꢀ
ꢀ
ꢀ.3
, SOURCE-TO-DRAIN VOLTAGE (V)
SD
ꢀ.6
ꢀ.9
1.2
1.5
Q , TOTAL GATE CHARGE (nC)
V
g
Figureꢀ7,ꢀGateꢀChargeꢀvsꢀGate-to-SourceꢀVoltageꢀ
Figureꢀ8,ꢀReverseꢀDrainꢀCurrentꢀvsꢀSource-to-DrainꢀVoltage
APT37F50B_S
2ꢀꢀ
1ꢀꢀ
2ꢀꢀ
1ꢀꢀ
I
I
DM
DM
R
ds(on)
1ꢀ
1
1ꢀ
1
13µs
1ꢀꢀµs
13µs
1ꢀꢀµs
1ms
1ꢀms
1ms
1ꢀms
1ꢀꢀms
DC line
R
ds(on)
T = 15ꢀ°C
J
TC = 25°C
Scaling for Different Case & Junction
Temperatures:
1ꢀꢀms
DC line
T = 125°C
J
I
D = ID(T = 25°C)*(T - TC)/125
TC = 75°C
J
C
ꢀ.1
ꢀ.1
1
1ꢀ
1ꢀꢀ
8ꢀꢀ
1
1ꢀ
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
1ꢀꢀ
8ꢀꢀ
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
DS
Figureꢀ9,ꢀForwardꢀSafeꢀOperatingꢀAreaꢀ
Figureꢀ10,ꢀMaximumꢀForwardꢀSafeꢀOperatingꢀArea
ꢀ.25
ꢀ.2ꢀ
ꢀ.15
ꢀ.1ꢀ
D = ꢀ.9
ꢀ.7
ꢀ.5
Note:
t
1
ꢀ.3
t
2
t
= Pulse Duration
t
1
ꢀ.ꢀ5
ꢀ
1
t
/
2
Duty Factor D =
Peak T = P
SINGLE PULSE
ꢀ.1
x Z
+ T
θJC C
J
DM
ꢀ.ꢀ5
1ꢀ-5
1ꢀ-4
1ꢀ-3
1ꢀ-2
1ꢀ-1
1.ꢀ
RECTANGULAR PULSE DURATION (seconds)
Figureꢀ11.ꢀMaximumꢀEffectiveꢀTransientꢀThermalꢀImpedanceꢀJunction-to-CaseꢀvsꢀPulseꢀDuration
3
D PAKꢀPackageꢀOutline
TO-247ꢀ(B)ꢀPackageꢀOutline
e3
1ꢀꢀ% Sn Plated
4.98 (.196)
5.ꢀ8 (.2ꢀꢀ)
1.47 (.ꢀ58)
1.57 (.ꢀ62)
4.69 (.185)
5.31 (.2ꢀ9)
15.95 (.628)
16.ꢀ5(.632)
13.41 (.528)
13.51(.532)
15.49 (.61ꢀ)
16.26 (.64ꢀ)
1.ꢀ4 (.ꢀ41)
1.15(.ꢀ45)
1.49 (.ꢀ59)
2.49 (.ꢀ98)
5.38 (.212)
6.15 (.242) BSC
6.2ꢀ (.244)
Revised
8/29/97
11.51 (.453)
11.61 (.457)
13.79 (.543)
13.99(.551)
2ꢀ.8ꢀ (.819)
21.46 (.845)
3.5ꢀ (.138)
3.81 (.15ꢀ)
ꢀ.46 (.ꢀ18)
ꢀ.56 (.ꢀ22)
{3 Plcs}
1.27 (.ꢀ5ꢀ)
1.4ꢀ (.ꢀ55)
ꢀ.ꢀ2ꢀ (.ꢀꢀ1)
ꢀ.178 (.ꢀꢀ7)
2.87 (.113)
3.81 (.15ꢀ)
4.5ꢀ (.177) Max.
3.12 (.123)
1.98 (.ꢀ78)
2.ꢀ8 (.ꢀ82)
4.ꢀ6 (.16ꢀ)
2.67 (.1ꢀ5)
2.84 (.112)
(Base of Lead)
1.65 (.ꢀ65)
2.13 (.ꢀ84)
1.22 (.ꢀ48)
1.32 (.ꢀ52)
ꢀ.4ꢀ (.ꢀ16)
ꢀ.79 (.ꢀ31)
19.81 (.78ꢀ)
2ꢀ.32 (.8ꢀꢀ)
HeatꢀSinkꢀ(Drain)
and Leads
are Plated
5.45 (.215) BSC
{2 Plcs.}
1.ꢀ1 (.ꢀ4ꢀ)
1.4ꢀ (.ꢀ55)
Gate
Drain
Source
Source
Drain
Gate
Dimensions in Millimeters (Inches)
2.21 (.ꢀ87)
2.59 (.1ꢀ2)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,81ꢀ 5,ꢀ45,9ꢀ3 5,ꢀ89,434 5,182,234 5,ꢀ19,522 5,262,336 6,5ꢀ3,786
5,256,583 4,748,1ꢀ3 5,283,2ꢀ2 5,231,474 5,434,ꢀ95 5,528,ꢀ58 and foreign patents. US and Foreign patents pending. All Rights Reserved.
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