HV5408 [MICROCHIP]
32-Channel, Serial-to-Parallel Converter;型号: | HV5408 |
厂家: | MICROCHIP |
描述: | 32-Channel, Serial-to-Parallel Converter |
文件: | 总17页 (文件大小:330K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HV5308 / HV5408
32-Channel, Serial-to-Parallel Converter
with High-Voltage Push-Pull Outputs
Features
Description
• Processed with High-Voltage CMOS technology
• Low power-level shifting
HV5308 and HV5408 are low-voltage serial to high-
voltage parallel converters with push-pull outputs.
These devices have been designed for use as a driver
for AC-electroluminescent displays. HV5308 / HV5408
can also be used in any application requiring multiple
output high-voltage, current sourcing, and sinking
capabilities such as driving plasma panels, vacuum flu-
orescent, or large matrix LCD displays.
• Source/sink current minimum 20mA
• Shift register speed 8.0 MHz
• Latched data outputs
• CMOS compatible inputs
• Forward and reverse shifting options
• Diode to VPP allows efficient power recovery
These devices consist of a 32-bit shift register,
32 latches, and control logic to enable outputs. Data is
shifted through the shift register on the low-to-high tran-
sition of the clock. HV5308 shifts in the clockwise
direction, when viewed from the top of the package,
and HV5408 shifts in the counter-clockwise direction.
A data output buffer is provided for cascading devices.
This output reflects the current status of the last bit of
the shift register (32). Operation of the shift register is
not affected by the LE (latch enable) or the OE (output
enable) inputs. Transfer of data from the shift register
to the latch occurs when the LE input is high. The data
in the latch is retained when LE is low.
2015 Microchip Technology Inc.
DS20005425A-page 1
HV5308 / HV5408
Package Type
6
40
1 44
44
1
44-Lead PQFP
44-Lead PLCC
See Table 2-1 for pin information
Functional Block Diagram
VPP
OE
LE
DATA
INPUT
HVOUT
1
CLK
HVOUT
2
•
•
•
32 bit
Shift
Register
32 bit
Latches
28 Additional
Outputs
•
•
•
HVOUT31
DATA
OUT
HVOUT32
DS20005425A-page 2
2015 Microchip Technology Inc.
HV5308 / HV5408
Typical Application Circuit
VPP
VDD
DATA
HVOUT
1
INPUT
Columns
CLK
High Voltage
Low Voltage
LE
Level
Translators
&
Micro
Processor
Shift Register
Latches
OE
Row
Push-Pull
Output
Buffers
Output Contr.
Driver
DATA
OUT
HVOUT32
Display
Panel
Data Input for cascading
2015 Microchip Technology Inc.
DS20005425A-page 3
HV5308 / HV5408
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Supply voltage, VDD .................................................................................................................................. -0.5V to +16V
Supply voltage, VPP................................................................................................................................... -0.5V to +90V
Logic input levels................................................................................................................................-0.5V to VDD+0.5V
Ground current1 ....................................................................................................................................................... 1.5A
Continuous total power dissipation2 .................................................................................................................. 1200mW
Operating temperature range.................................................................................................................. -40°C to +85°C
Storage temperature range ................................................................................................................... -65°C to +150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
1: Duty cycle is limited by the total power dissipated in the package.
2: For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: VPP = 60V, VDD = 12V, TA = 25°C
Parameter
Symbol
Min
Max
Units Conditions
DC Characteristics
VPP supply current
IPP
IDDQ
IDD
IIH
-
-
-
-
-
0.5
100
15
mA HVOUTPUTS high to low
IDD supply current (quiescent)
IDD supply current (operating)
High level logic input current
Low level logic input current
µA
All inputs = VDD or GND
mA VDD= VDD max, fCLK= 8.0MHz
1.0
-1.0
µA
µA
VIN= VDD
VIN= 0
IIL
I
OH= -20mA, -40 to 85°C
HVOUT
52
10.5
-
-
-
V
V
V
IOH= -15mA, -55 to 125°C
High level output voltage
VOH
Data out
HVOUT
IO= -100µA
IOL= 20mA, -40 to 85°C
IOL= 15mA, -55 to 125°C
8.0
Low level output voltage
VOL
VOC
Data out
-
-
1.0
V
V
IO= 100µA
HV output clamp diode voltage
AC Characteristics
-1.5
IOL= -100mA
Clock frequency
fCLK
tWL or tWH
tSU
-
8.0
MHz ---
Clock width, High or Low
Setup time before CLK rises
Hold time after CLK rises
Data output delay after L to H CLK
Data output delay after H to L CLK
LE delay after L to H CLK
Width of LE pulse
62
25
10
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
---
-
-
---
tH
---
tDLH (Data)
tDHL (Data)
tDLE
110
110
-
CL= 15pF, (Note 1)
CL= 15pF, (Note 1)
(Note 1)
-
50
50
50
-
tWLE
-
---
LE setup time before L to H CLK
Delay from LE to HVOUT, L to H
Delay from LE to HVOUT, H to L
tSLE
-
(Note 1)
tON
500
500
(Note 1)
tOFF
-
(Note 1)
Note 1: L to H = Low to High; H to L = High to Low.
DS20005425A-page 4
2015 Microchip Technology Inc.
HV5308 / HV5408
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C
Parameter
Symbol
Min
Typ
Max Units Conditions
Temperature Ranges
Operating Temperature
Storage Temperature
-40
-65
–
–
85
°C
°C
150
Package Thermal Resistances
Thermal Resistance, 44-Lead PQFP
Thermal Resistance, 44-Lead PLCC
θja
θja
–
–
51
37
–
–
°C/W
°C/W
2015 Microchip Technology Inc.
DS20005425A-page 5
HV5308 / HV5408
2.0
PIN DESCRIPTION
The locations of the pins are listed in Package Type.
TABLE 2-1:
Pin #
PIN DESCRIPTION PQFP
HV5308
HV5408
Description
1
2
HVOUT22
HVOUT21
HVOUT20
HVOUT19
HVOUT18
HVOUT17
HVOUT16
HVOUT15
HVOUT14
HVOUT13
HVOUT12
HVOUT11
HVOUT10
HVOUT9
HVOUT11
HVOUT12
HVOUT13
HVOUT14
HVOUT15
HVOUT16
HVOUT17
HVOUT18
HVOUT19
HVOUT20
HVOUT21
HVOUT22
HVOUT23
HVOUT24
HVOUT25
HVOUT26
HVOUT27
HVOUT28
HVOUT29
HVOUT30
HVOUT31
HVOUT32
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail lev-
els.
HVOUT
8
HVOUT7
HVOUT6
HVOUT
5
HVOUT4
HVOUT3
HVOUT
2
HVOUT1
Serial data output.
Data output for cascading to the data input of the next device.
23
DATA OUT
DATA OUT
24
25
26
N/C
N/C
No connect.
Data shift register clock
27
CLK
CLK
Input are shifted into the shift register on the positive edge of the
clock.
28
29
30
GND
VPP
VDD
GND
VPP
VDD
Logic and high voltage ground
High voltage power rail.
Low voltage logic power rail.
Latch enable input.
When LE is High, shift register data is transferred into a data
latch. When LE is Low, data is latched, and new data can be
clocked into the shift register.
31
32
LE
LE
Serial data input.
Data needs to be present before each rising edge of the clock.
DATA IN
DATA IN
Output enable input.
When OE is Low, all HV outputs are forced into a Low state,
regardless of data in each channel. When OE is High, all HV out-
puts reflect data latched.
33
34
OE
OE
N/C
N/C
No connect.
DS20005425A-page 6
2015 Microchip Technology Inc.
HV5308 / HV5408
TABLE 2-1:
Pin #
PIN DESCRIPTION PQFP (CONTINUED)
HV5308 HV5408
Description
35
36
37
38
39
40
41
42
43
44
HVOUT32
HVOUT31
HVOUT30
HVOUT29
HVOUT28
HVOUT27
HVOUT26
HVOUT25
HVOUT24
HVOUT23
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
1
2
3
4
5
6
7
8
9
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail lev-
els.
HVOUT10
TABLE 2-2:
Pin #
PIN DESCRIPTION PLCC
HV5308
HV5408
Description
1
2
HVOUT17
HVOUT16
HVOUT15
HVOUT14
HVOUT13
HVOUT12
HVOUT11
HVOUT10
HVOUT16
HVOUT17
HVOUT18
HVOUT19
HVOUT20
HVOUT21
HVOUT22
HVOUT23
HVOUT24
HVOUT25
HVOUT26
HVOUT27
HVOUT28
HVOUT29
HVOUT30
HVOUT31
HVOUT32
3
4
5
6
7
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail lev-
els.
8
9
HVOUT9
10
11
12
13
14
15
16
17
HVOUT8
HVOUT7
HVOUT
6
HVOUT5
HVOUT4
HVOUT
3
HVOUT2
HVOUT1
Serial data output.
Data output for cascading to the data input of the next device.
18
DATA OUT
DATA OUT
19
20
21
N/C
N/C
No connect.
Data shift register clock
22
CLK
CLK
Input are shifted into the shift register on the positive edge of the
clock.
23
24
25
GND
VPP
VDD
GND
VPP
VDD
Logic and high voltage ground
High voltage power rail.
Low voltage logic power rail.
Latch enable input.
When LE is High, shift register data is transferred into a data
latch. When LE is Low, data is latched, and new data can be
clocked into the shift register.
26
LE
LE
2015 Microchip Technology Inc.
DS20005425A-page 7
HV5308 / HV5408
TABLE 2-2:
Pin #
PIN DESCRIPTION PLCC (CONTINUED)
HV5308
HV5408
Description
Serial data input.
Data needs to be present before each rising edge of the clock.
27
DATA IN
DATA IN
Output enable input.
When OE is Low, all HV outputs are forced into a LOW state,
regardless of data in each channel. When OE is High, all HV out-
puts reflect data latched.
28
OE
OE
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
N/C
N/C
No connect.
HVOUT32
HVOUT31
HVOUT30
HVOUT29
HVOUT28
HVOUT27
HVOUT26
HVOUT25
HVOUT24
HVOUT23
HVOUT22
HVOUT21
HVOUT20
HVOUT19
HVOUT18
HVOUT1
HVOUT
2
HVOUT3
HVOUT4
HVOUT5
HVOUT6
HVOUT7
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail lev-
els.
HVOUT
8
HVOUT9
HVOUT10
HVOUT11
HVOUT12
HVOUT13
HVOUT14
HVOUT15
DS20005425A-page 8
2015 Microchip Technology Inc.
HV5308 / HV5408
3.1
Power-Up and Recommended
Operating Conditions
3.0
FUNCTIONAL DESCRIPTION
Table 3-1 provides functional information about
HV5308 / HV5408.
To power-up HV5308 / HV5408, perform the following
power-up sequence:
TABLE 3-1:
DATA IN
FUNCTIONAL TABLE CLK
1. Connect ground
2. Apply VDD
CLK
DATA OUT
H
L
↑
↑
H
L
3. Set all inputs (Data, CLK, LE, etc.) to a known
state
4. Apply VPP
X
No ↑
No change
5. The VPP should not fall below VDD or float during
operation.
Note:
H = High level, L = Low level, ↑ = Low-to-
High transition
To power-down the device, reverse the steps above.
TABLE 3-2:
DATA IN
FUNCTIONAL TABLE LE, OE
LE
OE
HVOUT
X
X
H
L
X
L
L
H
H
H
All HVOUT= Low
Previous latched data
H
H
H
L
Note:
H = High level, L = Low level, X= Don’t Care
TABLE 3-3:
Symbol
RECOMMENDED OPERATING CONDITIONS (-40°C to 85°C)
Parameter
Logic voltage supply
Min
Max
Units
VDD
VPP
VIH
10.8
13.2
80
V
V
High voltage supply
Input high voltage
Input low voltage
Clock frequency
8.0
VDD- 2.0
VDD
2.0
V
VIL
0
0
V
fCLK
8.0
MHz
VDD
VDD
VPP
DATA
INPUT
DATA OUT
HVOUT
GND
GND
GND
Logic Data Output
Logic Inputs
High Voltage Outputs
FIGURE 3-1:
Input and Output Equivalent Circuits
2015 Microchip Technology Inc.
DS20005425A-page 9
HV5308 / HV5408
VIH
VIL
VIH
VIL
DATA
50%
50%
Data Valid
50%
IN
tSU
tH
50%
50%
50%
CLK
tWL
tWH
VOH
VOL
50%
50%
tDLH
DATA
OUT
VOH
VOL
tDHL
VIH
VIL
50%
50%
LE
tWLE
tSLE
tDLE
VOH
VOL
90%
10%
HVOUT
w/ S/R LOW
tOFF
VOH
VOL
90%
HVOUT
w/ S/R HIGH
10%
tON
FIGURE 3-2:
Switching Waveforms
DS20005425A-page 10
2015 Microchip Technology Inc.
HV5308 / HV5408
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
44-lead PQFP
Example
XXXXXXXXXX
XXXXXXXXXX
HV5308PG-B
e3
1530343
e3
XXXXXXXX
YYWWNNN
44-lead PLCC
Example
XXXXXXXXXXX
XXXXXXXXXXX
HV5308PJ-B
e3
1530343
e3
XXXXXXXXX
YYWWNNN
Legend: XX...X Product Code or Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
3
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2015 Microchip Technology Inc.
DS20005425A-page 11
HV5308 / HV5408
44-Lead PQFP Package Outline (PG)
10.00x10.00mm body, 2.35mm height (max), 0.80mm pitch
D
D1
E
E1
Note 1
(Index Area
D1/4 x E1/4)
44
1
b
e
Top View
View B
Gauge
Plane
L2
A2
A1
A
Seating
Plane
L
Seating
Plane
θ
L1
Side View
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. $ꢁ3LQꢁꢃꢁLGHQWL¿HUꢁPXVWꢁEHꢁORFDWHGꢁLQꢁWKHꢁLQGH[ꢁDUHDꢁLQGLFDWHGꢂꢁ7KHꢁ3LQꢁꢃꢁLGHQWL¿HUꢁFDQꢁEHꢄꢁDꢁPROGHGꢁPDUNꢅLGHQWL¿HUꢆꢁDQꢁHPEHGGHGꢁPHWDOꢁPDUNHUꢆꢁRUꢁ
a printed indicator.
Symbol
A
A1
MIN 1.95* 0.00 1.95 0.30 13.65* 9.80* 13.65* 9.80*
NOM 2.00 13.90 10.00 13.90 10.00
MAX 2.35 0.25 2.10 0.45 14.15* 10.20* 14.15* 10.20*
A2
b
D
D1
E
E1
e
L
L1
L2
ș
0O
3.5O
7O
0.73
0.88
1.03
Dimension
(mm)
0.80
BSC
1.95 0.25
REF BSC
-
-
-
JEDEC Registration MO-112, Variation AA-2, Issue B, Sep.1995.
ꢀꢁ7KLVꢁGLPHQVLRQꢁLVꢁQRWꢁVSHFL¿HGꢁLQꢁWKHꢁ-('(&ꢁGUDZLQJꢂ
Drawings not to scale.
DS20005425A-page 12
2015 Microchip Technology Inc.
HV5308 / HV5408
44-Lead PLCC Package Outline (PJ)
.653x.653in body, .180in height (max), .050in pitch
.048/.042 x 45O
D
D1
1
O
.056/.042 x 45
6
44
40
.150 MAX
Note 1
(Index Area)
.075 MAX
E1
E
Note 2
.020max
(3 Places)
Top View
Vertical Side View
View B
b1
.020 MIN
Base
Plane
A
A2
Seating
Plane
e
A1
b
R
Horizontal Side View
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Notes:
1. $ꢁ3LQꢁꢃꢁLGHQWL¿HUꢁPXVWꢁEHꢁORFDWHGꢁLQꢁWKHꢁLQGH[ꢁDUHDꢁLQGLFDWHGꢂꢁ7KHꢁ3LQꢁꢃꢁLGHQWL¿HUꢁFDQꢁEHꢄꢁDꢁPROGHGꢁPDUNꢅLGHQWL¿HUꢆꢁDQꢁHPEHGGHGꢁPHWDOꢁPDUNHUꢆꢁRUꢁ
a printed indicator.
2. $FWXDOꢁVKDSHꢁRIꢁWKLVꢁIHDWXUHꢁPD\ꢁYDU\ꢂ
Symbol
A
A1
A2
.062
-
b
.013
-
b1
.026
-
D
D1
E
E1
e
R
MIN
.165
.172
.180
.090
.105
.120
.685
.690
.695
.650
.653
.656
.685
.690
.695
.650
.653
.656
.025
.035
.045
Dimension
(inches)
.050
BSC
NOM
MAX
.083
.021
.036†
JEDEC Registration MS-018, Variation AC, Issue A, June, 1993.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
2015 Microchip Technology Inc.
DS20005425A-page 13
HV5308 / HV5408
APPENDIX A: REVISION HISTORY
Revision A (December 2015)
• Updated file to Microchip format
DS20005425A-page 14
2015 Microchip Technology Inc.
HV5308 / HV5408
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
-
-
-
PART NO.
Device
XX
X
X
X
Examples:
a)
b)
c)
d)
e)
HV5308PG-B-G
Clockwise data shift,
44-Lead PQFP pack-
age, 96/Tray
Package
Options
Environmental Media
Type
Version
HV5308PG-B-G-M919 Clockwise data shift,
44-Lead PQFP pack-
age, 500/Reel
Device:
HV5308 = 32-Channel Serial to Parallel Converter, with
High-voltage Push-pull Outputs
HV5308PJ-B-G
Clockwise data shift,
44-Lead PLCC pack-
age, 27/Tube
Clockwise data shift,
44-Lead PLCC package,
500/Reel
Counter-clockwise
data shift, 44-Lead
PQFP package,
96/Tray
data shifts in clockwise direction
HV5408 = 32-Channel Serial to Parallel Converter, with
High-voltage Push-pull Outputs
HV5308PJ-B-G-M903
HV5408PG-B-G
data shifts in counter-clockwise direction
Package:
PG
PJ
= 44-Lead PQFP
= 44-Lead PLCC
f)
HV5408PJ-B-G
Counter-clockwise
data shift, 44-Lead
PLCC package,
27/Tube
Version
B
=
=
Revision B
Environmental
Media Type:
G
Lead (Pb)-free/ROHS-compliant package
(blank) = 96/Tray for PG package
= 27/Tube for PJ package
M903
M919
= 500/Reel for PG package
= 500/Reel for PJ package
2015 Microchip Technology Inc.
DS20005425A-page 15
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
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LANCheck, MediaLB, MOST, MOST logo, MPLAB,
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SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
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The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
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CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo,
MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
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in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0073-8
QUALITYꢀMANAGEMENTꢀꢀSYSTEMꢀ
CERTIFIEDꢀBYꢀDNVꢀ
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
== ISO/TSꢀ16949ꢀ==ꢀ
DS20005425A-page 16
2015 Microchip Technology Inc.
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
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EUROPE
Corporate Office
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Tel: 66-2-694-1351
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Canada - Toronto
Tel: 905-673-0699
Fax: 905-673-6509
07/14/15
DS20005425A-page 17
2015 Microchip Technology Inc.
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