SM802117UMG [MICREL]
ClockWorks? GbE (125MHz) Ultra-Low Jitter, LVPECL Frequency Synthesizer; 发条？千兆以太网（ 125MHz的）超低抖动LVPECL频率合成器
| 型号： | SM802117UMG |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | ClockWorks? GbE (125MHz) Ultra-Low Jitter, LVPECL Frequency Synthesizer |
| 文件： | 总10页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM802117
ClockWorks™ GbE (125MHz)
Ultra-Low Jitter, LVPECL
Frequency Synthesizer
General Description
Features
The SM802117 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for GbE Ethernet clock signals. It is based
upon a unique patented RotaryWave® architecture that
provides very low phase noise.
• Generates one or two LVPECL clock outputs at 125MHz
• 2.5V or 3.3V operating range
• Typical phase jitter @ 125MHz
(1.875MHz to 20MHz): 115fs
• Industrial temperature range (–40°C to +85°C)
• Green, RoHS, and PFOS compliant
• Available in 24-pin 4mm × 4mm QFN package
The device operates from a 3.3V or 2.5V power supply
and synthesizes LVPECL output clocks at 125MHz. There
are two differential clock outputs each with it’s own OE pin
allowing them to be disabled independently. The
SM802117 accepts a 25 MHz crystal or LVCMOS
reference clock.
Applications
• Gigabit Ethernet - PHY
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
___________________________________________________________________________________________________________
Block Diagram
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
M9999-101311-B
hbwhelp@micrel.com or (408) 955-1690
October 2011
Micrel, Inc.
SM802117
Ordering Information
Part Number
SM802117UMG
SM802117UMGTR
Note:
Marking
802117
802117
Shipping
Tube
Temperature Range
–40°C to +85°C
Package
24-Pin QFN
24-Pin QFN
Tape and Reel
–40°C to +85°C
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
Pin Type
Pin Level
Pin Function
Differential Clock Output from Bank 1
125MHz
19, 20
/Q1, Q1
O, (DIF)
LVPECL
LVPECL
Differential Clock Output from Bank 2
125MHz
22, 23
/Q2, Q2
O, (DIF)
24
2
VDDO2
VSSO2
PWR
PWR
Power Supply for Output Bank 2
Power Supply Ground for Output Bank 2
PLL Bypass, Selects Output Source
0 = Normal PLL Operation
3
4
PLL_BYPASS
XTAL_SEL
I, (SE)
I, (SE)
LVCMOS
LVCMOS
1 = Output from Input Reference Clock or Crystal
45KΩ pull-down
Selects PLL Input Reference Source
0 = REF_IN, 1 = XTAL, 45KΩ pull-up
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October 2011
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Micrel, Inc.
SM802117
Pin Description (Continued)
Pin Number
Pin Name
TEST
Pin Type
Pin Level
Pin Function
5, 6 11, 16,18
Factory Test pins, Do not connect anything to these pins.
Core Power Supply
1
VDD
PWR
PWR
PWR
PWR
I, (SE)
13, 14, 15
VSS
Core Power Supply Ground
17
21
8
VDDO1
VSSO1
REF_IN
Power Supply for Output Bank 1
Power Supply Ground for Output Bank 1
Reference Clock Input
LVCMOS
crystal
Crystal Reference Input, no load caps needed.
See Fig. 5.
9
XTAL_IN
I, (SE)
Crystal Reference Output, no load caps needed.
See Fig. 5.
10
XTAL_OUT
O, (SE)
crystal
Output Enable, Q1 disables to tri-state,
0 = Disabled, 1 = Enabled, 45Kꢀ pull-up
Output Enable, Q2 disables to tri-state,
0 = Disabled, 1 = Enabled, 45Kꢀ pull-up
7
OE1
OE2
I, (SE)
I, (SE)
LVCMOS
LVCMOS
12
Application Information
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further
details.
Contact Micrel’s HBW applications group if you need
assistance on selecting a suitable crystal for your
application at hbwhelp@micrel.com.
Truth Table
PLL_BYPASS
XTAL_SEL
INPUT
OUTPUT
PLL
0
1
−
−
0
−
−
XTAL/REF_IN
REF_IN
−
−
−
−
1
XTAL
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Micrel, Inc.
SM802117
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO1/2)......................................+4.6V
Input Voltage (VIN).............................. –0.50V to VDD + 0.5V
Lead Temperature (soldering, 20sec.)....................... 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) .........................–65°C to +150°C
Supply Voltage (VDD, VDDO1/2)............... +2.375V to +3.465V
Ambient Temperature (TA) ..........................–40°C to +85°C
Junction Thermal Resistance(3)
QFN (θJA)
Still-Air.........................................................50°C/W
QFN (ψJB)
Junction-to-Board .......................................30°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 2.5V ±5%
TA = −40°C to +85°C.
Symbol
Parameter
Condition
Min.
2.375
3.135
Typ.
2.5
3.3
97
Max.
2.625
3.465
125
Units
V
VDD, VDDO1/2
VDD, VDDO1/2
2.5V Operating Voltage
3.3V Operating Voltage
V
Supply current VDD + VDDO
XTAL_SEL = 0
125MHz - 1 output
125MHz - 2 outputs
125MHz - 1 output
125MHz - 2 outputs
mA
IDD
REF_IN
114
87
148
113
135
mA
mA
mA
Outputs open
Supply current VDD + VDDO
XTAL_SEL = 1
IDD
XTAL
104
Outputs open
LVPECL OUTPUT DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 2.5V ±5%
TA = −40°C to +85°C. RL = 50ꢀ to VDDO − 2V
Symbol
VOH
Parameter
Condition
Min.
VDDO – 1.145
VDDO – 1.945
0.6
Typ.
Max.
Units
Output High Voltage
Output Low Voltage
Output Voltage Swing
VDDO – 0.97 VDDO – 0.845
VDDO – 1.77 VDDO – 1.645
V
V
V
VOL
VSWING
0.8
1.0
Note:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
M9999-101311-B
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October 2011
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Micrel, Inc.
SM802117
LVCMOS (PLL_BYPASS, XTAL_SEL, OE1/2) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
VIH
Parameter
Condition
Min.
2
Typ.
Max.
VDD + 0.3
0.8
Units
V
Input High Voltage
Input Low Voltage
VIN
V
−0.3
IIH
IIL
Input High Current
Input Low Current
VDD = VIN = 3.465V
150
μA
μA
VDD = 3.465V, VIN = 0V
−150
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
VIH
Parameter
Condition
Min.
1.1
Typ.
Max.
VDD + 0.3
0.6
Units
V
Input High Voltage
Input Low Voltage
VIL
V
−0.3
−5
XTAL_SEL = VIL, VIN = 0V to VDD
XTAL_SEL = VIH, VIN = VDD
5
μA
µA
IIN
Input Current
20
Crystal Characteristics
Parameter
Condition
Min.
Typ.
Max.
Units
Mode of Oscillation
Frequency
10 to 12pF Load
Fundamental, Parallel Resonant
25
MHz
ꢀ
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
50
1
5
pF
10
100
uW
M9999-101311-B
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October 2011
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Micrel, Inc.
SM802117
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 2.5V ±5%
TA = −40°C to +85°C. RL = 50ꢀ to VDDO − 2V
Symbol
Parameter
Condition
Min.
Typ.
125
25
Max.
Units
MHz
MHz
ps
FOUT
Output Frequency
FREF
Reference Input Frequency
LVPECL Output Rise/Fall Time
Output Duty Cycle
TR/TF
ODC
20% – 80%
80
48
175
50
350
52
%
Within bank. Note 6
TSKEW
TLOCK
Output-to-Output Skew
PLL Lock Time
45
ps
20
ms
125MHz
RMS Phase Jitter(7)
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
115
254
fs
Tjit(∅)
Spurious Noise Components
25MHz
-85
dBc
Notes:
5. All phase noise measurements were taken with an Agilent 5052B phase noise system.
6. Defined as skew between outputs at the same supply voltage and with equal load conditions and same frequency; Measured at the output
differential crossing points.
7. Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
M9999-101311-B
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October 2011
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Micrel, Inc.
SM802117
Phase Noise Plots
Phase Noise Plot: 125MHz, 1.875MHz − 20MHz
115fS
Phase Noise Plot: 125MHz, 12kHz − 20MHz
254fS
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SM802117
Timing Diagrams
Figure 1. Duty Cycle TIming
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise/Jitter
M9999-101311-B
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October 2011
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Micrel, Inc.
SM802117
Input and Output Stage
Figure 4. LVPECL Output Load and Test Circuit
Figure 5. Crystal Input Interface
M9999-101311-B
hbwhelp@micrel.com or (408) 955-1690
October 2011
9
Micrel, Inc.
SM802117
Package Information
24-Pin QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
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relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
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© 2011 Micrel, Incorporated.
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