SM802124 [MICREL]
ClockWorks? DUAL 125MHz Ultra-Low Jitter, CMOS Frequency Synthesizer; 发条？双125MHz的超低抖动， CMOS频率合成器
| 型号： | SM802124 |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | ClockWorks? DUAL 125MHz Ultra-Low Jitter, CMOS Frequency Synthesizer |
| 文件： | 总9页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM802124
ClockWorks™ DUAL 125MHz
Ultra-Low Jitter, CMOS
Frequency Synthesizer
General Description
Features
The SM802124 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for Ethernet clock signals. It is based upon
a unique patented RotaryWave® architecture that provides
very-low phase noise.
• Generates two LVCMOS clock outputs at 125MHz
• 2.5V or 3.3V operating range
• Typical rms phase jitter @ 125MHz
1.875MHz to 20MHz : 85fs
(Input source dependent)
The device operates from a 3.3V or 2.5V power supply
and synthesizes two CMOS output clocks at 125MHz from
a 15MHz LVCMOS reference clock.
• Industrial temperature range (–40°C to +85°C)
• Green, RoHS, and PFOS compliant
• Available in 24-pin 4mm × 4mm QFN package
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Applications
• Gigabit Ethernet
Block Diagram
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
M9999-101311-B
hbwhelp@micrel.com or (408) 955-1690
September 2011
Micrel, Inc.
SM802124
Ordering Information(1)
Part Number
Marking
802124
802124
Shipping
Tube
Temperature Range
–40°C to +85°C
Package
SM802124UMG
SM802124UMGTR
24-Pin QFN
24-Pin QFN
Tape and Reel
–40°C to +85°C
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
24-Pin QFN (code)
(Top View)
M9999-101311-B
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September 2011
Micrel, Inc.
SM802124
Pin Description
Pin Number
Pin Name
Pin Type
Pin Level
CMOS
Pin Function
17
21
Q0
Q1
O
O
125MHz Clock Output
180 deg,125MHz Clock Output
CMOS
3, 4, 16 , 20,
23, 24
NC
-
-
No Connection. Do not connect anything to these pins.
1, 18
2, 22
VDDO
VSSO
PWR
PWR
Power Supply for Output
Power Supply Ground for Output
PLL Bypass, Selects Output Source
0 = Normal PLL Operation
5
PLL_BYPASS
I, (SE)
LVCMOS
1 = Output from Input Reference Clock
45KΩ pull-down
7, 10, 11, 12,
15, 19
TEST
Factory Test pins, Do not connect anything to these pins.
8
6, 13 , 14
9
VDD
VSS
PWR
PWR
Core Power Supply
Core Power Supply Ground
Reference Clock Input
REF_IN
I, (SE)
LVCMOS
M9999-101311-B
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September 2011
Micrel, Inc.
SM802124
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO).........................................+4.6V
Input Voltage (VIN)...............................−0.50V to VDD + 0.5V
Lead Temperature (soldering, 20s) ........................... 260°C
Case Temperature..................................................... 115°C
Storage Temperature (Ts)......................... −65°C to +150°C
Supply Voltage (VDD, VDDO)...................+2.375V to +3.465V
Ambient Temperature (TA).......................... –40°C to +85°C
Junction Thermal Resistance(3)
QFN (θJA)
Still-Air ........................................................ 50°C/W
QFN (ψJB)
Junction-to-Board ....................................... 30°C/W
DC Electrical Characteristics(4)
VDD = VDDO = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO = 2.5V ±5%
TA = −40°C to +85°C.
Symbol
VDD, VDDO
VDD, VDDO
IDD
Parameter
Condition
Min.
2.375
3.135
Typ.
2.5
3.3
70
Max.
2.625
3.465
90
Units
V
2.5V Operating Voltage
3.3V Operating Voltage
Supply current VDD + VDDO
V
Outputs open
mA
LVCMOS OUTPUT DC Electrical Characteristics(4)
VDD = VDDO = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO = 2.5V ±5%
TA = −40°C to +85°C. RL = 50ꢀ to VDDO/2.
Symbol
Parameter
Condition
Min
Typ
Max
Units
Output High Voltage
Fig. 4
VDD
-0.7
V
VOH
Output Low Voltage
Fig. 4
VOL
0.6
V
LVCMOS (PLL_BYPASS) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
Condition
Min.
2
Typ.
Max.
Units
VIH
Input High Voltage
Input Low Voltage
VDD + 0.3
0.8
V
V
VIL
−0.3
IIH
IIL
Input High Current
Input Low Current
VDD = VIN = 3.465V
150
μA
μA
VDD = 3.465V, VIN = 0V
−5
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
VIH
Parameter
Condition
Min.
1.1
Typ.
Max.
VDD + 0.3
0.6
Units
V
Input High Voltage
Input Low Voltage
VIL
V
−0.3
−5
IIN
Input Current
VIN = 0V to VDD
5
μA
September 2011
M9999-101311-B
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SM802124
AC Electrical Characteristics(4, 5)
VDD = VDDO = 3.3V±5% or 2.5V±5%
VDD = 3.3V±5%, VDDO = 2.5V±5%
TA = 40°C to 85°C. RL = 50ꢀ to VDDO/2
Symbol
FOUT
Parameter
Output Frequency
Condition
Min.
Typ.
125
15
Max.
Units
MHz
MHz
ps
FREF
Reference Input Frequency
LVCMOS Output Rise/Fall Time 20% – 80%
Output Duty Cycle
TR/TF
ODC
100
45
300
50
500
55
%
TLOCK
PLL Lock Time
20
ms
RMS Phase Jitter(6)
Integration Range (1.875MHz – 20MHz)
85
320
-73
-82
-89
-96
fs
Tjit(∅)
Integration Range (12kHz – 20MHz)
5MHz
10MHz
20MHz
25MHz
Spurious Noise Components
dBc
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4. The circuit is designed to meet the AC and DC specifications shown in the above table after thermal equilibrium has been established.
5. All phase-noise measurements were taken with an Agilent 5052B phase-noise system.
6. Ref_IN driven with a low-noise source ClockWorks SM802001 programmed for a 15MHz CMOS output. Phase noise will track the input phase noise
up to about 1MHz offset frequency.
September 2011
M9999-101311-B
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SM802124
Phase Noise Plots
Phase Noise Plot: 125MHz, 1.875MHz − 20MHz 73fS
Phase Noise Plot: 125MHz, 12kHz − 20MHz 318fS
September 2011
M9999-101311-B
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SM802124
Timing Diagrams
Figure 1. Duty Cycle Timing
Figure 2. All outputs Rise/Fall Time
Figure 3. RMS Phase/Noise Jitter
September 2011
M9999-101311-B
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SM802124
Input and Output Stage
Figure 4. CMOS Output Load and Test Circuit
September 2011
M9999-101311-B
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Micrel, Inc.
SM802124
Package Information
24-Pin Package Type
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
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© 2011 Micrel, Incorporated.
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