SM802120 [MICREL]
ClockWorksTM 125MHz LVDS / 125 MHz HCSL Ultra-Low Jitter Frequency Synthesizer; ClockWorksTM 125MHz的LVDS / 125 MHz的HCSL超低抖动频率合成器
| 型号： | SM802120 |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | ClockWorksTM 125MHz LVDS / 125 MHz HCSL Ultra-Low Jitter Frequency Synthesizer |
| 文件： | 总12页 (文件大小：324K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM802120
ClockWorksTM 125MHz LVDS / 125 MHz
HCSL Ultra-Low Jitter
Frequency Synthesizer
General Description
Features
The SM802120 is a member of the ClockWorks family of
devices from Micrel and provides an extremely low-noise
timing solution. It is based upon a unique patented
RotaryWave® architecture that provides very low phase
noise.
Generates six LVDS 125MHz clocks and two HCSL
125MHz clocks
2.5V or 3.3V operating range
Typical phase jitter @ 125 MHz
(1.875MHz to 20MHz): 100fs
The device operates from a 3.3V or 2.5V power supply
and synthesizes eight differential 125MHz output clocks,
six LVDS and two HCSL. The SM802120 accepts a 25
MHz crystal input.
Industrial temperature range (–40C to +85C)
Green, RoHS, and PFOS compliant
Available in 44-pin 7mm 7mm QFN package
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
__________________________________________________________________________________________________________
Block Diagram
Ordering
Information
Part Number
Marking
Shipping
Temperature Range
Package
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
M9999-092111-A
September 2011
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Micrel, Inc.
SM802120
SM802120UMG
SM802120UMGTR
Note:
802120
802120
Tray
44-Pin QFN
–40°C to +85°C
–40°C to +85°C
Tape and Reel
44-Pin QFN
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
44-Pin QFN
(Top View)
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SM802120
Pin Description
Pin Number
25, 26
28, 29
32, 33
35, 36
41, 42
1, 2
Pin Name
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
/Q5, Q5
/Q6, Q6
Pin Type
Pin Level
Pin Function
Differential Clock Outputs from Bank 1
125MHz
O, (DIF)
LVDS
Differential Clock Outputs from Bank 2
125MHz
O, (DIF)
O, (DIF)
LVDS
HCSL
Differential Clock Outputs from Bank 2
125MHz
4, 5
7, 8
/Q7, Q7
/Q8, Q8
31, 37, 38
43, 44, 16
VDDO1
VDDO2
PWR
PWR
Power Supply for the Outputs on Bank 1
Power Supply for the Outputs on Bank 2
Power Supply Ground for the Outputs on Bank
1
24, 39
VSSO1
VSSO2
TEST
PWR
PWR
Power Supply Ground for the Outputs on Bank
2
3, 6, 40
10, 11, 14, 17, 20,
27, 30, 34
Factory Test Pins. Do not connect anything to
these pins.
12, 13
VDD
VSS
PWR
PWR
Core Power Supply
Core Power Supply Ground. The exposed pad
must be connected to the VSS ground plane.
9, 21, 23
(Exposed Pad)
Crystal Reference Input, no load caps needed.
See Fig. 7.
18
19
XTAL_IN
I, (SE)
Crystal
Crystal
Crystal Reference Output, no load caps
needed.
XTAL_OUT
O, (SE)
See Fig. 7.
Output Enable, Q1-Q4 disables to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Output Enable, Q5-Q8 disables to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
15
22
OE1
OE2
I, (SE)
I, (SE)
LVCMOS
LVCMOS
Truth Table
OE1/2
OUTPUTS
Tri-state
0
1
HCSL / LVDS
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SM802120
Application Information
Crystal Layout
LVDS Outputs
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further
details.
LVDS outputs are to be terminated with 100Ω across Q
and /Q. For best performance, load all outputs. Outputs
can be DC or AC-coupled.
HCSL Outputs
HCSL outputs are to be terminated with 50Ω to VSS. For
best performance, load all outputs. For AC-coupled or to
change the termination, contact Micrel’s application
group: hbwhelp@micrel.com.
Contact Micrel’s HBW applications group if you need
assistance on selecting a suitable crystal for your
application at: hbwhelp@micrel.com.
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SM802120
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO1/2) ……..............................+4.6V
Input Voltage (VIN)……….……...........…-0.50V to VDD+0.5V
Lead Temperature (soldering, 20 sec.)……........……260°C
Case Temperature………………………….........…….115°C
Storage Temperature (Ts)……… .........…..-65°C to +150°C
Supply Voltage (VDD, VDDO1/2)............... +2.375V to +3.465V
Ambient Temperature (TA).......................... –40°C to +85°C
Junction Thermal Resistance(3)
QFN ( JA)
Still-Air ...............................................................24°C/W
QFN ( JB)
Junction-to-Board................................................ 8°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%; VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%; TA = 40°C to 85°C
Symbol
VDD, VDDO1/2
IDD
Parameter
Condition
Min
Typ
3.3
Max
3.465
2.625
240
Units
V
3.3V Operating Voltage
2.5V Operating Voltage
Total supply current
VDDO1=VDDO2
VDDO1=VDDO2
Outputs loaded
3.135
2.375
2.5
V
185
mA
LVCMOS INPUT (OE1, OE2) DC Electrical Characteristics(4)
VDD = 3.3V 5%, or 2.5V 5%, TA = 40°C to 85°C.
Symbol
Parameter
Condition
Min
Typ
Max
Units
VDD
+
VIH
Input High Voltage
2
V
0.3
0.8
5
VIL
IIH
IIL
Input Low Voltage
Input High Current
Input Low Current
V
0.3
VDD = VIN = 3.465V
A
A
VDD = 3.465V, VIN = 0V
150
LVCMOS OUTPUT DC Electrical Characteristics(4)
VDD
= VDDO1/2 = 3.3V 5% or 2.5V 5%, VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5% TA = 40°C to 85°C. RL = 100Ω
across Q and /Q.
Symbol
Parameter
Condition
Min
Typ
Max
475
40
Units
mV
mV
V
VOD
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
Figures 1, 5
275
350
ΔVOD
VOS
1.15
1.25
1.50
50
ΔVOS
VOS Magnitude Change
mV
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SM802120
HCSL OUTPUT DC Electrical Characteristics(4)
VDD
= VDDO1/2 = 3.3V 5% or 2.5V 5%, VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5% TA = 40°C to 85°C. RL = 50Ω
to VSS.
Symbol
VOH
Parameter
Condition
Min
660
-150
250
Typ
700
0
Max
850
27
Output High Voltage
Output Low Voltage
Crossing Point Voltage
Figures 1, 4
VOL
VCROSS
350
550
Crystal Characteristics
Parameter
Condition
10pF to 12pF Load
Min.
Typ.
Max.
Units
Mode of Oscillation
Frequency
Fundamental, Parallel Resonant
25
MHz
ꢀ
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
50
1
5
pF
10
100
uW
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%; VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%; TA = 40°C to 85°C.
Symbol
FOUT
Parameter
Condition
Min
Typ
125
160
300
50
Max
Units
Output Frequency
LVDS Output Rise/Fall Time
HCSL Output Rise/Fall Time
Output Duty Cycle
PLL Lock Time
MHz
ps
ps
%
TR/TF
TR/TF
ODC
TLOCK
20% – 80%, Figures 2, 5
20% – 80%, Figures 2, 4
HCSL, LVDS outputs
100
150
48
400
450
52
20
ms
fs
RMS Phase Jitter(6)
Integration Range:(12KHz – 20MHz)
Integration Range:(1.875MHz – 20MHz)
Integration Range:(12KHz – 20MHz)
250
100
250
(Output = 125MHz LVDS)
RMS Phase Jitter(6)
fs
Tjit()
fs
(Output = 125MHz HCSL)
Integration Range:(1.875MHz – 20MHz)
25MHz (LVDS outputs)
100
-80
-85
fs
Spurious Noise Components
dBc
25MHz (HCSL outputs)
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4. The circuit is designed to meet the AC and DC specifications shown in the above table after thermal equilibrium has been established.
5. All phase noise measurements were taken with an Agilent 5052B phase noise system
6. Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
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SM802120
Phase Noise Plots
125MHz LVDS Integrated Jitter 12KHz-20MHz 252fs
125MHz LVDS Integrated Jitter 1.875MHz-20MHz 102fs
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SM802120
Phase Noise Plots (Continued)
125MHz HCSL Integrated Jitter 12KHz-20MHz 250fs
125MHz HCSL Integrated Jitter 1.875MHz-20MHz 100fs
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SM802120
Figure 1. Duty Cycle TIming
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise/Jitter
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SM802120
Figure 4. HCSL Output Load
Figure 5. LVDS Output Load
Figure 7. Crystal Input Interface
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SM802120
Package Information
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2011 Micrel, Incorporated.
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SM802120
Revision Template History
Date
Change Description/Edits by:
Rev.
8/4/10
Added new paragraph to disclaimer in boiler plate. Per Colin Sturt. M.Galvan
14
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