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MX23L12822MC-12 [Macronix]

128M-BIT (8M x 16 / 4M x 32) MASK ROM WITH PAGE MODE; 128M位（ 8M ×16 / 4M ×32）面膜用页模式ROM
MX23L12822MC-12
型号： MX23L12822MC-12
厂家： MACRONIX INTERNATIONAL    MACRONIX INTERNATIONAL
描述：

128M-BIT (8M x 16 / 4M x 32) MASK ROM WITH PAGE MODE
128M位（ 8M ×16 / 4M ×32）面膜用页模式ROM

有原始数据的样本ROM
文件： 总7页 (文件大小：44K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
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MX23L12822  
128M-BIT(8Mx16/4Mx32)MASKROMWITHPAGEMODE  
FEATURES  
• Current  
• Bit organization  
- Operating: 75mA (max.)  
- Standby: 15uA (max.)  
• Supply voltage  
- 3.3V±10%  
- 8M x 16 (byte mode)  
- 4M x 32 (double word mode)  
• Fast access time  
- Random access: 120ns (max.)  
- Page access: 30ns (max.)  
• Page Size  
• Package  
- 70 pin SSOP (500 mil)  
- 86 pin TSOP(2)  
- 8 double words per page  
PIN CONFIGURATION  
70 SSOP  
86 TSOP  
86  
85  
84  
83  
82  
81  
80  
79  
78  
77  
76  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
NC  
NC  
NC  
A21  
A20  
WORD  
OE  
CE  
NC  
NC  
A0  
A1  
A2  
A3  
2
3
4
5
6
7
8
9
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
NC  
A0  
A1  
A2  
A3  
A4  
A5  
VCC  
D0  
D16  
D1  
D17  
VSS  
VCC  
D2  
D18  
D3  
D19  
D4  
D20  
D5  
D21  
VSS  
VCC  
D6  
D22  
D7  
D23  
VSS  
A6  
2
3
4
5
6
7
8
9
A21  
A20  
WORD  
OE  
A4  
A5  
CE  
NC  
NC  
VCC  
D0  
D16  
D1  
D17  
VSS  
VCC  
D2  
D18  
D3  
D19  
NC  
NC  
D4  
D20  
D5  
D21  
VSS  
VCC  
D6  
D22  
D7  
VSS  
D31/A-1  
D15  
D30  
D14  
VSS  
VCC  
D29  
D13  
D28  
D12  
D27  
D11  
D26  
D10  
VSS  
VCC  
D25  
D9  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
VSS  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
D31/A-1  
D15  
D30  
D14  
VSS  
VCC  
D29  
D13  
D28  
D12  
NC  
D27  
D11  
D26  
D10  
VSS  
VCC  
D25  
D9  
D24  
D8  
VCC  
A19  
A18  
A17  
A16  
A15  
A14  
A13  
D24  
D8  
A7  
A8  
A9  
A10  
A11  
A12  
D23  
VSS  
A6  
A7  
A8  
VCC  
A19  
A18  
A17  
A16  
A15  
A14  
NC  
A9  
A10  
A11  
A12  
A13  
NC  
NC  
NC  
NC  
NC  
P/N:PM0561  
REV. 1.5, DEC. 26, 2000  
1
MX23L12822  
ORDER INFORMATION  
Part No.  
Access Time  
120ns  
Page Access Time  
Package  
MX23L12822MC-12  
MX23L12822YC-12  
30ns  
30ns  
70 pin SSOP  
86 pin TSOP  
120ns  
PIN DESCRIPTION  
Symbol  
A0~A21  
D0~D30  
D31/A-1  
CE  
Pin Function  
Address Inputs  
Data Outputs  
D31 (Double Word Mode)/ LSB Address (Word Mode)  
Chip Enable Input  
OE  
Output Enable Input  
Word  
VCC  
Double Word/ Word Mode Selection  
Power Supply Pin  
VSS  
Ground Pin  
NC  
No Connection  
MODE SELECTION  
CE  
H
L
OE  
X
Word  
D31/A-1  
X
D0~D15  
High Z  
D16~D31  
High Z  
Mode  
Power  
Stand-by  
Active  
X
X
H
L
-
-
H
L
X
High Z  
High Z  
L
Output  
Input  
D0~D15  
D0~D15  
D16~D31 Double Word  
High Z Word  
Active  
L
L
Active  
P/N:PM0561  
REV. 1.5, DEC. 26, 2000  
2
MX23L12822  
BLOCK DIAGRAM  
A0/(A-1)  
A2  
A3  
D0  
Double  
Word/  
Word  
Address  
Buffer  
Memory  
Array  
Page  
Page  
Output  
Buffer  
Buffer  
Decoder  
D31/(D15)  
A21  
CE  
WORD  
OE  
ABSOLUTE MAXIMUM RATINGS  
Item  
Symbol  
VIN  
Ratings  
Voltage on any Pin Relative to VSS  
Ambient OperatingTemperature  
StorageTemperature  
-1.3V to 2.0V  
0°C to 70°C  
Topr  
Tstg  
-65°C to 125°C  
Note: Minimum DC voltage on input or I/O pins is -0.5V.  
During voltage transitions, inputs may undershoot VSS  
to -1.3V for periods of up to 20ns. Maximum DC voltage  
on input or I/O pins is VCC+0.5V. During voltage transi-  
tions, input may overshoot VCC to VCC+2.0V for peri-  
ods of up to 20ns.  
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)  
Item  
Symbol  
VOH  
VOL  
VIH  
MIN.  
MAX.  
-
Conditions  
Output High Voltage  
Output Low Voltage  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Output Leakage Current  
Operating Current  
2.4V  
IOH = -0.4mA  
IOL = 1.6mA  
-
0.4V  
VCC+0.3V  
0.8V  
5uA  
2.2V  
VIL  
-0.3V  
ILI  
-
-
-
0V, VCC  
0V, VCC  
ILO  
5uA  
ICC1  
75mA  
tRC = 120ns, all output open,  
with normal sequential access  
testing pattern  
Standby Current (TTL)  
Standby Current (CMOS)  
Input Capacitance  
ISTB1  
ISTB2  
CIN  
-
-
-
-
1mA  
15uA  
10pF  
10pF  
CE = VIH  
CE>VCC-0.2V  
Ta = 25°C, f = 1MHZ  
Ta = 25°C, f = 1MHZ  
Output Capacitance  
COUT  
P/N:PM0561  
REV. 1.5, DEC. 26, 2000  
3
MX23L12822  
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)  
Item  
Symbol  
23L12822-12  
MIN.  
MAX.  
Read Cycle Time  
tRC  
tAA  
tACE  
tPA  
120ns  
-
Address Access Time  
Chip Enable Access Time  
Page Mode Access Time  
Output Enable Time  
-
120ns  
120ns  
30ns  
30ns  
-
-
-
tOE  
tOH  
tHZ  
-
Output Hold After Address  
Output High Z Delay  
0ns  
-
20ns  
Note:Output high-impedance delay (tHZ) is measured  
from OE or CE going high, and this parameter guaran-  
teed by design over the full voltage and temperature op-  
erating range - not tested.  
AC Test Conditions  
Input Pulse Levels  
Input Rise and Fall Times  
Input Timing Level  
Output Timing Level  
Output Load  
0.4V~ 2.4V  
10ns  
IOH (load)=-0.4mA  
1.4V  
DOUT  
1.4V  
See Figure  
IOL (load)=1.6mA  
C<100pF  
Note:No output loading is present in tester load board.  
Active loading is used and under software programming control.  
Output loading capacitance includes load board's and all stray capacitance.  
P/N:PM0561  
REV. 1.5, DEC. 26, 2000  
4
MX23L12822  
TIMING DIAGRAM  
RANDOM READ  
ADD  
tRC  
ADD  
ADD  
CE  
ADD  
tACE  
tOE  
OE  
tHZ  
tOH  
VALID  
tAA  
VALID  
DATA  
VALID  
PAGE READ  
A3-A21  
VALID ADD  
2'nd ADD  
tPA  
3'rd ADD  
(A-1),A0,A1,A2  
1'st ADD  
tAA  
VALID  
VALID  
VALID  
DATA  
Note: CE, OE are enable.  
Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode.  
P/N:PM0561  
REV. 1.5, DEC. 26, 2000  
5
MX23L12822  
Revision History  
Revision # Description  
Page  
P3  
P1,3  
P1  
Date  
1.3  
1.4  
1.5  
DC Characteristics ISTB2(CMOS Standby Current) 5uA-->15uA  
Operating Current (ICC1) 60mA-->75mA  
Modify Pin Configuration--86 TSOP D31-->D31/A-1  
DEC/15/1999  
JAN/14/2000  
DEC/26/2000  
P/N:PM0561  
REV. 1.5, DEC. 26, 2000  
6
MX23L12822  
MACRONIX INTERNATIONAL CO., LTD.  
HEADQUARTERS:  
TEL:+886-3-578-6688  
FAX:+886-3-563-2888  
EUROPE OFFICE:  
TEL:+32-2-456-8020  
FAX:+32-2-456-8021  
JAPAN OFFICE:  
TEL:+81-44-246-9100  
FAX:+81-44-246-9105  
SINGAPORE OFFICE:  
TEL:+65-348-8385  
FAX:+65-348-8096  
TAIPEI OFFICE:  
TEL:+886-2-509-3300  
FAX:+886-2-509-2200  
MACRONIX AMERICA, INC.  
TEL:+1-408-453-8088  
FAX:+1-408-453-8488  
CHICAGO OFFICE:  
TEL:+1-847-963-1900  
FAX:+1-847-963-1909  
http : //www.macronix.com  
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.  
7

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