MAX3873EGP [MAXIM]

PLASTIC ENCAPSULATED DEVICES; 塑封器件


型号：	MAX3873EGP
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	PLASTIC ENCAPSULATED DEVICES 塑封器件
文件：	总7页 (文件大小：84K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MAX3873EGP

Rev. A

RELIABILITY REPORT

FOR

MAX3873EGP

PLASTIC ENCAPSULATED DEVICES

January 15, 2001

MAXIM INTEGRATED PRODUCTS

120 SAN GABRIEL DR.

SUNNYVALE, CA 94086

Written by

Reviewed by

Jim Pedicord

Quality Assurance

Reliability Lab Manager

Bryan J. Preeshl

Quality Assurance

Executive Director

Conclusion

The MAX3873 successfully meets the quality and reliability standards required of all Maxim products. In addition,

Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality

and reliability standards.

Table of Contents

I. ........Device Description

II. ........Manufacturing Information

III. .......Packaging Information

IV. .......Die Information

V. ........Quality Assurance Information

VI. .......Reliability Evaluation

......Attachments

I. Device Description

A. General

The MAX3873 is a compact, low-power 2.488Gbps/ 2.67Gbps clock-recovery and data-retiming IC for

SDH/SONET applications. The phase-locked loop (PLL) recovers a synchronous clock signal from the serial

NRZ data input. The input data is then retimed by this recovered clock, providing a clean data output. The

MAX3873 meets all SDH/SONET jitter specifications, does not require an external reference clock to aid in

frequency acquisition, and provides excellent tolerance to both deterministic and sinusoidal jitter. The

MAX3873 provides a PLL loss-of-lock (LOL-bar) output to indicate whether the CDR is in lock. The recovered

data and clock outputs are CML with on-chip 50 back terminations on each line. The clock output can be

powered down if not used.

The MAX3873 is implemented in Maxim’s second-generation SiGe process and consumes only 260mW at

+3.3V supply (output clock disabled, low output swing). The device is available in a 4mm x 4mm 20-pin QFN

exposed-pad package and operates from -40°C to +85°C.

B. Absolute Maximum Ratings

Item

Rating

Supply Voltage (V_CCto GND)

Voltage at SDI +/-

CML Output Current at SDO +/-, SCLKO+/-

Voltage at /LOL, FASTRACK, FIL+/-, SCLKEN MODE,

RATEST

Storage Temp.

Lead Temp. (10 sec.)

Power Dissipation

-0.5V to +5V

(VCC-1.0V) to (VCC +0.5V)

22mA

(-0.5V to (VCC + 0.5V)

-55°C to +150°C

+300°C

20-Pin QFN

1300mW

Derates above +70°C

20-Pin QFN

20.0mW/°C

II. Manufacturing Information

A. Description/Function:

Low-Power, Compact 2.5Gbps or 2.7Gbps Clock-Recovery and Data-

Retiming

B. Process:

GST4

C. Number of Device Transistors:

2028

D. Fabrication Location:

E. Assembly Location:

F. Date of Initial Production:

Oregon, USA

Korea

July, 2001

III. Packaging Information

A. Package Type:

B. Lead Frame:

20-Pin QFN

Copper

C. Lead Finish:

Solder Plate

D. Die Attach:

Silver-filled epoxy

Gold (1.0 mil dia.)

Epoxy with silica filler

Buildsheet # 05-7001-0497

Class UL94-V0

E. Bondwire:

F. Mold Material:

G. Assembly Diagram:

H. Flammability Rating:

I. Classification of Moisture Sensitivity per

JEDEC standard JESD22-A112:

Level 1

IV. Die Information

A. Dimensions:

80 x 80 mils

B. Passivation:

Si₃N₄/SiO₂(Silicon nitride/ Silicon dioxide)

C. Interconnect:

D. Backside Metallization:

E. Minimum Metal Width:

F. Minimum Metal Spacing:

G. Bondpad Dimensions:

H. Isolation Dielectric:

I. Die Separation Method:

None

Metal1: 1.2; Metal2: 1.2; Metal3: 1.2; Metal4: 5.6 microns (as drawn)

Metal1: 1.6; Metal2: 1.6; Metal3: 1.6; Metal4: 4.2 microns (as drawn)

5 mil. Sq.

SiO₂

Wafer Saw

V. Quality Assurance Information

A. Quality Assurance Contacts: Jim Pedicord

Bryan Preeshl

(Reliability Lab Manager)

(Executive Director of QA)

(Vice President)

Kenneth Huening

B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet.

0.1% For all Visual Defects.

C. Observed Outgoing Defect Rate: < 50 ppm

D. Sampling Plan: Mil-Std-105D

VI. Reliability Evaluation

A. Accelerated Life Test

The results of the 150°C biased (static) life test are shown in Table 1. Using these results, the Failure

Rate (l ) is calculated as follows:

l =

1.83

(Chi square value for MTTF upper limit)

MTTF

192 x 4389 x 45 x 2

Temperature Acceleration factor assuming an activation energy of 0.8eV

l = 10.78 x 10^-8

l = 10.78 F.I.T. (60% confidence level @ 25°C)

This low failure rate represents data collected from Maxim’s reliability qualification and monitor programs.

Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The

reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates

to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level.

Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product

Reliability Report (RR-1M).

B. Moisture Resistance Tests

Maxim evaluates pressure pot stress from every assembly process during qualification of each new design.

Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85°C/85%RH or

HAST tests are performed quarterly per device/package family.

C. E.S.D. and Latch-Up Testing

The HF80 die type has been found to have all pins able to withstand a transient pulse of ± 200V, per Mil-Std-

883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a

current of ±250mA and/or ±20V.

Table 1

Reliability Evaluation Test Results

MAX3873EGP

TEST ITEM

TEST CONDITION

FAILURE

IDENTIFICATION

SAMPLE

SIZE

NUMBER OF

FAILURES

Static Life Test (Note 1)

Ta = 150°C

Biased

DC Parameters

& functionality

Time = 192 hrs.

Moisture Testing (Note 2)

Pressure Pot

Ta = 121°C

P = 15 psi.

RH= 100%

Time = 168hrs.

DC Parameters

& functionality

85/85

Ta = 85°C

RH = 85%

Biased

DC Parameters

& functionality

Time = 1000hrs.

Mechanical Stress (Note 2)

Temperature

Cycle

-65°C/150°C

1000 Cycles

Method 1010

DC Parameters

Note 1: Life Test Data may represent plastic D.I.P. qualification lots.

Note 2: Generic process/package data.

Attachment #1

TABLE II. Pin combination to be tested. 1/ 2/

Terminal A

Terminal B

(The common combination

of all like-named pins

(Each pin individually

connected to terminal A

with the other floating)

connected to terminal B)

All pins except V_PS13/

All input and output pins

All V_PS1pins

All other input-output pins

1/ Table II is restated in narrative form in 3.4 below.

2/ No connects are not to be tested.

3/ Repeat pin combination I for each named Power supply and for ground

(e.g., where V_PS1is V_DD, V_CC, V_SS, V_BB, GND, +V_S,-V_S, V_REF, etc).

3.4

Pin combinations to be tested.

Each pin individually connected to terminal A with respect to the device ground pin(s) connected

to terminal B. All pins except the one being tested and the ground pin(s) shall be open.

Each pin individually connected to terminal A with respect to each different set of a combination

of all named power supply pins (e.g., V , or V

or V

or V_CC1, or V_CC2) connected to

SS2

SS3

terminal B. All pins except the one being t^Se^Ss¹ted and the power supply pin or set of pins shall be

open.

Each input and each output individually connected to terminal A with respect to a combination of

all the other input and output pins connected to terminal B. All pins except the input or output pin

being tested and the combination of all the other input and output pins shall be open.

TERMINAL C

TERMINAL A

REGULATED

HIGH VOLTAGE

SUPPLY

DUT

SHORT

SOCKET

CURRENT

PROBE

(NOTE 6)

TERMINAL B

R = 1.5kW

C = 100pf

TERMINAL D

Mil Std 883D

Method 3015.7

Notice 8

MAX3873EGP [MAXIM]

相关型号：

MAX3873EVKIT

MAX3874

MAX3874AEGJ

MAX3874AEGJ-T

MAX3874AETJ+

MAX3874AETJ+D

MAX3874AETJ+TD

MAX3874EGJ

MAX3874EGJ-T

MAX3874EVKIT

MAX3875

MAX3875A