MAX3874AEGJ [MAXIM]

Clock Recovery Circuit, 1-Func, Bipolar, 5 X 5 MM, 0.90 MM HEIGHT, MO-220, QFN-32;
MAX3874AEGJ
型号: MAX3874AEGJ
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Clock Recovery Circuit, 1-Func, Bipolar, 5 X 5 MM, 0.90 MM HEIGHT, MO-220, QFN-32

文件: 总8页 (文件大小:207K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-2767; Rev 0, 2/03  
MAX3872/MAX3874 Evaluation Kits  
________________General Description  
______________ Ordering Information  
The MAX3872/MAX3874 evaluation kits (EV kits) simplify  
evaluation of the MAX3872 and MAX3874 clock and data  
recovery with limiting amplifier ICs. These EV kits enable  
testing of all MAX3872 and MAX3874 functions. SMA  
connectors are provided for the differential inputs and  
outputs. All high-speed inputs and outputs have on-board  
AC-coupling capacitors to allow direct connection to 50  
test equipment.  
PART  
TEMP. RANGE  
IC PACKAGE  
32 QFN  
32 QFN  
MAX3872EVKIT -40°C to +85°C  
MAX3874EVKIT -40°C to +85°C  
______________Component Suppliers  
SUPPLIER  
AVX  
Coilcraft  
Digi-Key  
EF Johnson  
Murata  
PHONE  
FAX  
____________________________Features  
843-448-9411  
847-639-6400  
800-344-4539  
402-474-4800  
770-436-1300  
843-626-3123  
847-639-1469  
218-681-3380  
402-474-4858  
770-436-3030  
SMA Connectors for All High-Speed I/Os  
Operational Mode Select Pins  
Loss-of-Lock LED  
Note: Please indicate that you are using the  
Single +3.3V Power-Supply Operation  
Fully Assembled and Tested  
MAX3872/MAX3874 when ordering from these suppliers.  
______________________________________________________________Component List  
DESIGNATION QTY  
C1–C7, C17–  
C19, C22, C24, 14  
C26, C28  
DESCRIPTION  
DESIGNATION QTY  
DESCRIPTION  
SMA connectors  
0.1µF 10% ceramic capacitors  
(0402)  
J1–J8, J25, J26 10 (edge-mount, round-pin)  
EF JOHNSON 142-0701-851  
J9, J12–J15,  
Murata GRM36X7R104K016A  
0.001µF 10% ceramic  
8
1
4
3-pin headers (0.1in centers)  
2-pin headers (0.1in centers)  
Not installed  
capacitors (0402)  
J17–J19  
J10  
C8–C13  
6
Murata GRM36X7R102K016A  
33µF 10% tantalum capacitor  
AVX TAJB336K016  
J11, J16, J22,  
C14  
C15  
1
1
J23  
Test points  
Digi-Key 5000K-ND  
Not installed  
2.2µF 10% tantalum capacitor  
AVX TAJB225K016  
J20, J21  
J24  
2
1
9
0.82µF ceramic capacitor  
J9, J10, J12–  
(0603) (MAX3872EVKIT)  
Shunts  
C16  
1
J15, J17–J19  
0.068µF ceramic capacitor  
MAX3872EGJ, 32-pin QFN  
(MAX3872EVKIT)  
(0402) (MAX3874EVKIT)  
D1  
D2  
R2–R5  
R6  
R7  
1
1
4
1
1
Red LED  
U1  
1
1
1
MAX3874EGJ, 32-pin QFN  
Not installed  
(MAX3874EVKIT)  
Not installed  
MAX3872/MAX3874 EV kit  
circuit board, Rev C  
None  
None  
9105% resistor (0402)  
Not installed  
50kvariable resistor  
BOURNS 3296W-203  
Not installed  
56nH inductors (0805)  
Coilcraft CS-560XKBC  
MAX3872 datasheet  
(MAX3872EVKIT)  
R8  
R9  
1
1
3
MAX3874 datasheet  
(MAX3874EVKIT)  
L1–L3  
_________________________________________________________________Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
MAX3872/MAX3874 Evaluation Kits  
Jitter analysis and product performance can also be  
_______________ Detailed Description  
The MAX3872/MAX3874 EV Kit is a fully assembled  
and factory tested demonstration board that enables  
testing of all MAX3872 and MAX3874 functions.  
observed by appropriately interfacing the EV kit with a  
bit-error-rate tester (BERT) and a jitter analyzer.  
Operational Modes  
The MAX3872/MAX3874 has three modes of  
operation: normal, system loopback, and clock  
holdover. The three operational modes are  
programmed by connecting the appropriate pins of  
JU13 (SIS) and JU14 (LREF). See Table 1. Normal  
operation mode requires a serial data stream at the  
SDI inputs, system loopback mode requires a serial  
data stream at the SLBI inputs, and clock holdover  
mode requires a reference clock signal at the SLBI  
inputs.  
Test Equipment Required  
+3.3V power supply with 200mA current capability  
Signal-source, 2.7Gbps minimum capability  
Jitter analyzer capable of 2.7Gbps performance  
Oscilloscope with at least 3GHz performance  
Test Equipment Interface  
The serial inputs (SDI±, SLBI±) and serial outputs  
(SDO±, SCLKO±) have on-board AC-coupling  
capacitors to allow direct connection to 50test  
equipment. The EV kit also has pads on the serial data  
and clock outputs (SDO±, SCLKO±) to allow on-board  
Normal and System Loopback Settings  
Three jumpers (RS1, RS2, RATESET) are available for  
setting the SDI or SLBI inputs to receive the  
appropriate data rate (Table 2). The FREFSET pin can  
be set high or low while in normal or system loopback  
mode.  
termination  
for  
coupling  
to  
high-impedance  
oscilloscopes.  
Quick Start (MAX3872 & MAX3874)  
This procedure will set up the evaluation board for  
2.48832Gbps normal operation mode, with input  
threshold adjust disabled.  
Clock Frequencies in Holdover Mode  
Set the incoming reference clock frequency and  
outgoing serial clock frequency by setting RS1, RS2,  
RATESET, and FREFSET appropriately. See Table 3.  
1) Place a shunt across pins 2 (SIS) and 3 (GND) of  
Auto Switch to Clock Holdover Mode  
To switch from normal mode to clock holdover mode  
automatically when there are no data transitions  
applied to the SDI inputs connect LOL directly to  
LREF by placing a shunt across pins 1 and 2 of J15.  
J13.  
2) Place a shunt across pins 1 (VCC) and 2 (LREF)  
of J14.  
3) Place a shunt across pins 2 and 3 of J15.  
4) Place a shunt across pins 2 (RS1) and 3 (GND) of  
Vertical Threshold Adjustment  
To compensate for optical noise presented on the data  
logic high caused by EDFAs in a WDM transmission  
system, an external analog control input is provided for  
adjusting the data decision threshold to an optimum  
level.  
J17.  
5) Place a shunt across pins 2 (RS2) and 3 (GND) of  
J18.  
6) Place a shunt across pins 2 (RATESET) and 3  
(GND) of J19.  
7) Place a shunt across pins 1 (VCC) and 2 (VCTRL)  
of J9.  
8) Remove the shunt from J10.  
To enable data decision threshold adjustment, place a  
shunt across pins 2 and 3 of J9 and shunt pins 1 and 2  
of J10. Set the decision threshold by adjusting the  
potentiometer R8. The center point for the decision  
threshold is 1.2V at the VCTRL pin.  
9) Place a shunt across pins 2 (FREFSET) and 3  
(GND) of J12.  
10) Connect a 2.48832Gbps PRBS NRZ signal to the  
serial data inputs (SDI±) with 50cables. Leave  
the SLBI inputs unconnected.  
11) Connect the serial data and clock outputs (SDO±,  
SCLKO±) to a 50high-speed oscilloscope.  
Terminate any unused outputs with 50to GND.  
Jumpers, Controls, Test Points  
Table 4 summarises the functions of all jumpers,  
controls, and test points of the MAX3872/MAX3874 EV  
Kit.  
12) Connect +3.3V to J20 (VCC) and ground to J21  
(GND).  
2 ________________________________________________________________________________________  
MAX3872/MAX3874 Evaluation Kits  
Table 1. Operational Mode Settings  
Table 2. Data Rate Settings  
SHUNT POSITIONS  
LREF (JU14) SIS (JU13)  
SHUNT POSITIONS  
INPUT DATA RATE  
MODE  
RS1  
RS2  
RATESET  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
2 and 3  
1 and 2  
2 and 3  
2.666Gbps  
2 and 3  
2 and 3  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
1 and 2  
1 and 2  
2 and 3  
2 and 3  
Normal  
1 and 2  
1 and 2  
2 and 3  
1 and 2  
2.488Gbps/2.5Gbps  
1.244Gbps/1.25Gbps*  
666.51Mbps*  
System Loopback  
(1 and 2) or  
(2 and 3)  
Clock Holdover  
2 and 3  
622.08Mbps*  
166.63Mbps*  
155.52Mbps*  
*Setting not available on the MAX3874  
Table 3. Clock Holdover Frequency Settings  
SHUNT POSITIONS  
REFERENCE CLOCK FREQUENCY  
SCLKO FREQUENCY  
RS1  
RS2  
RATESET  
1 and 2  
1 and 2  
1 and 2  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
1 and 2  
1 and 2  
1 and 2  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
FREFSET  
666.51MHz  
2.666GHz  
2 and 3  
2 and 3  
1 and 2  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
2 and 3  
1 and 2  
2 and 3  
1 and 2  
2 and 3  
1 and 2  
2 and 3  
2 and 3  
1 and 2  
2 and 3  
1 and 2  
2 and 3  
1 and 2  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
2 and 3  
1 and 2  
1 and 2  
1 and 2  
1 and 2  
1 and 2  
1 and 2  
1 and 2  
666.51MHz*  
666.51MHz  
666.51MHz*  
166.63MHz  
622.08MHz/625MHz*  
622.08MHz/625MHz  
622.08MHz*  
1.244GHz/1.25GHz  
2.488GHz/2.5GHz  
622.08MHz  
622.08MHz*  
155.52MHz  
166.63MHz  
2.666GHz  
166.63MHz*  
666.51MHz  
166.63MHz*  
166.63MHz  
155.52MHz/156.25MHz*  
155.52MHz/156.25MHz  
155.52MHz*  
1.244GHz/1.25GHz  
2.488GHz/2.5GHz  
622.08MHz  
155.52MHz*  
155.52MHz  
*Setting not available on the MAX3874  
_________________________________________________________________________________________  
3
MAX3872/MAX3874 Evaluation Kits  
Table 4. Jumpers, Controls, Test Points  
NAME  
TYPE  
DESCRIPTION  
NORMAL POSITION  
Enables/disables threshold adjust.  
Shunt is required on J10 when threshold adjust is  
enabled.  
Shunt pins 1 and 2  
J9  
3 Pin Header  
Threshold control disabled  
Connects VREF to VCTRL through R8 when  
threshold adjust is enabled.  
J10  
J11  
J12  
2 Pin Header  
3 Pin Header  
3 Pin Header  
Open  
Not installed  
Shunt pins 2 and 3  
See Tables 2 and 3  
Sets the reference clock frequency  
Shunt pins 2 and 3  
See Table 1  
J13  
J14  
3 Pin Header  
3 Pin Header  
Selects between SDI and SLBI inputs  
Enables/disables clock holdover mode  
Shunt pins 1 and 2  
See Table 1  
Connects LOL to LREF for automatic clock holdover  
mode or provides connection of J14 to LREF input.  
Shunt pins 2 and 3  
J15  
J16  
J17  
3 Pin Header  
2 Pin Header  
3 Pin Header  
LOL not connected to LREF  
Not installed  
Open  
Shunt pins 2 and 3  
See Tables 2 and 3  
Multi-Rate Select Input 1  
Shunt pins 2 and 3  
See Tables 2 and 3  
J18  
J19  
3 Pin Header  
3 Pin Header  
Multi-Rate Select Input 2  
VCO Select Input  
Shunt pins 2 and 3  
See Tables 2 and 3  
J20  
J21  
J22  
J23  
J24  
Test Point  
Test Point  
Power supply connection to VCC.  
Power supply connection to GND.  
Not installed  
Connected to VCC  
Connected to GND  
2 Pin Header  
2 Pin Header  
Test Point  
Open  
Open  
Not installed  
Not installed  
Threshold Control Potentiometer. Used in conjunction  
with J10 and J9 to set the SDI input threshold.  
R8  
Potentiometer  
4 ________________________________________________________________________________________  
MAX3872/MAX3874 Evaluation Kits  
VCC_VCO  
J20  
L1  
56nH  
C5  
0.1µF  
C8  
1000pF  
C11  
1000pF  
VCC  
VCC_OUT  
VCC  
C14  
33µF  
C15  
2.2µF  
C6  
0.1µF  
C9  
1000pF  
C12  
1000pF  
L2  
56nH  
J21  
L3  
56nH  
C7  
0.1µF  
C10  
1000pF  
C13  
1000pF  
GND  
C17  
0.1µ F  
R9  
OPEN  
VCC  
VCC  
J24  
J10  
J22  
R8  
50kΩ  
J11  
J12  
VCC  
VCC_OUT  
R2  
J9  
J23  
C22  
0.1µF  
OPEN  
J5  
J6  
SDO+  
VCC_OUT  
R3  
C1  
VCC_OUT  
0.1µF  
VCC  
J1  
1
24  
23  
22  
21  
20  
19  
18  
17  
SDI+  
VCC  
SDI+  
VCC_OUT  
SDO+  
C24  
0.1µF  
OPEN  
2
3
4
5
6
7
8
C2  
0.1µF  
SDO-  
J2  
J3  
J4  
SDI-  
SLBI+  
SLBI-  
SDI-  
SDO-  
VCC  
VCC_OUT  
VCC_VCO  
U1  
VCC_OUT  
R4  
C3  
0.1µF  
VCC  
SLBI+  
SLBI-  
SIS  
VCC_OUT  
SCLKO+  
SCLKO-  
VCC_VCO  
RATESET  
MAX3872  
C26  
0.1µF  
OPEN  
J7  
J8  
C4  
0.1µF  
SCLKO+  
VCC_OUT  
R5  
LREF  
VCC  
C28  
0.1µF  
OPEN  
SCLKO-  
J13  
VCC  
J15  
J19  
J16  
J14  
VCC  
VCC  
R6  
910  
C16  
D1  
0.82µF  
C18  
0.1µF  
C19  
0.1µF  
R7  
OPEN  
VCC_VCO  
J18  
J25  
J26  
J17  
D2  
OPEN  
Figure 1. MAX3872 EV Kit Schematic  
_________________________________________________________________________________________  
5
MAX3872/MAX3874 Evaluation Kits  
VCC_VCO  
VCC_OUT  
J20  
L1  
56nH  
C5  
0.1µF  
C8  
1000pF  
C11  
1000pF  
VCC  
C14  
C15  
33µF  
2.2µF  
C6  
0.1µF  
C9  
1000pF  
C12  
1000pF  
L2  
56nH  
VCC  
J21  
L3  
56nH  
C7  
0.1µF  
C10  
1000pF  
C13  
1000pF  
GND  
C17  
0.1µ F  
R9  
OPEN  
VCC  
VCC  
J24  
J10  
J22  
R8  
50kΩ  
J11  
J12  
VCC  
VCC_OUT  
R2  
J9  
J23  
C22  
0.1µF  
OPEN  
J5  
J6  
SDO+  
VCC_OUT  
R3  
C1  
VCC_OUT  
0.1µF  
VCC  
J1  
1
24  
23  
22  
21  
20  
19  
18  
17  
SDI+  
VCC  
SDI+  
VCC_OUT  
SDO+  
C24  
0.1µF  
OPEN  
2
3
4
5
6
7
8
C2  
0.1µF  
SDO-  
J2  
J3  
J4  
SDI-  
SLBI+  
SLBI-  
SDI-  
SDO-  
VCC  
VCC_OUT  
VCC_VCO  
U1  
VCC_OUT  
R4  
C3  
0.1µF  
VCC  
SLBI+  
SLBI-  
SIS  
VCC_OUT  
SCLKO+  
SCLKO-  
VCC_VCO  
RATESET  
MAX3874  
C26  
0.1µF  
OPEN  
J7  
J8  
C4  
0.1µF  
SCLKO+  
VCC_OUT  
R5  
LREF  
VCC  
C28  
0.1µF  
OPEN  
SCLKO-  
J13  
VCC  
J15  
J19  
J16  
J14  
VCC  
VCC  
R6  
910Ω  
C16  
D1  
0.068µF  
C18  
0.1µF  
C19  
0.1µF  
R7  
OPEN  
VCC_VCO  
J18  
J25  
J26  
J17  
D2  
OPEN  
Figure 2. MAX3874 EV Kit Schematic  
6 ________________________________________________________________________________________  
MAX3872/MAX3874 Evaluation Kits  
Figure 3. MAX3872/MAX3874 EV Kit Component  
Placement Guide—Component Side  
Figure 4. MAX3872/MAX3874 EV Kit PC Board Layout—  
Component Side  
Figure 5. MAX3872/MAX3874 EV Kit PC Board Layout—  
Ground Plane  
_________________________________________________________________________________________  
7
MAX3872/MAX3874 Evaluation Kits  
Figure 6. MAX3872/MAX3874 EV Kit PC Board Layout—  
Power Plane  
Figure 7. MAX3872/MAX3874 EV Kit PC Board Layout—  
Solder Side  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
8 ___________________ Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
2003 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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