MAX17613CATPT [MAXIM]
4.5V to 60V, 3A Current-Limiter with OV, UV and Reverse Protection;
| 型号： | MAX17613CATPT |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 4.5V to 60V, 3A Current-Limiter with OV, UV and Reverse Protection |
| 文件： | 总28页 (文件大小：827K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
General Description
Benefits and Features
● Robust Protection Reduces System Downtime
The Olympus series of ICs is the industry's smallest and
most robust integrated system protection solution. The
MAX17613A/MAX17613B/MAX17613C adjustable over-
voltage and overcurrent protection devices are ideal to
protect systems against positive and negative input volt-
age faults up to +60V and -65V, and feature low 130mΩ
• Wide Input-Supply Range of +4.5V to +60V
• Hot Plug-in Tolerant without TVS up to 35V Input
Supply
• Negative Input Tolerance up to -65V
• Low R
130mΩ (typ)
ON
(typ) R
FETs.
ON
• Reverse Current-Blocking Protection
• Thermal Overload Protection
The adjustable input overvoltage protection range is 5.5V
to 60V and the adjustable input undervoltage protec-
tion range is 4.5V to 59V. The input overvoltage-lockout
(OVLO) and undervoltage-lockout (UVLO) thresholds are
set using external resistors. Additionally, the devices offer
an internal input undervoltage threshold at 4.2V (typ).
• Programmable Startup Blanking Time
• Extended -40°C to +125°C Temperature Range
• MAX17613A Enables OV, UV, and Reverse Volt-
age Protection
• MAX17613B Enables OV and UV Protection
• MAX17613C Enables Reverse Voltage Protection
● Flexible Design Options Enable Reuse and Less
Requalification
The devices feature programmable current-limit protection
up to 3A; hence, controlling the inrush current at startup
while charging high capacitance at the output. The current-
limit threshold is programmed by connecting a resistor from
the SETI pin to GND. When the device current reaches
the programmed threshold, the device prevents further
increases in current by modulating the FET resistance. The
devices can be programmed to behave in three different
ways under current-limit condition: autoretry, continuous,
or latchoff modes. The voltage appearing on the SETI pin
is proportional to the instantaneous current flowing through
the device and can be read by an ADC.
• Adjustable OVLO and UVLO Thresholds
• Programmable Forward Current Limit:
0.15A to 3A with ±3.5% Accuracy
• Accuracy Over Full Temperature Range
• Programmable Overcurrent Fault Response:
Autoretry, Continuous, and Latchoff Modes
• Smooth Current Transitions
● Saves Board Space and Reduces External BOM
Count
• 20-Pin, 4mm x 4mm, TQFN-EP Package Integrat-
ed FETs
MAX17613A and MAX17613C block current flowing
in the reverse direction (i.e., from OUT to IN) whereas
MAX17613B allows current flow in the reverse direction.
The devices feature thermal shutdown protection against
excessive power dissipation.
Applications
● Sensor Systems
● Condition Monitoring
● Factory Sensors
The devices are available in a small, 20-pin (4mm x 4mm)
TQFN-EP package and operate over the -40°C to +125°C
extended temperature range.
● Process Instrumentation
● Weighing and Batching Systems
● Industrial Applications such as PLC, Control Network
Modules, Battery-Operated Modules
Ordering Information appears at end of data sheet.
19-100414; Rev 0; 2/19
MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Typical Operating Circuit
MAX17613A and MAX17613B
IN
OUT
V
PULLUP
C
IN
C
OUT
0.47µF
4.7µF
MAX17613A
MAX17613B
SYSTEM
R5
R6
10kΩ
10kΩ
SYSTEM POWER
R1
R3
SUPPLY
OPTIONAL FOR
HIGT INPUT
SURGE
CLMODE
OVLO
FLAG
FAULT
APPLICATIONS
UV/OV/FAULT
EN
UVOV
EN
GND
UVLO
SETI
ADC
TSTART
GND
R
SETI
R2
R4
MAX17613C
IN
OUT
V
PULLUP
C
IN
C
OUT
0.47µF
4.7µF
SYSTEM
MAX17613C
R5
10kΩ
R6
10kΩ
SYSTEM POWER
SUPPLY
OPTIONAL FOR
HIGT INPUT
SURGE
FORWARD
FAULT
FWD
APPLICATIONS
REVERSE FAULT
REV
CLMODE
EN
EN
TSTART
GND
SETI
ADC
GND
R
SETI
Maxim Integrated
│ 2
www.maximintegrated.com
MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Absolute Maximum Ratings
IN to GND...............................................................-70V to +65V
IN to OUT...............................................................-65V to +65V
OUT to GND .........................................................-0.3V to +65V
UVLO, OVLO to GND
IN Current (DC) ....................................................................3.3A
SETI to GND (Note1) ...........................................-0.3V to +1.6V
Continuous Power Dissipation
(T = +70°C, derate 30.3mW/°C above +70°C).....2424.2mW
A
(MAX17613A and MAX17613B)....................................-0.3V to
Extended Operating Temperature Range
(max (V ,V
)+0.3V)
(Note 2)............................................................... -40°C to +125°C
Junction Temperature Range ........................... -40°C to +150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (Soldering, 10s).................................+300°C
IN OUT
EN, CLMODE, TSTART to GND .............................-0.3V to +6V
UVOV, FLAG to GND
(MAX17613A and MAX17613B).......................-0.3V to +6.0V
FWD, REV to GND (MAX17613C)..........................-0.3V to +6V
Note 1: The SETI pin is internally clamped. Forcing more than 5mA current into the pin can damage the device.
Note 2: Junction temperature greater than +125ºC degrades operating life times.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 20 TQFN
Package Code
T2044+4C
21-100172
90-0409
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD:
Junction to Ambient (θ
)
33ºC/W
2ºC/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V = +4.5 to +60V, T = -40°C to +125°C unless otherwise noted. Typical values are at V = +24V, T = +25°C, R
= 1.5kΩ.) (Note 3)
IN
A
IN
A
SETI
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
IN Voltage Range
V
4.5
60
66
V
IN
Shutdown Input Current
Shutdown Output Current
Reverse Input Current
Supply Current
I
V
V
V
V
V
V
= 0V
28
μA
µA
µA
mA
SHDN
EN
I
= 0V, V
= 0V (V = 60V)
-2
OFF
EN
OUT
IN
I
= -60V, V
= 0V
OUT
-85
-50
0.88
4.2
IN_RVS
IN
IN
IN
IN
I
= 24V
1.2
4.5
IN
rising
3.46
1.45
Internal Undervoltage Trip Level
V
falling
3.5
UVLO, OVLO Reference
V
MAX17613A and MAX17613B
MAX17613A and MAX17613B
1.5
1.55
V
REF
UVLO, OVLO Threshold Hysteresis
3.3
%
V
= V
MAX17613A and
MAX17613B
UVLO
OVLO
UVLO, OVLO Leakage Current
OVLO Adjustment Range
I
-100
5.5
+100
60
nA
V
LEAK
= 0V to 2V.
MAX17613A and MAX17613B (Note 4)
Maxim Integrated
│ 3
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Electrical Characteristics (continued)
(V = +4.5 to +60V, T = -40°C to +125°C unless otherwise noted. Typical values are at V = +24V, T = +25°C, R
= 1.5kΩ.) (Note 3)
IN
A
IN
A
SETI
PARAMETER
SYMBOL
CONDITIONS
MAX17613A and MAX17613B (Note 4)
MIN
4.5
3
TYP
MAX UNITS
UVLO Adjustment Range
Internal POR
59
V
V
4.3
INTERNAL FETs
I
I
I
= 100mA,V > 8V, T = 25°C
130
155
200
LOAD
LOAD
LOAD
IN
J
= 100mA,V > 8V, T = 85°C
IN
J
Internal FETs On-Resistance
R
mΩ
ON
= 100mA,V > 8V, -40°C ≤ T ≤
IN
J
230
125°C
Current-Limit Adjustment Range
Current-Limit Accuracy
I
(Note 5)
0.15A ≤ I
0.15
-3.5
3
A
LIM
≤ 3A
+3.5
%
LIM
Increase (V - V
) drop until FLAG
IN
OUT
FLAG Assertion Drop Voltage
Threshold
V
400
500
600
mV
asserts, V = 24V (MAX17613A and
FA
IN
MAX17613B)
FWD Assertion Drop Voltage
Threshold
Increase (V - V
asserts, V = 24V (MAX17613C)
IN
) drop until FWD
IN
OUT
400
2
500
11
600
20
mV
mV
μs
Reverse Current Blocking Slow-
Threshold
V
V
- V (MAX17613A and MAX17613C)
RIBS
OUT IN
Reverse Current Blocking
Debounce Blanking Time
t
MAX17613A and MAX17613C
MAX17613A and MAX17613C
100
14.4
70
140
16
180
17.6
140
DEBRIB
Reverse Current Blocking Powerup
Blanking Time
t
ms
mV
BLKRIB
Reverse Current Blocking Fast-
Threshold
V
V
-V (MAX17613A and MAX17613C).
105
RIBF
OUT IN
Time from when I
crosses 55A and
REVERSE
Reverse Current Blocking Fast
Response Time
t
I
reaches its peak.
150
250
ns
RIB
REVERSE
(MAX17613A and MAX17613C) (Note 6)
Current into OUT when (V - V
130mV (MAX17613A and MAX17613C)
>
IN)
OUT
Reverse Blocking Supply Current
I
0.92
1.25
mA
RBL
SETI
R
x I
V
1.5
V
SETI
LIM
RI
0.15A ≤ I ≤ 0.3A
2910
2940
1.6
3000
3000
3090
3060
2.2
IN
Current Mirror Output Ratio
C
A/A
IRATIO
0.3A ≤ I ≤ 3A
IN
Internal SETI Clamp
SETI Leakage Current
LOGIC INPUT
5mA into SETI
V
V
= 1.6V
-0.1
+0.1
μA
SETI
EN Input Logic High
EN Input Logic Low
EN Pullup Voltage
EN Input Current
V
1.4
V
V
IH
V
0.4
2
IL
EN pin unconnected. V = 60V
1.4
60
V
IN
V
V
= 5.5V
= 0.4V
95
12
4.9
μA
μA
V
EN
EN Pullup Current
CLMODE Input Logic High
2.2
2
5.8
3.8
EN
Maxim Integrated
│ 4
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Electrical Characteristics (continued)
(V = +4.5 to +60V, T = -40°C to +125°C unless otherwise noted. Typical values are at V = +24V, T = +25°C, R
= 1.5kΩ.) (Note 3)
IN
A
IN
A
SETI
PARAMETER
SYMBOL
CONDITIONS
MIN
0.25
8
TYP
MAX UNITS
CLMODE Input Logic Low
0.60
10
0.95
12
V
CLMODE Pullup Input Current
µA
FLAG, UVOV OUTPUTs
FLAG, UVOV Output Logic Low
I
= 1mA (MAX17613A and
SINK
0.4
1
V
MAX17613B)
= V = V = 5V, FLAG, and
UVOV
Voltage
V
IN
FLAG
FLAG, UVOV Output Leakage
Current
μA
UVOV deasserted (MAX17613A and
MAX17613B)
FWD, REV OUTPUTs
FWD, REV Output Logic Low
Voltage
I
= 1mA (MAX17613C)
0.4
1
V
SINK
V
= V
= V
= 5V,
IN
FWD
REV
μA
FWD, REV Output Leakage Current
TSTART STARTUP
FWD, and REV deasserted (MAX17613C)
V
TSTART-
REF
TSTART Reference Voltage
TSTART Output Current
1.425
4.5
1.5
5
1.575
5.5
V
µA
Ω
I
TSTART
TSTART Internal Shunt Discharge
Resistance
R
Discharging Resistance
260
TSTART
t
TSTART-
TSTART Unconnecting Check Time
Interval
100
100
μs
UNCON-
NECTED
t
TSTART-
DEFAULT
TSTART default interval
TIMING CHARACTERISTICS
Switch Turn-On Time
90
110
ms
t
V
R
= 24V, R
= 1kΩ, C
= 0µF,
ON_
IN
LOAD
LOAD
2
3.3
1.3
ms
µs
= 1.5kΩ
SWITCH
SETI
From (V going from V
- 1V to
IN_OVLO
IN
V
V
+ 1V in 10ns) to (V
); R
= 80% of
IN_OVLO
OUT
Overvoltage Switch Turn-Off Time
t
0.8
OFF_OVP
= 1kΩ (MAX17613A and
IN_OVLO
LOAD
MAX17613B)
Overvoltage Falling Edge
Debounce Time
t
10
μs
μs
DEB_OVP
I
= 3A, C
= 0µF, I
step from
OUT
LIM
LOAD
Overcurrent Protection Response
Time
t
1.5A to 3A. Time to regulate I
limit.
to current
100
OCP_RES
OUT
From (V
< V < V
)
IN_UVLO
IN
IN_OVLO
and (EN = High) to V
Elapses only at power-up. (MAX17613A and
MAX17613B)
= 10% of V .
OUT
IN
IN Debounce Time
t
14.4
16
60
17.6
ms
DEB
Current-Limit Smooth-Transition
Time
t
μs
REF_RAMP
Maxim Integrated
│ 5
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Electrical Characteristics (continued)
(V = +4.5 to +60V, T = -40°C to +125°C unless otherwise noted. Typical values are at V = +24V, T = +25°C, R
= 1.5kΩ.) (Note 3)
IN
A
IN
A
SETI
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Current-Limit Blanking Time
Current-Limit Autoretry Time
t
18
20
22
ms
BLANK
After blanking time from I
FLAG deasserted ( MAX17613A and
MAX17613B) (Note 7)
> I
to
OUT
LIM
t
900
900
1000
1100
RETRY
ms
After blanking time from I
deasserted (MAX17613C) (Note 7)
> I
to FWD
OUT
LIM
1000
1100
THERMAL PROTECTION
Thermal Shutdown
T
155
15
C
JC_MAX
Thermal Shutdown Hysteresis
T
°C
JC_HYS
Note 3: All devices are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed by
A
design; not production tested.
Note 4: User settable. See overvoltage/undervoltage lockout instructions.
Note 5: The current limit can be set below 150mA with a decreased accuracy.
Note 6: Guaranteed by design, not production tested.
Note 7: The ratio between autoretry time and blanking time is fixed and equal to 50.
Typical Operating Characteristics
(C = 0.47μF, C
= 4.7μF, V = 24V, T = +25°C, unless otherwise noted.)
IN A
IN
OUT
NORMALIZED ON-RESISTANCE
vs. SUPPLY VOLTAGE
IN SUPPLY CURRENT vs. SUPPLY VOLTAGE
IN SUPPLY CURRENT vs. TEMPERATURE
toc01
toc02
toc03
1.00
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.10
1.05
1.00
0.95
0.90
NORMALIZED TO
VIN = 24V
IOUT = 100mA
SETI UNCONNECTED
SETI UNCONNECTED
T
= +25°C
A
0.95
0.90
0.85
0.80
0.75
0.70
T
= -40°C
A
T
= +125°C
A
4
12
20
28
36
44
52
60
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
4
12
20
28
36
44
52
60
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Maxim Integrated
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Typical Operating Characteristics (continued)
(C = 0.47μF, C
= 4.7μF, V = 24V, T = +25°C, unless otherwise noted.)
IN
OUT
IN A
NORMALIZED ON-RESISTANCE
vs. TEMPERATURE
NORMALIZED CURRENT LIMIT
vs. TEMPERATURE
NORMALIZED CURRENT LIMIT
vs. SUPPLY VOLTAGE
toc04
toc06
toc05
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
1.03
1.02
1.01
1.00
0.99
0.98
0.97
NORMALIZED TO
NORMALIZED TO
= +25°C
V
= +24V
NORMALIZED TO T = +25oC
A
IN
T
R
A
R
= 1.5kΩ
SETI
= 1.5kΩ
SETI
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
4
12
20
28
36
44
52
60
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
NORMALIZED UVLO THRESHOLD
vs. TEMPERATURE
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
NORMALIZED OVLO THRESHOLD
vs. TEMPERATURE
toc09
toc07
toc08
50
45
40
35
30
25
20
15
10
5
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
NORMALIZED TO
NORMALIZED TO
TA = +25oC
V
= +24V
IN
T
= +25°C
EN = LOW
OUT = GND
A
0
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
SHUTDOWN REVERSE CURRENT
vs. TEMPERATURE
SWITCH TURN-OFF TIME vs. TEMPERATURE
SWITCH DEBOUNCE TIME vs. TEMPERATURE
toc12
toc10
toc11
120
-20
-25
-30
-35
-40
-45
-50
V
= -24V
17.8
EN TRANSITION TO IOUT FALLING
TO 10% OF INITIAL VALUE
RL = 240Ω
IN
118
116
114
112
110
108
106
104
102
100
EN = LOW
OUT = GND
17.4
17.0
16.6
16.2
15.8
15.4
15.0
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
-50 -25
0
25 50 75 100 125 150
TEMPERATURE (°C)
Maxim Integrated
│ 7
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Typical Operating Characteristics (continued)
(C = 0.47μF, C
= 4.7μF, V = 24V, T = +25°C, unless otherwise noted.)
IN
OUT
IN A
CURRENT LIMIT vs. RSETI
MAX17613A, POWER-UP RESPONSE
REVERSE-BLOCKING RESPONSE
toc15
toc13
toc14
3.25
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
35V
V
V
24V
20V/div
20V/div
IN
IN
20V/div
20V/div
V
OUT
V
OUT
V
FLAG
5V/div
1A/div
V
I
UVOV
5V/div
IC
I
IC
100mA/div
4µs/div
0
5
10
15
4ms/div
= 4.7µF, I
RSETI (kΩ)
CONDITIONS: C
= 0.3A, MODE = AUTORETRY
LIMIT
OUT
THERMAL SHUTDOWN DUE TO
OUTPUT SHORT CIRCUIT
OUTPUT SHORT-CIRCUIT RESPONSE
CURRENT-LIMIT RESPONSE
toc18
toc16
toc17
V
20V/div
20V/div
V
VIN
20V/div
IN
20V/div
20V/div
5V/div
IN
V
OUT
VOUT
V
OUT
20V/div
5V/div
1A/div
V
5V/div
FLAG
V
VFLAG
FLAG
I
200mA/div
OUT
I
IN
2A/div
IIN
100ms/div
1ms/div
10ms/div
CONDITIONS: I
= 1.5A, I = 100mA TO 1.5A
L
CONDITIONS: I
= 3A, MODE = AUTORETRY
CONDITIONS: ILIMIT = 1.5A, MODE = AUTORETRY
LIMIT
LIMIT
SHORT ON OUTPUT
CURRENT SENSE RATIO vs. OUTPUT CURRENT
STARTUP TIME vs. CTSTART CAPACITOR
AUTORETRY TIME (tRETRY
)
toc19
toc20
toc21
3000
100.0
10.0
1.0
2980
2960
2940
2920
2900
2880
2860
2840
2820
2800
V
20V/div
IN
V
20V/div
5V/div
OUT
V
FLAG
I
200mA/div
OUT
0.1
400ms/div
1
10
CTSTART (nF)
100
0.0
0.5
1.0
1.5
2.0
2.5
3.0
CONDITIONS: I
= 0.3A, MODE = AUTORETRY
OUTPUT CURRENT (A)
LIMIT
Maxim Integrated
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Typical Operating Characteristics (continued)
(C = 0.47μF, C
= 4.7μF, V = 24V, T = +25°C, unless otherwise noted.)
IN
OUT
IN A
OVP OVERVOLTAGE CUTOFF RESPONSE
TURN ON CONTROL THROUGH EN
toc22
toc23
V
20V/div
5V/div
5V/div
IN
OVLO
V
UVOV
5V/div
EN
V
V
OUT
20V/div
OUT
20V/div
I
200mA/div
I
IC
500mA/div
IC
4ms/div
= 0.3A, MODE: AUTORETRY
4ms/div
CONDITIONS: I
= 3A, MODE = AUTORETRY
CONDITIONS: I
LIMIT
LIMIT
TURN-OFF CONTROL THROUGH EN
OUTPUT HOT SHORT FAST TRIP RESPONSE
toc25
toc24
VIN
VIN
20V/div
5V/div
20V/div
VOUT
EN
20V/div
200mA/div
5V/div
IIC
VOUT
IIC
20V/div
500mA/div
VFLAG
2ms/div
4ms/div
60V REVERSE INPUT SUPPLY PROTECTION
OUTPUT HOT SHORT FAST TRIP RESPONSE
RESPONSE
( ZOOMED )
toc26
toc27
V
50V/div
IN
V
20V/div
OUT
V
V
20V/div
5V/div
FLAG
5V/div
20V/div
5A/div
IN
V
OUT
V
FLAG
I
IC
I
IC
10A/div
4µs/div
2µs/div
Maxim Integrated
│ 9
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Pin Configuration
MAX17613A and MAX17613B
TOP VIEW
15
14
13
12
11
NC 16
10
9
UVOV
EN
17
18
19
20
NC
NC
NC
MAX17613A
MAX17613B
8
GND
7
SETI
+
6
CLMODE
NC
1
2
3
4
5
MAX17613C
TOP VIEW
NC 16
15
14
13
12
11
10
9
REV
17
18
19
20
EN
NC
NC
NC
8
GND
SETI
CLMODE
MAX17613C
7
+
6
NC
1
2
3
4
5
Maxim Integrated
│ 10
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Pin Description
PIN
NAME
FUNCTION
MAX17613A,
MAX17613B
MAX17613C
Input Pins. Use a low-ESR ceramic capacitor to enhance ESD protection. For Hot Plug-
in applications, see the Applications Information section.
1-3
1-3
—
IN
UVLO Adjustment. Connect resistive potential divider from IN to GND to set the UVLO
threshold.
4
5
UVLO
OVLO
OVLO Adjustment. Connect resistive potential divider from IN to GND to set the OVLO
threshold.
—
Current-Limit Mode Selector. Connect CLMODE to GND for Continuous mode. Con-
6
7
6
7
CLMODE nect a 150kΩ resistor between CLMODE and GND for latchoff mode. Leave CLMODE
unconnected for autoretry mode.
Overcurrent-Limit Adjustment Pin and Current Monitoring Output. Connect a resistor
SETI
from SETI to GND to set overcurrent limit. See the Setting the Current-Limiting Thresh-
old (ILIM) section.
8
9
8
9
GND
EN
Ground
Active High Enable Input. Internally pulled up to 1.8V. Leave it unconnected for always
on operation.
Open-Drain, Fault Indicator Output. UVOV goes low with any of the following
• Input voltage falls below UVLO threshold.
• Input voltage rises above OVLO threshold.
10
—
—
UVOV
REV
10
Open-Drain, Fault Indicator Output. REV goes low when reverse current is detected.
Open-Drain, Fault Indicator Output. FLAG goes low with any of the following
• Overcurrent duration exceeds the blanking time.
• Overcurrent duration exceeds the startup blanking time.
• Reverse current is detected.
11
—
FLAG
FWD
• Thermal shutdown is active.
• R
is less than 1.5kΩ (max).
SETI
Open-Drain, Fault Indicator Output. FWD goes low when:
• Overcurrent duration exceeds the blanking time.
• Overcurrent duration exceeds the startup blanking time.
• Thermal shutdown is active.
—
11
12
• R
is less than 1.5kΩ (max).
SETI
Programmable Startup Blanking Time. Connect a capacitor from TSTART to GND
to set the desired startup blanking time. Leaving the pin unconnected enables the
TSTART TSTART pin to charge faster, If the TSTART pin voltage charges within 100µs, a default
blanking time of 100ms is set as startup time. See the Programming Startup Blanking
Time (TSTART) section for more details.
12
Output Pins. For a long output cable or inductive load, see the Applications Information
section.
13-15
16-20
13-15
OUT
4, 5, 16-20
NC
EP
Not Connected
Exposed Pad. Connect EP to a large GND plane with several thermal vias for best
thermal performance. Refer to the MAX17613A/B/C EV kit data sheet for a reference
layout design.
—
—
Maxim Integrated
│ 11
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Functional Diagrams
MAX17613A and MAX17613B
IN
IN
IN
OUT
I
FET
Q1
Q2
OUT
I
/C
OUT
FET IRATIO
CURRENT
REGULATION
I
/C
FET IRATIO
SETI
HV FET
CONTROL
1.5V
UVOV
FLAG
REVERSE
PROTECTION
(MAX17613A only)
1.5V
OVLO
UVLO
1.5V
CONTROL
LOGIC
1.8V
5µA
TSTART
EN
CLMODE
THERMAL
SHUTDOWN
GND
Maxim Integrated
│ 12
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Functional Diagrams (continued)
MAX17613C
IN
OUT
I
FET
Q1
Q2
IN
OUT
I
/C
IN
OUT
FET IRATIO
CURRENT
REGULATION
I
/C
FET IRATIO
SETI
HV FET
CONTROL
1.5V
REV
REVERSE
PROTECTION
FWD
5µA
TSTART
CONTROL
LOGIC
1.8V
CLMODE
EN
THERMAL
SHUTDOWN
GND
Maxim Integrated
│ 13
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Typical Operating Circuit to adjust the UVLO threshold
voltage. Use the following equation to adjust the UVLO
threshold. The recommended value of R1 is 2.2MΩ.
Detailed Description
The MAX17613A/MAX17613B/MAX17613C overvoltage
and overcurrent protection devices offer adjustable pro-
tection boundaries for systems against input positive and
negative faults up to +60V and -65V, and output load cur-
rent up to 3A. The devices feature two internal MOSFETs
R1
V
= V
× 1 +
[
UVLO
REF
]
R2
where V
= 1.5V.
connected in series with a low cumulative R
of 130mΩ
REF
ON
(typ). The devices block out negative input voltages com-
pletely. Input undervoltage protection can be programmed
between 4.5V and 59V, while the overvoltage protection
can be independently programmed between 5.5V and
60V. Additionally, the devices have an internal default
undervoltage lockout set at 4.2V (typ). The devices are
enabled or disabled through the EN pin by a master
supervisory system; hence, offering a switch operation to
turn on or turn off power delivery to connected load.
All three devices have an input UVLO threshold set at
4.2V (typ). MAX17613C has no UVLO pin to adjust the
UVLO threshold voltage externally.
Overvoltage Lockout (OVLO)
MAX17613A and MAX17613B have OVLO adjustment
range from 5.5V to 60V. Connect an external resistive
potential divider to the OVLO pin as shown in the Typical
Operating Circuit to adjust OVLO threshold voltage. Use
the following equation to adjust OVLO threshold. The rec-
ommended value of R3 is 450kΩ–500kΩ.
The current through the devices is limited by setting a cur-
rent limit, which is programmed by a resistor connected
from SETI to GND. The current limit can be programmed
between 0.15A to 3A. When the device current reaches
or exceeds the set current limit, the on-resistance of the
internal output NFET Q2 is modulated to limit the current
to set limits. The devices offer three different behavioral
modes when under current-limited operations: autoretry,
continuous, and latchoff modes. The SETI pin also pres-
ents a voltage with reference to GND, which under normal
operation is proportional to the device current. The volt-
age appearing on the SETI pin can be read by an ADC on
the monitoring system for recording instantaneous device
current. To avoid oscillation, do not connect more than
10pF to the SETI pin.
R3
R4
V
= V
× 1 +
[
OVLO
REF
]
where V
= 1.5V.
REF
The MAX17613C device has no OVLO pin to adjust the
OVLO threshold voltage.
The OVLO reference voltage (V
) is set at 1.5V. If the
REF
voltage at the OVLO pin exceeds V
for time equal to
REF
overvoltage switch turn-off time (t
), the switch is
OFF_OVP
turned off and UVOV is asserted. When the OVLO condi-
tion is removed, the device takes overvoltage falling edge
debounce time (t
) to start the switch turn-on pro-
DEB_OVP
cess. The switch turns back on after switch turn-on time
(t ) and UVOV is deasserted. Figure 1 depicts
The devices offer status signals to indicate different oper-
ational and fault signals. MAX17613A and MAX17613B
offer FLAG and UVOV signals, while MAX17613C offers
FWD and REV signals. All status signal pins are open
drain in nature and require external pullup resistors to
appropriate system interface voltage. MAX17613A and
MAX17613C block reverse current flow (from OUT to IN)
while MAX17613B allows reverse current flow. All three
devices offer internal thermal shutdown protection against
excessive power dissipation.
ON_SWITCH
a typical behavior in overvoltage condition.
t
t
DEB_OVP
OFF_OVP
t
ON_SWITCH
1.5V (typ)
OVLO
OUTPUT NFET
Q2 STATUS
ACTIVE/ON
OFF
UVOV
Undervoltage Lockout (UVLO)
MAX17613A and MAX17613B have UVLO adjustment
range from 4.5V to 59V. Connect an external resis-
tive potential divider to the UVLO pin as shown in the
NOTE: TIME NOT TO SCALE
Figure 1. Overvoltage Fault Timing Diagram
Maxim Integrated
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Do not use R
current-limit thresholds for different resistor values.
smaller than 1.5kΩ. Table 1 shows
Input Debounce Protection
SETI
The device features input debounce protection. The
device starts operation (turn on the internal FETs) only if
the input voltage is higher than the UVLO threshold for a
When the device current reaches or exceeds the set cur-
rent limit during overload, short-circuit or during startup
cycle charging large capacitance, the on-resistance of
the internal output NFET Q2 is modulated to limit the
current to set limits, resulting in the output voltage droop
and increased power dissipation in the device. If the
device junction temperature reaches the thermal shut-
period greater than the debounce time (t
). The t
DEB
DEB
elapses only at power-up of the devices. This feature is
intended for applications where the EN signal is present
when the power supply ramps up. Figure 2 depicts a typi-
cal debounce timing diagram.
down threshold T
and FLAG (or FWD) is asserted. The output NFET Q2
turns back on in current-limit mode only after the junc-
tion temperature cools down by T
feature read out of the current flowing into the IN pin. A
current mirror, with a ratio of C , is implemented,
the output NFET Q2 turns off
JC_MAX
Enable (EN)
The device can be enabled or disabled through the EN pin
by driving it above or below EN threshold voltage. Hence
the device can be used to turn on or off power delivery to
connected loads using the EN pin.
. The devices
JC_HYS
IRATIO
using a current-sense auto-zero operational amplifier. The
mirrored current flows out through the SETI pin, into the
external current-limit resistor. The voltage on the SETI pin
provides information about IN current with the following
relationship:
Setting the Current-Limiting Threshold (ILIM)
During overload events, the device continuously regu-
lates the device current to the overcurrent limit I
pro-
LIM
grammed by the resistor R
connected at the SETI
SETI
pin. The current limit can be programmed between 0.3A
to 3A. Use the following equation to calculate current-limit
setting resistor:
3 × V
SETI
I
=
IN − OUT
R
SETI
4500
If SETI is left unconnected, V
regulator does not allow any current to flow. During start-
≥ 1.5V. The current
SETI
R
=
I
SETI
LIM
up, this causes the switches to remain off and FLAG (or
where,
is the desired current limit in mA and R
FWD) to assert after t
elapses. During startup,
BLANK
270μA current is forced to flow through R
. If the volt-
SETI
I
is in kΩ.
SETI
LIM
age at SETI is below 150mV, the switches remain off and
FLAG (or FWD) asserts.
Table 1. Current-Limit Threshold vs.
SETI Resistor Values
< t
< t
t
DEB
DEB
DEB
OVLO
UVLO
R
(kΩ)
CURRENT LIMIT I
(A)
LIM
SETI
15.00
0.3
1.0
2.0
2.5
3.0
V
IN
4.53
2.26
1.80
1.50
ACTIVE/ON
OUTPUT NFET
Q2 STATUS
OFF
NOTE: TIME NOT TO SCALE
Figure 2. Debounce Timing Diagram
Maxim Integrated
│ 15
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
For the given output capacitor, the startup capacitor
Programming Startup Blanking
Time (TSTART)
(C
) is calculated to be
TSTART
The MAX17613A/MAX17613B/MAX17613C devices offer
a programmable startup blanking time that enables charg-
ing the large capacitances on the output during startup
and when recovering from a fault condition. Connecting
a capacitor from the TSTART pin to GND programs the
C
× V
3.33 ×
OUT(MAX)
IN(MAX)
C
≥
TSTART
I
LIM
The startup time (t
) is related to the startup capac-
itor by the following equation:
TSTART
startup blanking time. t
is the time allowed for
TSTART
V
OUT
to reach the designated value (V - V ) before
t
= 300 × C
IN FA
TSTART
TSTART
the device enter in to fault mode. If the output voltage
doesn't charge to its nominal set voltage (V - V
where,
)
FA
IN
within the programmed time (t
), then the FLAG (or
TSTART
C
C
V
is in nF,
TSTART
FWD) is asserted and both the MOSFETs are turned off.
In order to allow the charging of large capacitances in all
conditions, thermal fault does not induce a retry cycle (or
a latchoff) during the startup phase rather a thermal and
recycling happens as explained in the Thermal Shutdown
= Maximum output capacitance in μF,
OUT(MAX)
= Maximum input voltage in V,
IN(MAX)
I
t
= Programmed current limit in mA,
LIM
is in μs.
TSTART
Protection section. In order to program t
, the
TSTART
If the TSTART pin is left unconnected, a situation that
would correspond to a very short t , the minimum
startup time is internally set to a default interval. If the
capacitor C
connected to the TSTART pin is
TSTART
charged with a constant current of 5μA. When the volt-
age on the capacitor reaches 1.5V, t is considered
expired and the capacitor is discharged to ground.
TSTART
TSTART
voltage threshold is crossed in less than t
TSTART-UNCON-
, the pin is considered unconnected and the
NECTED
C
device applies a preset startup time t
Figure 3 depicts the startup behavior with and without a
capacitor at the TSTART pin.
.
TSTART-DEFAULT
TSTART
t
=
× 1.5
TSTART
5μ
The following table presents C
required for differ-
TSTART
Current Limit Type Selection (CLMODE)
ent t
durations.
TSTART
The CLMODE pin shall be used to program the overcur-
rent response of the device in one of the three modes.
Connect a 150kΩ resistor between CLMODE and GND
for latchoff current-limit mode. Connect CLMODE to GND
for continuous current-limit mode. Leave the CLMODE pin
unconnected for autoretry current-limit mode.
Table 2. C
vs. t
TSTART
TSTART
t
(ms)
C
(nF)
TSTART
TSTART
15
50
In all the three current-limit modes, if the current through
the device reaches or exceeds the current-limit threshold,
the device limits output current to the programmed current
limit by modulating the internal output NFET Q2 on-state
resistance.
60
200
300
100
1000
Left open
Maxim Integrated
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
t
TSTART-UNCONNECTED
V
(1.5V typ)
TSTART-REF
V
TSTART
t
TSTART
GREATER THAN t
TSTART-DEFAULT
(a) t
TSTART
t
TSTART-UNCONNECTED
V
(1.5V typ)
TSTART-REF
V
TSTART
t
TSTART
(b) t
TSTART
LOWER THAN t , BUT GREATER THAN t
START-DEFAULT TSTART-UNCONNECTED
t
TSTART-UNCONNECTED
V
(1.5V typ)
TSTART-REF
V
TSTART
t
(100ms typ)
TSTART-DEFAULT
(c) WITH TSTART PIN UNCONNECTED OR WITH C
CAPACITOR
TSTART
CORRESPONDING TO t
< t
TSTART TSTART-UNCONNECTED
NOTE: NOT TO SCALE
Figure 3. Startup Behavior with Respect to C
TSTART
Maxim Integrated
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
timer resets, the FLAG (or FWD) pin asserts, the output
NFET Q2 is not turned off, and the operation continues. If
the device enters thermal shutdown mode, the FLAG (or
FWD) pin asserts and the output NFET Q2 turns off and
it turns back on after the junction temperature cools down
Continuous Current-Limit Mode
In continuous current-limit mode during startup, the
device starts as the startup blanking time (t
) inter-
TSTART
val starts. The timer t
resets if the output voltage
TSTART
V
OUT
reaches (V - V ) within t
and then the
IN
FA
TSTART
by T
. The FLAG (or FWD) deasserts after V
JC_HYS
OUT
normal operation continues. If the output voltage V
OUT
TSTART
reaches (V - V ). Figure 4 depicts a typical startup
IN
FA
does not reach (V - V ) within t
, the t
IN
FA
TSTART
behavior in continuous current-limit mode.
tDEB
tTSTART
VIN
VIN - VFA
VOUT
ILIM
IOUT
DEVICE ENTERS THERMAL
SHUTDOWN MODE
DEVICE COMES OUT OF
THERMAL SHUTDOWN
FLAG (or) FWD
V
(1.5V typ)
TSTART-REF
VTSTART
NOTE: NOT TO SCALE
Figure 4. Startup Fault Timing Diagram in Continuous Current-Limit Mode
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
In continuous current-limit mode during normal operation,
the output NFET Q2 is not turned-off and the operation
continues. If the device enters thermal shutdown mode,
FLAG (or FWD) pin asserts and the output NFET Q2
turns off and it turns back on after the junction tempera-
if the device enters an overcurrent condition the t
BLANK
timer starts. The t
timer resets when the overcur-
BLANK
rent condition resolves before the t
duration has
BLANK
elapsed and then the normal operation continues. If the
ture cools down by T
. FLAG (or FWD) deasserts
IN FA
JC_HYS
overcurrent condition exists for the t duration, the
after V
reaches (V - V ). Figure 5 depicts a typical
BLANK
OUT
t
timer resets, the FLAG (or FWD) pin asserts,
operating behavior in continuous current-limit mode.
BLANK
OVERCURRENT EVENT
t
BLANK
OVERCURRENT CONDITION
REMOVED
V
OUT
V
- V
FA
IN
I
LIM
I
OUT
DEVICE ENTER INTO
DEVICE COMES OUT OF
THERMAL SHUTDOWN MODE
THERMAL SHUTDOWN MODE
FLAG (or) FWD
NOTE: NOT TO SCALE
Figure 5. Overcurrent Fault Timing Diagram in Continuous Current-Limit Mode
Maxim Integrated
│ 19
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
out of thermal shutdown mode, if it was entered. During
Autoretry Current-Limit Mode
In autoretry current-limit mode during startup, the device
operates in continuous current-limit mode until t
t
time, the output NEFT Q2 remains off. Once
RETRY
the t
time has elapsed, the device reinitiates the
RETRY
.
TSTART
startup cycle again. If the overcurrent fault still exists,
the autoretry startup cycle is repeated and the FLAG (or
FWD) pin remains asserted. If the overcurrent condition
The timer t
resets if the output voltage V
TSTART
OUT
reaches (V - V ) within t and then the normal
IN
FA
TSTART
operation continues. If the overcurrent condition is pres-
is resolved, and the output voltage (V
) reaches (V
OUT
IN
ent for startup blanking time (t ), the output NFET
TSTART
- V ) the output NFET Q2 stays on and the FLAG (or
FA
Q2 is turned off, the timer t
resets, and the FLAG
TSTART
FWD) deasserts. Figure 6 depicts a typical startup behav-
(or FWD) pin asserts. A retry time delay (t
) starts
RETRY
ior in autoretry current-limit mode.
after t
has elapsed and after the device comes
TSTART
t
t
t
t
t
t
RETRY
TSTART
DEB
TSTART
RETRY
TSTART
V
V
IN
V
- V
IN
FA
OUT
I
LIM
I
OUT
DEVICE ENTERS
THERMAL SHUTDOWN
DEVICE COMES OUT OF
THERMAL SHUTDOWN
FLAG (or) FWD
V
(1.5V typ)
TSTART-REF
V
TSTART
NOTE: NOT TO SCALE
Figure 6. Startup Fault Timing Diagram in Autoretry Current-Limit Mode
Maxim Integrated
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
In autoretry current-limit mode during normal operation,
and the FLAG (or FWD) pin asserts. A retry time delay
if the device enters an overcurrent condition, the t
(t
) starts after t
has elapsed and after the
BLANK
RETRY
TSTART
timer starts. The t
overcurrent condition resolves before the t
timer resets as and when the
device comes out of thermal shutdown mode, if it was
entered. During the t interval, the output NFET Q2
BLANK
duration
BLANK
RETRY
has elapsed, and then the normal operation continues. If
remains turned off. Once t
has elapsed, the device
RETRY
the overcurrent condition is present for t duration or
initiates the startup cycle. Figure 7 depicts a typical oper-
ating behavior in autoretry current-limit mode.
BLANK
if the device junction temperature reaches T
, the
JC_MAX
output NFET Q2 is turned-off, the t
timer resets,
BLANK
OVERCURRENT EVENT
OVERCURRENT CONDITION REMOVED
t
t
TSTART
t
t
t
TSTART
BLANK
RETRY
RETRY
V
OUT
V
- V
FA
IN
I
LIM
I
OUT
FLAG (or) FWD
NOTE: NOT TO SCALE
Figure 7. Overcurrent Fault Timing Diagram in Autoretry Current-Limit Mode
Maxim Integrated
│ 21
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
The autoretry feature reduces system power compared
to continuous current-limit mode in case of overcurrent
or short-circuit conditions. When the device is turned on
t
TSTART
I
=
I
LIM
LOAD
t
+
t
TRY
RE
]
[
TSTART
for t
time, the supply current is held at the current
TSTART
The duty cycle is dependent on t
current-limit threshold setting of 300mA, output voltage of
24V and output capacitance of 1000µF, the t time
is ~80ms. With 1000ms (typ) of t
cycle is ~8%, resulting in a 92% power reduction when
compared to the device being on the entire time.
time. For a
TSTART
limit. During t
time, there is no current through the
RETRY
switch. Thus, the average output current is much less
than the programmed current limit. Calculate the average
output current using the following equation:
TSTART
time, the duty
RETRY
FAULT CONDITION
REMOVED
t
t
t
DEB
TSTART
DEB
t
TSTART
t
t
TSTART
DEB
V
OR EN CYCLE
V OR EN CYCLE
IN
IN
V
V
IN
V
- V
IN
FA
OUT
I
LIM
DEVICE COMES OUT OF
THERMAL SHUTDOWN MODE
DEVICE ENTERS THERMAL
SHUTDOWN MODE
I
OUT
FLAG (or) FWD
V
(1.5V typ)
TSTART-REF
V
TSTART
NOTE: NOT TO SCALE
Figure 8. Startup Fault Timing Diagram in Latchoff Current-Limit Mode
Maxim Integrated
│ 22
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
In latchoff current-limit mode during normal operation, if
Latchoff Current-Limit Mode
In latchoff current-limit mode during startup, the device
operates in continuous current-limit mode until t
the device enters an overcurrent condition, the t
BLANK
timer starts. The t
timer resets as and when the
BLANK
.
TSTART
overcurrent condition resolves before the t
duration
BLANK
The timer t
resets if the output voltage V
TSTART
OUT
has elapsed, and then the normal operation continues. If
the overcurrent condition exists for the t duration
reaches (V - V ) within t and then the nor-
IN
FA
TSTART
BLANK
mal operation continues. If the overcurrent condition is
present for longer than startup blanking time (t ),
the output NFET Q2 is turned off and latched, the timer
or if the device junction temperature reaches T
,
JC_MAX
TSTART
the output NFET Q2 is turned off and latched, the t
BLANK
timer resets, and the FLAG (or FWD) pin asserts. To reset
the device, either toggle enable control signal (EN) or
cycle the input voltage. Figure 9 depicts a typical operat-
ing behavior in latchoff current-limit mode.
t
resets, and the FLAG (or FWD) pin asserts. To
TSTART
reset the device, either toggle the enable control signal
(EN) or cycle the input voltage. Figure 8 depicts a typical
startup behavior in latchoff current-limit mode.
OVERCURRENT
EVENT
LATCHOFF
V
OR EN CYCLE
IN
t
t
t
TSTART
BLANK
DEB
V
OVERCURRENT CONDITION REMOVED
OUT
V
- V
FA
IN
I
LIM
I
OUT
FLAG (or) FWD
NOTE: NOT TO SCALE
Figure 9. Overcurrent Fault Timing Diagram in Latchoff Current-Limit Mode
Maxim Integrated
│ 23
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
between the OUT and IN pins to determine whether the
reverse current is still present. Once the reverse current
condition has been removed, input NFET Q1 turns back
on and the FLAG (or REV) pin is deasserted. The input
Reverse Current Protection
In MAX17613A and MAX17613C, the reverse current
protection feature is enabled and it prevents reverse
current flow from the OUT to IN pins. In MAX17613B,
the reverse current protection feature is disabled, which
allows reverse current flow from the OUT to IN pins. This
feature is useful in applications with inductive loads.
NFET Q1 takes ~100μs (t
) to turn on. Figure 10
Q1_ON
depicts typical behavior in slow reverse current condi-
tions.
A fast reverse current condition is detected if (V - V
)
IN
OUT
The MAX17613A and MAX17613C devices monitor V
IN
< -V
is present for reverse current blocking fast
RIBF
and V
to provide true reverse current blocking when a
OUT
response time (t ). During this condition, only the input
RIB
reverse condition or input failure condition is detected. In
both MAX17613A and MAX17613C devices, two reverse
current protection features are implemented.
NFET Q1 turns off and FLAG (or REV) is asserted while
the output NFET Q2 is kept on. During and after this time,
the device monitors the voltage difference between the
OUT and IN pins to determine whether the reverse cur-
rent is still present. Once the reverse current condition
has been removed, input NFET Q1 turns back on and the
FLAG (or REV) pin is deasserted. The input NFET Q1
A slow reverse current condition is detected if (V
-
IN
V
OUT
) < -V
is present for reverse current blocking
RIBS
debounce blanking time (t
). During this condition,
DEBRIB
only the input NFET Q1 turns off and FLAG (or REV) is
asserted while the output NFET Q2 is kept on. During and
after this time, the device monitors the voltage difference
takes ~100μs (t
) to turn on. Figure 11 depicts typi-
Q1_ON
cal behavior in fast reverse current conditions.
t
t
t
Q1_ON
DEBRIB
DEBRIB
t
DEBRIB
t
Q1_ON
t
RIB
(V - V
IN
)
OUT
0V
(V - V
IN
)
OUT
0V
-V
RIBS
-V
-V
RIBS
RIBF
I
LOAD
I
LIMIT
0A
0A
I
LOAD
-(V
/R
)
)
RIB_SLOW ON
-(V /R
RIB_FAST ON
-(V )
/R
RIBS ON
INPUT NFET
Q1 STATUS
INPUT NFET
Q1 STATUS
FLAG (or) REV
FLAG (or) REV
NOTE: NOT TO SCALE
NOTE: TIME NOT TO SCALE
Figure 10. Slow Reverse Current Fault Timing Diagram
Figure 11. Fast Reverse Current Fault Timing Diagram
Maxim Integrated
│ 24
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Fault Output
Applications Information
The MAX17613A and MAX17613B devices have two
open-drain fault outputs, FLAG and UVOV. They require
external pullup resistors to a DC supply. The FLAG pin
goes low when any of the following conditions occur:
IN Capacitor
A 0.47μF capacitor from the IN pin to GND is recom-
mended to hold input voltage during sudden load current
changes.
● Overcurrent duration exceeds blanking time t
.
BLANK
Hot Plug-In at the IN terminal
● Overcurrent duration exceeds startup blanking time
(t ) during the startup cycle.
In many system powering applications, an input-filtering
capacitor is required to lower radiated emission and
enhance ESD capability. In hot plug-in applications,
parasitic cable inductance along with the input capacitor
causes overshoot and ringing when a live power cable is
connected to the input terminal.
TSTART
● Reverse current is detected (MAX17613A only).
● Thermal shutdown is active.
● R
is less than 1.5kΩ (max).
SETI
The other fault output UVOV goes low when input voltage
falls below the UVLO threshold or rises above the OVLO
threshold. Note that the UVLO fault has a debounce time
of 16ms. This fault is removed 16ms after the input volt-
age has crossed the UVLO threshold. This debounce also
elapses only at powerup. As a consequence, the UVOV
pin fault signal is always asserted at power-up for at least
16ms.
This effect causes the protection device to see almost
twice the applied voltage. A transient voltage suppressor
(TVS) is often used in industrial applications to protect
the system from these conditions. A TVS that is capable
of limiting surge voltage to 60V (max) should be placed
close to the input terminal for enhanced protection. The
tolerated slew rate at the IN pins is 100V/μs (max).
The MAX17613C device has two open-drain fault outputs,
FWD and REV. They require external pullup resistors to
a DC supply. FWD goes low when any of the following
conditions occur:
Input Hard Short to Ground
In many system applications, an input short-circuit pro-
tection is required. The MAX17613A and MAX17613C
devices detect reverse current entering at the OUT pin and
flowing out of the IN pin, then turns off the internal FETs.
The magnitude of reverse current depends on the induc-
tance of input circuitry and any capacitance installed near
the IN pins.
● Overcurrent duration exceeds the blanking time.
● Thermal shutdown is active.
● R
is less than 1.5kΩ (max).
SETI
●
REV goes low when reverse current is detected.
The devices can be damaged in case V goes so nega-
IN
tive that (V
- V ) > 60V.
OUT
IN
Thermal Shutdown Protection
The device has the thermal shutdown feature to protect
against overheating. The device turns off and the FLAG
(or FWD) pin asserts when the junction temperature
OUT Capacitor
The maximum capacitive load (C
connected is a function of current-limit setting (I
mA), the startup time (t
in μF) that can be
MAX
in
LIM
exceeds T
(+155°C typ). The device exits thermal
JC_MAX
in ms) and the input volt-
TSTART
shutdown and resume normal operation after the junction
temperature cools down by T (15°C typ), except
age. C
is calculated using the following relationship:
MAX
JC_HYS
when in latchoff mode, the device remains latched off.
ꢀꢁ
The thermal limit behaves similar to the current limit. In
autoretry mode, the thermal limit works with the autoretry
timer. When the device comes out of thermal limit, the
part is turned on after the retry time. In latchoff mode, the
device latches off until power or EN is cycled. In continu-
ous mode, the device only disables while the temperature
is over the limit. There is no blanking time for thermal
protection.
For example, for V = 24V, t
= 60ms, and I
=
LIM
IN
TSTART
1000mA, C
equals 2500μF.
MAX
Output capacitor values in excess of C
can trigger
MAX
false overcurrent condition. Note that the above expres-
sion assumes no load current is drawn from the OUT pins.
Any load current drawn would offset the capacitor charg-
ing current resulting in a larger charging period; hence,
the possibility of a false overcurrent condition.
Maxim Integrated
│ 25
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
cause the device to reach the thermal shutdown threshold.
Thermal vias from the exposed pad to the ground plane are
highly recommended to increase system thermal capaci-
tance while reducing the thermal resistance to ambient
temperature.
Hot Plug-In at the OUT terminal
In some applications, there might be a possibility of apply-
ing an external voltage at the OUT terminal of the devices
with or without presence of input voltage. During these
conditions, devices detect any reverse current entering
at the OUT pin and flowing out of the IN pin and turn off
the internal FETs. Parasitic cable inductance along with
input and output capacitors cause overshoot and ringing
when an external voltage is applied at the OUT terminal.
This causes the protection devices to see up to twice the
applied voltage, which can damage the devices. It is rec-
ommended to maintain overvoltages such that the voltages
at the pins do not exceed the absolute maximum ratings.
The tolerated slew rate at the OUT pins is 100V/μs (max).
ESD Protection
The devices are specified for ±15kV (HBM) typical ESD
resistance on IN when IN is bypassed to ground with
a 0.47μF low-ESR ceramic capacitor. No capacitor is
required for ±2kV (HBM) typical ESD on IN. All the pins
have a ±2kV (HBM) typical ESD protection.
Figure 12 shows the Human Body Model and Figure 13
shows the current waveform it generates when discharged
into a low impedance. This model consists of a 100pF
capacitor charged to the ESD voltage of interest, which is
then discharged into the device through a 1.5kΩ resistor.
Output Freewheeling Diode for Inductive Hard
Short to Ground
In applications that require protection from a sudden short
to ground with an inductive load or a long cable, a schott-
ky diode between the OUT terminal and ground is recom-
mended. This is to prevent a negative spike on the OUT
due to the inductive kickback during a short-circuit event.
R
1MΩ
R
D
1.5kΩ
C
Layout and Thermal Dissipation
CHARGE-CURRENT- DISCHARGE
LIMIT RESISTOR RESISTOR
To optimize the switch response time to output short-circuit
conditions, it is very important to keep all traces as short
as possible to reduce the effect of undesirable parasitic
inductance. Place input and output capacitors as close as
possible to the device (no more than 5mm). The IN and
OUT pins must be connected with wide short traces to the
power bus. During normal operation, the power dissipation
is small and the package temperature change is minimal.
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
SOURCE
Power dissipation under steady-state normal operation
may be calculated as:
Figure 12. Human Body ESD Test Model
2
× R
P
=
(I
)
ON
SS
(
)
OUT
Refer to the Electrical Characteristics table and Typical
Operating Characteristics for R
values at various oper-
ON
ating temperatures.
I
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
P
I
R
If the output is continuously shorted to ground at the
maximum supply voltage, the switches with the autoretry
option might not cause thermal shutdown detection to trip.
Power dissipation in the devices operating in autoretry
mode can be calculated using the following equation:
AMPERES
36.8%
10%
0
0
TIME
V
× I
× t
(
)
START
t
DL
IN MAX
OUT MAX
( )
(
)
t
t
RL
P
=
)
CURRENT WAVEFORM
AVG
(
+ t
START RETRY
Attention must be given to continuous current-limit mode
when the power dissipation during a fault condition can
Figure 13. Human Body Current Waveform
Maxim Integrated
│ 26
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Ordering Information
PART
TEMP RANGE
PIN PACKAGE
FEATURE DIFFERENCES
OV, UV, Reverse Voltage Protection
OV,UV
MAX17613AATP+T
MAX17613BATP+T
MAX17613CATP+T
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
20 TQFN-CU EP*
20 TQFN-CU EP*
20 TQFN-CU EP*
Reverse Voltage Protection
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape-and-reel.
*EP = Exposed pad.
Maxim Integrated
│ 27
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MAX17613A/
MAX17613B/
MAX17613C
4.5V to 60V, 3A Current-Limiter with
OV, UV and Reverse Protection
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
2/19
Initial release
—
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2019 Maxim Integrated Products, Inc.
│ 28
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