MAX1762_技术文档

19-1923; Rev 0; 1/01

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

General Description

Features

The MAX1762/MAX1791 PWM step-down controllers

provide high efficiency, excellent transient response,

and high DC output accuracy needed for stepping

down high-voltage batteries to generate low-voltage

CPU core, I/O, and chipset RAM supplies in notebook

computers and PDAs.

o High Operating Frequency (300kHz)

o No Current-Sense Resistor

o Accurate Current Limit

o ±±1 ꢀotaꢁ ꢂC ꢃrror oꢄer Line anꢅ ꢂuring

Continuous Conꢅuction

Maxim’s proprietary Quick-PWM™ pulse-width modula-

tor is a free-running constant on-time type with input

feed-forward. Its high operating frequency (300kHz)

allows small external components to be utilized in PC

board area-critical applications such as subnotebook

computers and smart phones. PWM operation occurs

at heavy loads, and automatic switchover to pulse-skip-

ping operation occurs at lighter loads. The external

high-side P-channel and low-side N-channel MOSFETs

require no bootstrap components. The MAX1762/

MAX1791 are simple, easy to compensate, and do not

have the noise sensitivity of conventional fixed-frequen-

cy current-mode PWMs.

o ꢂuaꢁ Moꢅe Fixeꢅ Output

±.8V/2.5V/aꢅj (MAX±762)

3.3V/5.0V/aꢅj (MAX±79±)

o 0.5V to 5.5V Output Aꢅjust Range

o 5V to 20V Input Range

o Automatic Light-Loaꢅ Puꢁse Skipping Operation

o Free-Running On-ꢂemanꢅ PWM

o Foꢁꢅback Moꢅe™ UVLO

o PFꢃꢀ/NFꢃꢀ Synchronous Buck

o 4.65V at 25mA Linear Reguꢁator Output

o 5µA Shutꢅown Suppꢁy Current

o 230µA Quiescent Suppꢁy Current

o ±0-Pin µMAX Package

These devices achieve high efficiency at a reduced

cost by eliminating the current-sense resistor found in

traditional current-mode PWMs. Efficiency is further

enhanced by their ability to drive synchronous-rectifier

MOSFETs. The MAX1762/MAX1791 come in a 10-pin

µMAX package and offer two fixed voltages (Dual

Mode™) for each device, 1.8V/2.5V/adj (MAX1762) and

3.3V/5.0V/adj (MAX1791).

Ordering Information

________________________Applications

PART

TEMP. RANGE

-40°C to +85°C

PIN-PACKAGE

10 µMAX

Notebooks

Handy-Terminals

MAX1762EUB

MAX1791EUB

Subnotebooks

Digital Cameras

PDAs

10 µMAX

Smart Phones

1.8V/2.5V Logic

and I/O Supplies

Pin Configuration

TOP VIEW

Typical Operating Circuit

V

BATT

(5V TO 20V)

VL

REF

FB

1

2

3

4

5

10 VP

9

8

7

6

DH

CS

VL

VP

MAX1762

MAX1791

MAX1762

MAX1791

OUT

DL

SHDN

GND

DH

CS

REF

FB

V

OUT

1.8V/3.3V

µMAX

OUT

DL

Quick-PWM, Dual Mode, and Foldback Mode are a trade-

marks of Maxim Integrated Products.

SHDN

GND

________________________________________________________________ Maxim Integrated Products

±

For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

ABSOLUTE MAXIMUM RATINGS

Continuous Power Dissipation (T = +70°C)

VP, SHDN to GND ..................................................-0.3V to +22V

VP to VL..................................................................-0.3V to +22V

OUT, VL to GND.......................................................-0.3V to +6V

DL, FB, REF to GND ....................................-0.3V to (VL + 0.3V)

DH to GND....................................................-0.3V to (VP + 0.3V)

CS to GND....................................................-2.0V to (VP + 0.3V)

REF Short Circuit to GND...........................................Continuous

A

10-Pin µMAX (derate 5.6mW/°C above +70°C)...........444mW

Operating Temperature.......................................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature.........................................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(V = 15V, VL enabled, C = 1µF, C

(Note 1)

= 0.1µF, T = 0 to +85°C, unless otherwise noted. Typical values are at T = +25°C.)

VP

VL

REF

A

PARAMETER

SYMBOL

CONDITIONS

MIN

5

TYP

MAX

UNITS

VP Input Voltage Range

VL Input Voltage Range

V

VP

V

VL

20

V

VL (overdriven)

4.75

5.25

OUT Output Voltage

(MAX1762, 1.8V Fixed)

V

= 5V to 20V, V = 4.75V to 5.25V,

VP VL

V

1.773

2.463

3.250

4.925

1.231

1.8

2.5

1.827

2.538

3.350

5.075

1.269

V

OUT

FB = GND, continuous conduction mode

OUT Output Voltage

(MAX1762, 2.5V Fixed)

V

VP

= 5V to 20V, V = 4.75V to 5.25V,

VL

FB = VL, continuous conduction mode

OUT Output Voltage

(MAX1791, 3.3V Fixed)

V

VP

= 5V to 20V, V = 4.75V to 5.25V,

VL

3.3

FB = GND, continuous conduction mode

OUT Output Voltage

(MAX1791, 5V Fixed)

V

VP

= 7V to 20V, V = 4.75V to 5.25V,

VL

5

FB = VL, continuous conduction mode

V

= 5V to 20V, V = 4.75V to 5.25V,

VP

VL

OUT Output Voltage (Adj Mode)

1.250

FB = OUT, continuous conduction mode

Output Voltage Adjust Range

OUT Input Resistance

FB Input Bias Current

Soft-Start Ramp Time

0.5

300

-0.1

5.5

1700

0.1

V

Adjustable-output mode

800

kΩ

µA

µs

V

= 1.3V

FB

Zero to full I

1700

740

LIM

V

= 1.25V, V = 6V

666

2550

300

814

3110

500

OUT

VP

On-Time (Note 2)

t

ns

µA

ON

= 5V, V = 6V

2830

400

VP

Minimum Off-Time (Note 2)

VL Quiescent Supply Current

t

OFF

FB = GND, V = 5V, OUT forced above the

VL

regulation point

153

260

FB = GND, OUT forced

above the regulation point,

V

= float

= 5V

227

93

410

200

VL

VP Quiescent Supply Current

µA

V

= 20V

VP

VL Shutdown Supply Current

VP Shutdown Supply Current

VL Output Voltage

V

= 5V, SHDN = GND

2

4

15

12

µA

V

VL

S HD N = GND, measured at VP, V = 0 or 5V

VL

I

= 0 to 25mA, V = 5V to 20V

4.5

4.65

4.75

LOAD

VP

2

_______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

ELECTRICAL CHARACTERISTICS (continued)

(V = 15V, VL enabled, C = 1µF, C

(Note 1)

= 0.1µF, T = 0 to +85°C, unless otherwise noted. Typical values are at T = +25°C.)

VP

VL

REF

A

PARAMETER

Reference Voltage

SYMBOL

CONDITIONS

MIN

TYP

MAX

2.02

0.01

UNITS

V

= 4.75V to 5.25V, no load

= 0 to 50µA

1.98

2

V

VL

Reference Load Regulation

REF Sink Current

I

REF

REF in regulation

Falling edge

10

60

µA

V

REF Fault Lockout Voltage

1.6

70

Output Undervoltage Threshold

(Foldback)

With respect to regulation point, no load

80

%

Output Undervoltage Lockout

Time (Foldback)

From SHDN signal going high V

regulation point

< 0.6 x

OUT

10

20

42

ms

Current Limit Threshold

V

-90

-100

160

-110

mV

^oC

ILIM

Thermal Shutdown Threshold

Hysteresis = 10^oC

VL Undervoltage Lockout

Threshold

Rising edge, hysteresis = 20mV, PWM

disabled below this level

4.1

4.4

8

V

Ω

DH Gate Driver On-Resistance

V

= 6V to 20V, measure at 50mA

5

VP

DL Gate Driver On-Resistance

(Pullup)

DL, high state, measure at 50mA

DL, low state, measure at 50mA

8

DL Gate Driver On-Resistance

(Pulldown)

1

5

Ω

DH Gate Driver Source/Sink

Current

V

= 3V, V = 6V

VP

0.6

A

DH

DL Gate Driver Sink Current

V

= 2.5V

0.9

0.5

A

DL

DL Gate Driver Source Current

SHDN Logic Input High

Threshold Voltage

V

1.6

50

V

IH

SHDN Logic Input Low

Threshold Voltage

V

0.6

IL

MAX1762 V

MAX1791 V

MAX1762 V

MAX1791 V

= 1.8V fixed

= 3.3V fixed

= 2.5V fixed

= 5V fixed

OUT

100

150

mV

Dual Mode Threshold Voltage

2.5

-2

3.25

4

2

V

SHDN Logic Input Current

SHDN = 0 or 5V

µA

_______________________________________________________________________________________

3

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

ELECTRICAL CHARACTERISTICS

(V = 15V, VL enabled, C = 1µF, C

= 0.1µF, T = -40 to +85°C, unless otherwise noted.) (Note 1)

A

VP

VL

REF

PARAMETER

SYMBOL

CONDITIONS

MIN

5

TYP

MAX

20

UNITS

VP Input Voltage Range

VL Input Voltage Range

V

VP

V

VL

V

VL (overdriven)

V = 5V to 20V, V = 4.75V to 5.25V,

VP

4.75

5.25

OUT Output Voltage

(MAX1762, 1.8V Fixed)

VL

V

1.773

2.463

3.250

4.925

1.231

1.827

2.538

3.350

5.075

1.269

V

OUT

FB = GND, continuous conduction mode

OUT Output Voltage

(MAX1762, 2.5V Fixed)

V

VP

= 5V to 20V, V = 4.75V to 5.25V,

VL

FB = VL, continuous conduction mode

OUT Output Voltage

(MAX1791, 3.3V Fixed)

V

VP

= 5V to 20V, V = 4.75V to 5.25V,

VL

FB = GND, continuous conduction mode

OUT Output Voltage

(MAX1791, 5V Fixed)

V

VP

= 7V to 20V, V = 4.75V to 5.25V,

VL

FB = VL, continuous conduction mode

V

= 5V to 20V, V = 4.75V to 5.25V,

VP

VL

OUT Output Voltage (adj Mode)

FB Input Bias Current

V

FB = OUT, continuous conduction mode

V

= 1.3V

-0.2

666

0.2

814

µA

ns

µA

FB

= 1.25V, V = 6V

OUT

VP

On-Time (Note 2)

t

ON

= 5V, V = 6V

2550

250

3110

550

VP

Minimum Off-Time (Note 2)

VL Quiescent Supply Current

t

OFF

FB = GND, V = 5V, OUT forced above the

VL

regulation point

260

V

= float

= 5V

410

200

15

VL

FB = GND, OUT forced above

the regulation point V = 20V

VP Quiescent Supply Current

µA

VP

V

VL

VL Shutdown Supply Current

VP Shutdown Supply Current

VL Output Voltage

V

= 5V, SHDN = GND

µA

V

VL

S HD N = GND, measured at VP, V = 0 or 5V

12

VL

I

= 0 to 25mA, V = 5V to 20V

VP

4.5

4.75

2.02

0.01

LOAD

Reference Voltage

V

= 4.75V to 5.25V, no load

= 0 to 50µA

1.98

V

VL

Reference Load Regulation

REF Sink Current

I

V

REF

REF in regulation

10

60

µA

Output Undervoltage Threshold

(Foldback)

With respect to regulation point, no load

80

%

Output Undervoltage Lockout

Time (Foldback)

From SHDN signal going high, V

regulation point

< 0.6 x

OUT

10

42

ms

mV

Current-Limit Threshold

V

-90

-110

ILIM

4

_______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

ELECTRICAL CHARACTERISTICS (continued)

(V = 15V, VL enabled, C = 1µF, C

= 0.1µF, T = -40 to +85°C, unless otherwise noted.) (Note 1)

A

VP

VL

REF

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

VL Undervoltage Lockout

Threshold

Rising edge, hysteresis = 20mV, PWM

disabled below this level

4.1

4.4

V

SHDN Logic Input High

Threshold Voltage

V

1.6

V

IH

SHDN Logic Input Low

Threshold Voltage

V

0.6

150

4

IL

MAX1762 V

MAX1791 V

MAX1762 V

MAX1791 V

= 1.8V fixed

= 3.3V fixed

= 2.5V fixed

= 5V fixed

OUT

50

mV

V

Dual Mode Threshold Voltage

2.5

Note 1: Specifications to -40°C are guaranteed by design, not production tested.

Note 2: One-shot times are measured at the DH pin (VP = 15V, C

= 400pF, 90% point to 90% point; see drawing below for

DH

measurement details).

t

ON

DH

90%

_______________________________________________________________________________________

5

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Typical Operating Characteristics

(T = +25°C, unless otherwise noted.)

A

MAX1762

EFFICIENCY vs. LOAD (1.8V)

MAX1762

EFFICIENCY vs. LOAD (1V)

MAX1762

EFFICIENCY vs. LOAD (2.5V)

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V

VP

= 5V

V

VP

= 5V

90

80

70

60

50

40

30

20

10

0

V

VP

= 7V

V

VP

= 5V

V

VP

= 7V

V

VP

= 12V

V

= 18V

VP

V

VP

= 7V

V

= 12V

VP

V

VP

= 18V

V

VP

= 18V

V

VP

= 12V

0.1

1

10

100

1000

10,000

0.1

1

10

100

1000

10,000

0.1

1

10

100

1000

10,000

LOAD CURRENT (mA)

MAX1791

EFFICIENCY vs. LOAD (5V)

MAX1791

EFFICIENCY vs. LOAD (3.0V)

MAX1791

EFFICIENCY vs. LOAD (3.3V)

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V

VP

= 5V

V

VP

= 7V

V

VP

= 5V

V

VP

= 7V

V

VP

= 18V

V

= 18V

VP

V

VP

= 18V

V = 12V

VP

V

= 12V

V

VP

= 12V

VP

V

= 7V

VP

0.1

1

10

100

1000

10,000

0.1

1

10

100

1000

10,000

0.1

1

10

100

1000

10,000

LOAD CURRENT (mA)

FREQUENCY vs. SUPPLY VOLTAGE

VL VOLTAGE ERROR vs. OUTPUT CURRENT

375

350

325

300

275

250

0.1

V

OUT

= 12V

= 2.5V

VP

V

= 3.3V

V

OUT

0

-0.1

-0.2

-0.3

-0.4

-0.5

-0.6

V

= 5.0V

OUT

V

= 2.5V

OUT

V

= 1.8V

OUT

LOAD = 1A

8

5

11

14

17

0

5

10

15

20

25

SUPPLY VOLTAGE (V)

VL CURRENT (mA)

6

_______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Typical Operating Characteristics (continued)

(T = +25°C, unless otherwise noted.)

A

SUPPLY CURRENT vs. INPUT VOLTAGE

(SHUTDOWN)

SUPPLY CURRENT vs. INPUT VOLTAGE

6.0

5.8

5.6

5.4

5.2

5.0

4.8

4.6

4.4

4.2

4.0

300

250

200

150

100

50

V

OUT

= 3.3V

NO LOAD

0

5

8

11

14

17

5

8

11

14

17

VP (V)

LOAD-TRANSIENT RESPONSE

LINE-TRANSIENT RESPONSE

MAX1762/91 toc13

MAX1762/91 toc12

MAX1762/91 toc11

V

VP

1V/div

OUT

AC-COUPLED

OUT

AC-COUPLED

100mV/div

7V

I

V

LOAD

2A/div

OUT

AC-COUPLED

I

L

20mV/div

2A/div

100µs/div

= 12V, I = 0 TO 2A, V = 2.5V

100µs/div

V

VP

= 12V, I

= 0 TO 2A, V

= 1.8V

OUT

V

= 7.5V TO 8V, I

= 0, V

= 2.5V

OUT

LOAD

VP

L

OUT

VP

LOAD

SHUTDOWN AND STARTUP WAVEFORMS

OUTPUT OVERLOAD WAVEFORMS

(I = 300mA)

(I = 2.5A)

L

MAX1762/91 toc14

MAX1762/91 toc15

MAX1762/91 toc16

SHDN

5V/div

V

SHDN

5V/div

OUT

AC-COUPLED

V

OUT

2V/div

OUT

2V/div

I

LOAD

2A/div

I

LX

2A/div

LX

1A/div

100µs/div

2ms/div

V

VP

= 12V, I

= 0 TO 3A, V

= 2.5V

OUT

V

VP

= 8V, I

= 300mA, V

= 2.5V

V

VP

= 8V, I

= 2.5A, V

= 2.5V

OUT

LOAD

OUT

LOAD

_______________________________________________________________________________________

7

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Pin Description

NAME

FUNCTION

+4.65V Linear Regulator Output. Serves as the supply input for the DL gate driver and supplies up to

25mA to external loads. VL can be overdriven using an external 5V supply. Bypass VL to GND with

at least a 1 F ceramic capacitor.

1

VL

2V Reference Voltage Output. Bypass to GND with 0.1 F ceramic capacitor. REF can deliver up to

50 A for external loads.

2

3

REF

FB

Feedback Input. Connect to an external resistive divider from OUT to GND in adjustable version.

Regulates to 1.25V. FB also serves as Dual Mode select pin. Connect FB to GND for a fixed 1.8V

(MAX1762) or 3.3V (MAX1791) output, or to VL for a fixed 2.5V (MAX1762) or 5.0V (MAX1791) output.

Output Voltage Connection. OUT is used for sensing the output voltage to determine the on-time and

also serves as the feedback input in fixed-output modes.

4

5

OUT

Shutdown Input. Connect to a voltage less than V (<0.6V) to shut down the device. Connect to a

IL

SHDN

voltage greater than V (>1.6V) for normal operation.

IH

6

7

GND

DL

Analog and Power Ground

Low-Side Gate Driver Output. DL swings between VL and GND.

Current-Sense Connection. For lossless current sensing, connect CS to the junction of the MOSFETs

and inductor. For more accurate current sensing, connect CS to a current-sense resistor from the

source of the low-side switch to GND.

8

CS

9

DH

VP

High-Side Gate Driver Output. DH swings between VP and GND.

Battery Voltage Supply Input. Used for PWM one-shot timing and as the input for the VL regulator

and DH gate drivers.

10

Standard Application Circuit

Detailed Description

The standard application circuit (Figure 1) generates a

low-voltage output for general-purpose use in notebook

computers (I/O supply, fixed CPU, core supply, and

DRAM supply). This DC-DC converter steps down bat-

tery voltage from 5V to 20V with high efficiency and

accuracy to a fixed voltage of 1.8V/2.5V/adj (MAX1762)

or 3.3V/5.0V/adj (MAX1791). Both the MAX1762 and

MAX1791 can be configured for adjustable output volt-

The MAX1762/MAX1791 step-down controllers are tar-

geted at low-voltage chipsets and RAM power supplies

for notebook and subnotebook computers, with addi-

tional applications in digital cameras, PDAs, and

handy-terminals. Maxim’s proprietary Quick-PWM

pulse-width modulator (Figure 5) is specifically

designed for handling fast load steps while maintaining

a relatively constant operating frequency (300kHz) over

a wide range of input voltages (5V to 20V). The

MAX1762 has fixed 1.8V or 2.5V outputs, while the

MAX1791 has fixed 3.3V or 5.0V output voltages. Using

ages (V

from V

> 1.25V), using a resistive voltage-divider

OUT

to FB to adjust the output voltage (Figure 2).

OUT

Similarly, Figure 3 shows an application circuit for V

OUT

< 1.25V, where a resistive voltage-divider from REF to

FB is used to set the output voltage. Figure 4 shows

how to set the regulator’s current limit with an external

sense resistor from CS to GND. Table 1 lists the com-

ponents for each application circuit, and Table 2 con-

tains contact information for the component

manufacturers.

an external resistive divider, V

can be set between

OUT

0.5V and 5.5V on either device. Quick-PWM architec-

ture circumvents the poor load-transient response of

fixed-frequency current-mode PWMs. This type of

design avoids the problems commonly encountered

with conventional constant-on-time and constant-off-

time PWM schemes.

8

_______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

V

VP

C2

1µF

C1

10Ω

1µF

10µF

VL

VP

MAX1762

MAX1791

DH

CS

Q1

Q2

REF

FB

C3

0.1µF

L1

7µH

V

OUT

DL

C4

220µF

SHDN

GND

Figure 1. Typical Application Circuit for Fixed Voltage

V

VP

C2

1µF

C1

10Ω

1µF

10µF

VL

VP

MAX1762

MAX1791

DH

CS

Q1

Q2

REF

FB

C3

0.1µF

L1

7µH

V

OUT

DL

C4

R1

R2

220µF

SHDN

GND

Figure 2. Typical Application Circuit for Adjustable Output V

> 1.25V

OUT

V

VP

C2

1µF

C1

10µF

10Ω

VL

VP

1µF

MAX1762

MAX1791

DH

CS

Q1

REF

FB

C3

0.1µF

R1

R2

L1

7µH

V

OUT

C4

220µF

OUT

DL

Q2

SHDN

GND

Figure 3. Typical Application Circuit for V

< 1.25V

OUT

_______________________________________________________________________________________

9

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

V

VP

C2

1µF

C1

10µF

10Ω

VL

VP

1µF

MAX1762

MAX1791

DH

CS

Q1

REF

FB

L1

C3

0.1µF

10µH

V

OUT

C4

150µF

OUT

DL

Q2

R

S

SHDN

GND

Figure 4. Operation with External Current-Sense Resistor

Table 1. Component Selection for Standard Applications

COMPONENT

Input Voltage Range

Inductor (µH)

1.8V/2.5V/3.3V/5.0V AT 2A

1V AT 2A

5V to 20V

5.2

5V to 20V

7

CDRH104-7R0NC

Sumida

CDRH104-5R2NC

Sumida

L1 Inductor

Q1 MOSFETS

C1 Input Capacitor

C2 VL Cap

NDS8958A

Fairchild

SI4539ADY

Fairchild

TMK432BJ106KM

Taiyo Yuden

TMK432BJ106

Taiyo Yuden

EMK3160J105KL

Taiyo Yuden

LMK316BJ475

Taiyo Yuden

UMK316BI104KH

Taiyo Yuden

UMK316BI104KH

Taiyo Yuden

C3 REF Cap

10TPB220M

Sanyo

6TPB150M

Sanyo

C4 Output Cap

10 ______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Table 2. Component Manufacturers

MANUFACTURER

USA PHONE

WEBSITE INFO

www.coiltronics.com

Coiltronics

561-241-7876

408-822-2181

619-661-6835

847-956-0666

Fairchild Semiconductor

Sanyo

www.fairchildsemi.com

www.secc.co.jp

USA

Sumida

www.sumida.com

www.t-yuden.com

Japan

81-3-3607-5111

408-573-4150

Taiyo Yuden

10Ω

VP

V

IN

T

1µF

OFF

DH

C

IN

ON

Q

ON-TIME

COMPUTE

OUT

TRIG

1-SHOT

Q1

DRIVER

S

R

TON

Q

S

R

TRIG

Q

1-SHOT

VP

CS

LINEAR

REG

VL

ILIM

VOS

REF

C

VL

-100mV

REF

-30%

OUT

FB

ON/OFF

VL

SHDN

OUT

FEEDBACK

MUX

(FIGURE 9)

CONTROL

DL

C

OUT

DL

UVP

LATCH

Q2

TIMER

VP

DRIVER

GND

2V

REF

V

REF

MAX1762

MAX1791

OUT

C

REF

FB

Figure 5. Functional Block Diagram

off when the device is in shutdown and drops by

approximately 500mV during a fault condition, such as

when the output is short circuited to ground, and recov-

ers when SHDN is cycled or power is reset. If VL is not

VP Input and VL Logic Supply

An internal linear regulator supplied by VP produces

the +4.65V supply (VL) that powers the PWM controller,

logic, reference, and other blocks within the

MAX1762/MAX1791. This +4.65V low-dropout linear

regulator can supply up to 25mA for external loads.

Bypass VL to GND with at least a 1µF ceramic capaci-

driven externally, then V

should be at least 5V to

VP

ensure operation. If V

VP

supply, V

is running from a 5V ( 10%)

should be externally connected to VL.

VP

tor. V can range between 5V and 20V. VL is turned

VP

______________________________________________________________________________________ 11

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Overdriving the VL regulator with an external 5V supply

adjustable 0.5µs (max) minimum off-time. Worst-case

dropout performance is determined by the minimum

on-time spec. The worst-case duty factor limit is:

also increases the MAX1762/MAX1791s’ efficiency.

The MAX1762/MAX1791 include an input undervoltage

lockout (UVLO) circuit that prevents the device from

switching until VL > 4.4V (max). UVLO ensures there is

a sufficient drive for the external MOSFETs, prevents

the high-side MOSFET from being turned on for near

100% duty cycle, and keeps the output in regulation.

t

ON MIN

(

)

2.55µs

=

= 84%

t

+t

2.55µs+0.5µs

ON MIN

OFF MAX

(

)

(

)

with V

= 6V and V

= 5V. Therefore, with IR volt-

BATT

OUT

age drops in the loop included, the minimum input volt-

age to achieve V = 5V is about 6.1V, using the

Voltage Reference (REF)

The 2V reference (REF) is accurate to 1% over tem-

perature, making REF useful as a precision system ref-

erence. Bypass REF to GND with a 0.1µF (min) ceramic

capacitor. REF can supply up to 50µA for external

OUT

step-down transfer function equation for duty cycle (DC

= V /V ). Typical units exhibit better performance.

OUT IN

Note that transient response is somewhat degraded

near dropout, and the circuit may need additional bulk

output capacitance to support fast load changes.

loads. However, if tight-accuracy specs for either V

OUT

or REF are essential, avoid loading REF. Loading slight-

ly reduces the main output voltage by an amount that

tracks the reference-voltage load regulation error.

Automatic Pulse-Skipping Switchover

This PWM control algorithm automatically switches over

to pulse-skipping operation at light loads. The

MAX1762/MAX1791 truncates the low-side switch’s on-

time when the inductor current drops to zero. The load

current level at which pulse-skipping/PWM crossover

occurs is equal to 1/2 the peak-to-peak ripple current,

which is a function of the inductor value (Figure 6).

Free-Running Constant On-Time PWM

Controller with Input Feed-Forward

The PWM control architecture is a quasi-fixed-frequen-

cy constant on-time current-mode type with voltage

feed-forward. This architecture relies on the output rip-

ple voltage to provide the PWM ramp signal; thus, the

output filter capacitor’s ESR acts as a feedback resis-

tor. The control algorithm is very simple. The high-side

switch on-time is determined solely by a one-shot

whose period is inversely proportional to input voltage

and directly proportional to output voltage. There is

another one-shot that sets a minimum amount of off-

time (500ns max). The on-time one-shot triggers when

all of the following conditions are met: the error com-

parator is low, the low-side switch current is below the

current-limit threshold, and the minimum off-time one-

shot has timed out.





K × V

V

-V

OUT

VP OUT

I

=

LOAD(SKIP)





2L

V





VP

The inductor current is never allowed to go negative. If

the output voltage is above its regulation point and the

inductor current reaches zero, the low-side driver is

switched off. Once the output voltage falls below its

regulation point, the high-side driver is switched on.

This causes a dead time in between when the high-

side and low-side drivers are on, skipping pulses and

resulting in the switching frequency slowing at light

loads, thereby improving efficiency.

On-Time One-Shot

The on-time of the one-shot is inversely proportional to

the battery voltage as measured by the VP input, and

directly proportional to the output voltage sensed at

OUT:

MOSFET Gate Drivers

The DH and DL drivers are optimized for driving moder-

ate-size power MOSFETs. This is consistent with the

low duty factor seen in the notebook CPU environment

V

+0.075V

where a large V

- V

differential exists. The high-

BATT

OUT

(

OUT

)

t

= K ×

side driver (DH) is rated for 0.6A source/sink capability

and swings from VP to GND. The low-side driver (DL) is

ON

V

BATT

where K is internally fixed at 3.349µs, and 0.075V is a

factor that accounts for the expected drop across the

synchronous switch. This arrangement maintains a

Table 3. Operating Frequency

K

(µs)

MIN

(kHz)

TYP

(kHz)

MAX

(kHz)

DEVICE

switching frequency that is nearly constant as V

,

BATT

I

, and V

are changed. Table 3 shows the oper-

LOAD

OUT

MAX1762/MAX1791

3.349

268.7

298.5

328

ating frequency range for the MAX1762/MAX1791.

Note that the output voltage adjust range for continu-

ous-conduction operation is restricted by the non-

12 ______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

I

PEAK

∆i

∆t

V

- V

BATT OUT

=

L

I

PEAK

I

LOAD

LIMIT

I

= I

/2

LOAD PEAK

I

0

ON-TIME

TIME

0

TIME

Figure 6. Pulse-Skipping/Discontinuous Crossover Point

Figure 7. “Valley” Current-Limit Threshold Point

rated for +0.5A, -0.9A source/sink capability and

swings from VL to GND.

sense voltage that appears at CS (Figure 8). Keep the

impedance at this mode low to avoid errors at CS.

The internal pulldown transistor that drives DL low is

robust, with a 1Ω typical on-resistance. This helps pre-

vent DL from being pulled up during the fast rise time of

the inductor node, due to capacitive coupling from the

drain to the gate of the low-side synchronous-rectifier

MOSFET. However, for high-current applications, some

combinations of high-and low-side FETS may cause

excessive gate-drain coupling, which can lead to poor

efficiency, EMI, and shoot-through currents.

POR and Soft-Start

Power-on reset (POR) occurs when V

rises above

BATT

approximately 2V, resetting the fault latch and soft-start

counter and preparing the PWM for operation. UVLO

circuitry inhibits switching until V

rises above 4.1V,

VP

whereupon an internal digital soft-start timer begins to

ramp up the maximum allowed current limit. The ramp

occurs in five steps: 20%, 40%, 60%, 80%, and 100%;

100% current is available after approximately 1.7ms.

An adaptive dead-time circuit monitors the DL output

and prevents the high-side FET from turning on until DL

is fully turned off. The dead time at the other edge (DH

turning off) is determined by a fixed 35ns (typ) internal

delay.

Output Undervoltage Protection

The output UVLO function is similar to foldback current

limiting but employs a timer rather than a variable cur-

rent limit. The output undervoltage protection is

enabled 20ms after POR or when coming out of shut-

down. If the output is under 70% of the nominal value,

Low-Side Current-Limit Sensing (ILIM)

The current-limit circuit employs a unique “valley” cur-

rent-sensing algorithm that uses the on-state resistance

of the low-side MOSFET as a current-sensing element.

If the current-sense signal is below the current-limit

threshold (-100mV from CS to GND), the PWM is not

allowed to initiate a new cycle (Figure 7). The actual

peak current is greater than the current-limit threshold

by an amount equal to the inductor ripple current.

Therefore, the exact current-limit characteristic and

maximum load capability are a function of the MOSFET

on-resistance, inductor value, and battery voltage.

V

P

DH

CS

1.0kΩ

V

OUT

MAX1762

MAX1791

1.0kΩ

DL

If greater current-limit accuracy is desired, CS must be

connected to the junction of the low-side switch source

and a current-sense resistor to GND. The current limit

Figure 8. Using a Resistive Voltage-Divider to Adjust Current-

Limit Sense Voltage to 200mV

will be 0.1V/R

, and the accuracy will be 10%.

SENSE

A resistive voltage-divider from the inductor’s switching

mode to ground can be used to adjust the current-limit

______________________________________________________________________________________ 13

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

then the PWM is latched off and will not restart until VP

peak amplitude of the output transient (V

function of the maximum duty factor, which can be cal-

culated from the on-time and minimum off-time:

) is also a

SAG

power is cycled, or SHDN is toggled low then high.

Design Procedure





V

(∆I

)²× L K

+t

OUT

Begin by establishing the input voltage range and max-

imum load current before choosing an inductor and its

associated ripple-current ratio (LIR). The following four

factors dictate the rest of the design:

LOAD(MAX)



OFF(MIN)

V





VP

V

=

SAG











V

- V

OUT

VP



2 × C

× V

K

- t

OFF(MIN)

OUT











V





VP

1) Input voltage range. The maximum value (V



VP

) must accommodate the maximum AC

(MAX)

where minimum off-time = 0.5µs (max).

adapter voltage. The minimum value (V

)

VP(MIN)

must account for the lowest input voltage after

drops due to connectors, fuses, and battery selec-

tor switches. If there is a choice at all, lower input

voltages result in better efficiency.

Inductor Selection

The switching frequency (on-time) and operating point

(% ripple or LIR) determine the inductor value as fol-

lows:

2) Maximum load current. There are two values to

V

(V -V

)

OUT VP OUT

consider. The peak load current (I

) deter-

LOAD(MAX)

L =

mines the instantaneous component stress and fil-

tering requirements and thus drives output

capacitor selection, inductor saturation rating, and

the design of the current-limit circuit. The continu-

V

× ƒ × LIR × I

LOAD(MAX)

VP

Example: I

= 2A, V = 7V, V

= 1.6V, f =

OUT

LOAD(MAX)

300kHz, 35% ripple current or LIR = 0.35:

VP

ous load current (I

) determines the thermal

LOAD

stress and thus drives the selection of input capaci-

tors, MOSFETs, and other critical heat-contributing

components. Modern notebook CPUs generally

1.6V(7V-1.6V)

7× 300kHz× 0.35×2A

L =

= 5.9µH

exhibit, I

= I

x 0.8.

LOAD

LOAD(MAX)

Find a low-loss inductor having the lowest possible DC

resistance that fits in the allotted dimensions. Ferrite

cores are often the best choice. The core must be large

enough not to saturate at the peak inductor current

3) Switching frequency. The MAX1762/MAX1791

have a nominal switching frequency of 300kHz.

4) Inductor ripple-current ratio (LIR). LIR is the ratio

of the peak-to-peak ripple current to the average

inductor current. Size and efficiency trade-offs must

be considered when setting the inductor ripple-cur-

rent ratio. Low inductor values cause large ripple

currents, resulting in the smallest size but poor effi-

ciency and high output noise. The minimum practi-

cal inductor value is one that causes the circuit to

operate at critical conduction (where the inductor

current just touches zero with every cycle). Inductor

values lower than this grant no further size-reduc-

tion benefit.

(I

):

PEAK

I

= I

+ [(LIR/2) ✕ I ]

LOAD(MAX)

PEAK

LOAD(MAX)

Determining Current Limit

The minimum current-limit threshold must be great

enough to support the maximum load current when the

current limit is at the minimum tolerance value. The val-

ley of the inductor current occurs at I

half of the ripple current; therefore:

minus

LOAD(MAX)

The MAX1762/MAX1791s’ pulse-skipping algorithm ini-

tiates skip mode at the critical conduction point. So, the

inductor operating point also determines the load-cur-

rent value at which switchover occurs. The optimum

point is usually found between 20% and 50% ripple

current.

I

> I

- [(LIR/2) ✕ I

]

VALLEY

LOAD(MAX) LOAD(MAX)

where I

age divided by the R

= minimum current-limit threshold volt-

VALLEY

of Q2. For the MAX1762/

DS(ON)

MAX1791, the minimum current-limit threshold is 90mV.

Use the worst-case maximum value for R from

DS(ON)

the MOSFET Q2 data sheet, and add some margin for

The inductor ripple current also impacts transient-

the rise in R

with temperature. A good general

DS(ON)

response performance, especially at low V - V

VP

OUT

rule is to allow 0.5% additional resistance for each °C of

difference. Low inductor values allow the inductor cur-

rent to slew faster, replenishing charge removed from

the output filter capacitors by a sudden load step. The

temperature rise.

14 ______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Examining the 2A circuit example with a maximum

= 52mΩ at +85°C temperature reveals the fol-

once enough capacitance is added to meet the over-

shoot requirement, undershoot at the rising load edge

R

DS(ON)

lowing:

is no longer a problem (see the V

equation in the

SAG

Design Procedure section).

I

= 90mV / 52mΩ = 1.73A

VALLEY

The amount of overshoot due to stored inductor energy

can be calculated as:

Checking the corresponding I

LOAD(MAX) reveals:

I

1.73A

2

LI

2CV

VALLEY

PEAK

I

=

= 2.1A

∆V ≤

LOAD(MAX)

1- 0.5 LIR 1- 0.5× 0.35

OUT

A current-sense resistor can be connected from CS to

GND to set the current limit for the device. The

MAX1762/MAX1791 will use the sense resistor instead

where I

is the peak inductor current.

PEAK

Stability Considerations

Stability is determined by the value of the ESR zero

of the R

of Q2 to limit the current. The maximum

DS(ON)

(f

) relative to the switching frequency (f). The point

ESR

value of the sense resistor can be calculated with the

equation:

of instability is given by the following equation:

I

= 90mV / R

SENSE

LIMIT

ƒ

π

ƒ

≤

ESR

Output Capacitor Selection

where:

The output filter capacitor must have low enough effec-

tive series resistance (ESR) to meet output ripple and

load-transient requirements, yet have high enough ESR

1

ƒ

≤

ESR

2 × π × R

× C

OUT

ESR

to satisfy stability requirements. In CPU V

convert-

CORE

ers and other applications where the output is subject

to large load transients, the output capacitor’s size

depends on how much ESR is needed to prevent the

output from dipping too low under a load transient.

Ignoring the sag due to finite capacitance:

For a typical 300kHz application, the ESR zero frequen-

cy must be well below 95kHz, preferably below 50kHz.

Tantalum, Sanyo POSCAP, and Panasonic SP capaci-

tors in widespread use at the time of publication have

typical ESR zero frequencies of 20kHz. In the design

example used for inductor selection, the ESR needed

to support a specified ripple voltage is found by the

equation:

V

DIP

R

≤

ESR

I

LOAD(MAX)

V

RIPPLE(p-p)

where V

is the maximum tolerable transient voltage

DIP

R

=

ESR

drop. In non-CPU applications, the output capacitor’s

size depends on how much ESR is needed to maintain

an acceptable level of output voltage ripple:

LIR × I

LOAD

where LIR is the inductor ripple current ratio, and I

LOAD

is the average DC load. Using a LIR = 0.35 and an

average load current of 2A, the ESR needed to support

50mVp-p ripple is 71mΩ.

Vp-p

R

≤

ESR

LIR×I

LOAD(MAX)

Do not use high-value ceramic capacitors directly

across the fast feedback inputs (FB to GND) without

taking precautions to ensure stability. Large ceramic

capacitors can have a high-ESR zero frequency and

cause erratic, unstable operation. However, it’s easy to

add enough series resistance by placing the capaci-

tors a couple of inches downstream from the junction of

the inductor and FB pin.

where Vp-p is the peak-to-peak output voltage ripple.

The actual microfarad capacitance value required

relates to the physical size needed to achieve low ESR,

as well as to the chemistry of the capacitor technology.

Thus, the capacitor is usually selected by ESR and volt-

age rating rather than by capacitance value (this is true

of tantalum, SP, POS, and other electrolytic-type

capacitors).

Unstable operation manifests itself in two related but dis-

tinctly different ways: double-pulsing and fast-feedback

loop instability. Double pulsing occurs due to noise on

the output or because the ESR is so low that there isn’t

enough voltage ramp in the output voltage signal. This

When using low-capacity filter capacitors such as

ceramics, capacitor size is usually determined by the

capacity needed to prevent V

and V

from

SOAR

SAG

causing problems during load transients. Generally,

______________________________________________________________________________________ 15

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Duty Cycle) equal to the switching losses (CV ²f).

“fools” the error comparator into triggering a new cycle

immediately after the 500ns minimum off-time period has

expired. Double pulsing is more annoying than harmful,

resulting in nothing worse than increased output ripple.

However, it can indicate the possible presence of loop

instability, which is caused by insufficient ESR. Loop

instability can result in oscillations at the output after line

or load perturbations that can cause the output voltage

to fall below the tolerance limit.

VP

Make sure that the conduction losses at the minimum

input voltage do not exceed the package thermal limits

or violate the overall thermal budget. Conduction losses

plus switching losses at the maximum input voltage

should not exceed the package ratings or violate the

overall thermal budget (see MOSFET Power Dis-

sipation).

In addition to efficiency considerations, the selection of

The easiest method for checking stability is to apply a

very fast zero-to-max load transient (refer to the

MAX1762/MAX1791 EV kit manual) and carefully

observe the output voltage ripple envelope for over-

shoot and ringing. It can help to simultaneously monitor

the inductor current with an AC current probe. Don’t

allow more than one cycle of ringing after the initial

step-response under- or overshoot.

the R

of the low-side MOSFET must account for

DS(ON)

the regulator’s required current limit. Choose a MOS-

FET that has a low enough resistance over the operat-

ing temperature range such that the device will not

enter current limit during normal operation (see

Determining Current Limit). Conversely, ultra-low

R

devices may set the current limit too high and

DS(ON)

may result in only incremental improvements in efficien-

cy. Some large N-channel FETs also have substantial

interelectrode capacitance. Verify that the MAX1762/

MAX1791 DL driver can hold the gate off when the high

side switch turns on. Cross-conduction problems can

occur when the high-side switch turns on due to cou-

pling through the N-channel’s parasitic drain-to-gate

capacitance.

Input Capacitor Selection

The input capacitor must meet the ripple-current require-

ment (I

) imposed by the switching currents.

RMS

Nontantalum chemistries (ceramic or OS-CON™) are pre-

ferred due to their resilience to power-up surge currents:













V

(V -V

)

OUT VP OUT

The MAX1762/MAX1791 have adaptive dead-time cir-

cuitry that prevents the high-side and low-side

MOSFETs from conducting at the same time (see MOS-

FET Gate Drivers). Even with this protection, it is still

possible for delays internal to the MOSFET to prevent

one MOSFET from turning off while the other is turned

on. The maximum mismatch time that can be tolerated

is 60ns. Select devices that have low turn-off times, and

I

≤ I

=

RMS LOAD

I

VP

Power MOSFET Selection

DC bias and output power considerations dominate the

selection of the power MOSFETs used with the

MAX1762/MAX1791. Take care not to exceed the

device’s maximum voltage ratings. In general, both

switches are exposed to the supply voltage, so select

make sure that NFET(t (off,max)) - PFET(t (on,min)) <

D

60ns, and PFET(t (off,max)) - NFET(t (on,min)) < 60ns.

MOSFETs with V

(max) greater than VP (max). Gate

D

DS

Failure to do so may result in efficiency-killing shoot-

through currents.

drives to the N-channel and P-channel MOSFETs are

not symmetrical. The N-channel device is driven from

ground to the logic supply VL, while the P-channel

device is driven from VP to ground. The maximum rat-

MOSFET Power Dissipation

Worst-case conduction losses occur at the duty factor

extremes. For the high-side MOSFET, the worst-case

power dissipation (PD) due to resistance occurs at min-

imum battery voltage:

ing for V

for the N-channel device is usually not an

GS

issue; however, V

(max) for the P-channel must be at

GS

least VP (max). Since V

(max) is usually lower than

GS

V

(max), gate drive constraints often dictate the

DS













required P-channel breakdown rating.

V

OUT

2

PD(Q1 resistance) =

× I

× R

LOAD DS(ON)

For moderate input-to-output differentials, the high-side

MOSFET (Q1) can be sized smaller than the low-side

MOSFET (Q2) without compromising efficiency. The

high-side switch operates at a very low duty cycle

under these conditions, so most conduction losses

occur in Q2. For maximum efficiency, choose a high-

side MOSFET (Q1) that has conduction losses (I²R x

V

VP(MIN)

Generally, a small high-side MOSFET is desired to

reduce switching losses at high input voltage. However,

the R

required to stay within package power-dis-

DS(ON)

sipation limits often limits how small the MOSFET can

be. Again, the optimum occurs when the switching (AC)

losses equal the conduction (R

) losses. High-

DS(ON)

OS-CON is a trademark of Sanyo.

16 ______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

side switching losses don’t usually become an issue

unchanged, this voltage will be approximately 0.7V (a

diode drop) at both transition edges while both switch-

es are off. In between the edges, the low-side switch

until the input is greater than approximately 15V.

Switching losses in the high-side MOSFET can become

an insidious heat problem when maximum battery volt-

age is applied, due to the squared term in the CV²f

switching loss equation. If the high-side MOSFET cho-

conducts; the drop is I ✕ R

. If a Schottky clamp

L

DS(ON)

is connected across the low-side switch, the initial and

final voltage drops will be reduced, improving efficien-

cy slightly.

sen for adequate R

at low battery voltages

DS(ON)

becomes extraordinarily hot when subjected to

, reconsider your choice of high-side MOS-

Choose a Schottky diode (D1) having a forward voltage

low enough to prevent the Q2 MOSFET body diode

from turning on during the dead time. As a general rule,

a diode having a DC current rating equal to 1/3 of the

load current is sufficient. This diode is optional and can

be removed if efficiency isn’t critical.

V

VP(MAX)

FET.

Calculating the power dissipation in Q1 due to switch-

ing losses is difficult since it must allow for difficult

quantifying factors that influence the turn-on and turn-

off times. These factors include the internal gate resis-

tance, gate charge, threshold voltage, source induc-

tance, and PC board layout characteristics. The follow-

ing switching loss calculation provides only a very

rough estimate and is no substitute for breadboard

evaluation, preferably including a verification using a

thermocouple mounted on Q1:

Applications Issues

Dropout Performance

The output voltage adjust range for continuous-conduc-

tion operation is restricted by the nonadjustable 500ns

(max) minimum off-time one-shot. When working with

low input voltages, the duty-factor limit must be calcu-

lated using worst-case values for on- and off-times.

Manufacturing tolerances and internal propagation













2

C

× V

× ƒ × I

RSS

VP(MAX) LOAD

PD (Q1 switching) =

delays introduce an error to the t

K-factor. Also,

I

ON

GATE

keep in mind that transient response performance of

buck regulators operating close to dropout is poor, and

bulk output capacitance must often be added.

where C

and I

is the reverse transfer capacitance of Q1,

RSS

is the peak gate-drive source/sink current.

GATE

For the low-side MOSFET, the worst-case power dissi-

pation always occurs at maximum battery voltage:

Dropout design example: V = 7V (min), V

IN

= 300kHz. The required duty cycle is :

= 5V, f

OUT









V

+V

5V+0.1V

7V -0.1V

OUT

SW

2

PD(Q2)= 1-

× I

× R



DC

=

= 0.74

LOAD DS

REQ





-V

V

VP SW

VP(MAX)

The worst-case on-time is:

+0.075

The absolute worst case for MOSFET power dissipation

occurs under heavy overloads that are greater than

LOAD(MAX)

the current limit and cause the fault latch to trip. To pro-

tect against this possibility, the circuit must be overde-

signed to tolerate:

V

5V+0.075

7V

OUT

I

but are not quite high enough to exceed

t

=

× K =

×

ON(MIN)

V

VP

3.35µs × 90% = 2.18µs

The maximum IC duty factor based on timing con-

straints of the MAX1762/MAX1792 is:

I

= I + (LIR / 2 ) ✕ I

LIMIT(HIGH) LOAD(MAX)

LOAD

t

2.18µs

2.18µs + 0.5µs

ON(MIN)

where I

is the maximum valley current

LIMIT(HIGH)

Duty =

=

= 0.82

allowed by the current-limit circuit, including threshold

tolerance and on-resistance variation. This means that

the MOSFET must be very well heatsinked. If short-cir-

cuit protection without overload protection is enough, a

t

+t

ON(MIN)

OFF(MAX)

which meets the required duty cycle. Remember to

include inductor resistance and MOSFET on-state volt-

age drops (V ) when doing worst-case dropout duty-

SW

factor calculations.

normal I

value can be used for calculating compo-

LOAD

nent stresses.

During the period when the high-side switch is off, cur-

rent circulates from ground to the junction of both FETs

and the inductor. As a consequence, the polarity of the

switching node is negative with respect to ground. If

Fixed Output Voltages

The MAX1762/MAX1791 Dual Mode operation allows

the selection of common voltages without requiring

external components (Figure 9). Connect FB to GND for

______________________________________________________________________________________ 17

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

(Figure 10). Refer to the MAX1791 EV kit manual for a

specific layout example.

OUT

TO ERROR

AMP

FIXED

1.8V

If possible, mount all of the power components on the

top side of the board, with their ground terminals flush

against one another. Follow these guidelines for good

PC board layout:

FIXED

3.3V

•

Isolate the power components on the top side from

the sensitive analog components on the bottom

side with a ground shield. Use a separate GND

plane under OUT. Avoid the introduction of AC cur-

rents into the GND ground planes. Run the power

plane ground currents on the top side only, if possi-

ble.

FB

0.150V

MAX1762

2.5V

•

Keep the high-current paths short, especially at the

ground terminals. This practice is essential for sta-

ble, jitter-free operation.

Figure 9. Feedback MUX

Keep the power traces and load connections short.

This practice is essential for high efficiency. Using

thick copper PC boards (2oz vs. 1oz) can enhance

full-load efficiency by 1% or more. Correctly routing

PC board traces is a difficult task that must be

approached in terms of fractions of centimeters,

where a single milliohm of excess trace resistance

causes a measurable efficiency penalty.

a fixed +1.8V (MAX1762) or 3.3V (MAX1791) output.

Connect FB to VL for a fixed 2.5V (MAX1762) or 5.0V

(MAX1791) output. Otherwise, connect FB to a resistive

voltage-divider for an adjustable output.

Setting the Output Voltage

Select V

> 1.25V for the MAX1762/MAX1791 by

OUT

connecting FB to a resistive voltage-divider between

and GND (Figure 2). Choose R2 to be about

•

Inductor and GND connections to the synchronous

rectifiers for current limiting must be made using

Kelvin sensed connections to guarantee the cur-

rent-limit accuracy. With SO-8 MOSFETs, this is

best done by routing power to the MOSFETs from

outside using the top copper layer, while connect-

ing GND and CS inside (underneath) the µMAX

package.

V

OUT

10kΩ, and solve for R1 using the equation:

R1

R2







V

= V × 1+



FB





OUT

where V = 1.25V. For a V

FB

= 3.0V, R2 = 10kΩ and

OUT

R1 = 14kΩ.

When trade-offs in trace lengths must be made, it’s

preferable to allow the inductor charging path to be

made longer than the discharge path. For example,

it’s better to allow some extra distance between the

input capacitors and the high-side MOSFET than to

allow distance between the inductor and the low-

side MOSFET or between the inductor and the out-

put filter capacitor.

For a desired V

< 1.25V, connect FB to a resistive

OUT

voltage-divider between REF and OUT (Figure 3).

Choose R1 to be about 50kΩ, and solve for R2 using

the equation:













V

-V

OUT FB

R2 =

×R1

-V

FB REF

•

Ensure that the OUT connection to C

is short

OUT

where V

= 1.25V and V

= 2.0V. For a V

=

OUT

FB

REF

and direct. However, in some cases it may be desir-

able to deliberately introduce some trace length

between the OUT connector node and the output

filter capacitor (see Stability Considerations).

1.0V, R1 = 50kΩ and R2 = 16.5kΩ. Under these condi-

tions, a minimum load of V

required.

- V

/ R1 >15µA is

FB

REF

PC Board Layout Guidelines

Careful PC board layout is critical to achieve low

switching losses and clean, stable operation. This is

especially true when multiple converters are on the

same PC board where one circuit can affect the other.

The switching power stages require particular attention

Route high-speed switching nodes (CS, DH, and

DL) away from sensitive analog areas (FB). Use

GND as an EMI shield to keep radiated switching

noise away from the IC’s feedback divider and ana-

log bypass capacitors.

18 ______________________________________________________________________________________

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

USE AGND PLANE TO:

USE PGND PLANE TO:

- BYPASS V

- BYPASS V AND REF

CC

VP

- TERMINATE EXTERNAL FB

DIVIDER (IF USED)

- PIN-STRAP CONTROL

INPUTS

- CONNECT PGND TO THE TOPSIDE STAR GROUND

AGND

VOUT

L1

PGND

C2

D1

P1

N1

VL

VIA TO GROUND

GND

C1

VBATT

CONNECT PGND TO AGND

BENEATH THE MAX1762/MAX1791 AT

ONE POINT ONLY AS SHOWN.

NOTE: EXAMPLE SHOWN IS FOR DUAL N-CHANNEL MOSFET.

Figure 10. PC Board Layout Example

sides. The top-side star ground is a star connection

of the input capacitors, side 1 low-side MOSFET.

Keep the resistance low between the star ground

and the source of the low-side MOSFETs for accu-

rate current limit. Connect the top-side star ground

(used for MOSFET, input, and output capacitors) to

the small island with a single short, wide connection

(preferably just a via).

Layout Procedure

1) Place the power components first, with ground ter-

minals adjacent (Q1 source, C , C ). If possi-

IN

OUT

ble, make all these connections on the top layer

with wide, copper-filled areas.

2) Mount the controller IC adjacent to the synchro-

nous-rectifier MOSFETs, preferably on the back

side in order to keep CS, GND, and the DL gate

drive lines short and wide. The DL gate trace must

be short and wide (measuring 50mils to 100mils

wide if the MOSFET is 1in from the controller IC).

6) Connect the output power planes directly to the out-

put filter capacitor positive and negative terminals

with multiple vias.

3) Place the V bypass capacitor near the controller

L

IC.

Chip Information

TRANSISTOR COUNT: 3520

4) Make the DC-DC controller ground connections as

follows: Near the IC, create a small analog ground

plane. Connect this plane to GND, and use this

plane for the ground connection for the REF and

PROCESS: S8E1FP

V

VP

bypass capacitors and FB dividers.

5) On the board’s top side (power planes), make a

star ground to minimize crosstalk between the two

______________________________________________________________________________________ 19

High-Efficiency, 10-Pin µMAX, Step-Down

Controllers for Notebooks

Package Information

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

Printed USA

is a registered trademark of Maxim Integrated Products.


型号：	MAX1762
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	High-Efficiency, 10-Pin レMAX, Step-Down Controllers for Notebooks 高效率， 10引脚μMAX ，降压型控制器，用于笔记本电脑电脑控制器
文件：	总20页 (文件大小：390K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MAX1762 [MAXIM]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E