MAX17116EVC+T [MAXIM]
Battery Charge Controller, Current-mode, 0.2A, 1610kHz Switching Freq-Max, BICMOS, PDSO12;
| 型号： | MAX17116EVC+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Battery Charge Controller, Current-mode, 0.2A, 1610kHz Switching Freq-Max, BICMOS, PDSO12 电池 信息通信管理 光电二极管 |
| 文件： | 总19页 (文件大小：1362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5653; Rev 0; 12/10
Dual-Output DC/DC
Power Supply for AMOLED
General Description
Features
The MAX17116 includes two current-mode 1.4MHz
switch mode power-supply (SMPS) regulators for active-
matrix organic light-emitting diode (AMOLED) displays.
The positive supply is provided by a step-up regulator
with a synchronous rectifier. The negative supply is
provided by an inverting regulator with a synchronous
rectifier.
S 2.3V to 4.2V Input Operating Voltage Range
S High-Performance PWM Step-Up Regulator
Fixed 4.6V, 250mA Output
High Accuracy ( 1ꢀ%
1.4MHz Switching Frequency
Built-In 6V/0.25I n-Channel MOSFET with
Lossless Current Sensing
Built-In 6V/0.5I p-Channel MOSFET
Synchronous Rectifier
Cycle-by-Cycle Current Limit
More than 85ꢀ Efficiency at 150mA
Good Low-Duty Factor Operation
The step-up DC-DC converter is a high-accuracy 250mA
regulator with an integrated power MOSFET switch
and synchronous rectifier. The synchronous rectifier
improves efficiency and also provides True ShutdownTM
.
Its 4.6V (fixed) output efficiency exceeds 85% at 150mA
from a 3.7V input. A built-in, 7-bit, digital soft-start func-
tion controls startup inrush currents.
S High-Performance PWM Inverting Regulator
Programmable 250mA Output
The inverting DC-DC converter is a high-accuracy
250mA regulator with a built-in power MOSFET switch
and synchronous rectifier. Its -5.4V to -1.5V output effi-
ciency exceeds 80% at 150mA from a 3.7V input. A built-
in, 7-bit, digital soft-start function controls startup inrush
currents. The internally set output voltage is adjusted
through a unique communication protocol through the
single EN pin.
High Accuracy ( 1ꢀ%
Adjustable Controlled-Output-Voltage Slew Rate
1.4MHz Switching Frequency
Built-In 14V/0.25I p-Channel Power MOSFET
with Lossless Current Sensing
Built-In 14V/0.25I n-Channel Power MOSFET
Synchronous Rectifier
The IC is available in a 12-pin, 3mm x 3mm x 0.5mm,
ultra-thin DFN package with exposed pad and 0.5mm
lead spacing to facilitate placement on extremely narrow
circuit boards and a 24-pin, 4mm x 4mm, thin QFN pack-
age with exposed pad.
Cycle-by-Cycle Current Limit
More than 80ꢀ Efficiency at 150mA
S True Shutdown for Both Outputs
S Timer-Delayed Output Undervoltage Shutdown for
Applications
OLED Displays
Both Outputs
S Thermal-Overload Protection
Phone, DSC Displays
S 12-Pin, 3mm x 3mm Ultra-Thin DFN Package and
Automobile Navigation
24-Pin, 4mm x 4mm TQFN Package
Ordering Information
PART
TEMP RANGE
-40NC to +85NC
-40NC to +85NC
PIN-PACKAGE
12 UTDFN**
24 TQFN**
MAX17116EVC+
MAX17116ETG+*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Future product—contact factory for availability.
**Exposed pad.
True Shutdown is a trademark of Maxim Integrated Products, Inc.
_______________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Dual-Output DC/DC
Power Supply for AMOLED
ABSOLUTE MAXIMUM RATINGS
IN, EN, IC, OUTP, LXP to AGND.............................-0.3V to +6V
LXN to IN...............................................................-14V to +0.3V
Continuous Power Dissipation (T = +70NC)
A
12-Pin UTDFN (derate 15.1mW/NC above +70NC) ....1206.6W
24-Pin TQFN (derate 19mW/NC above +70NC).......1520.9mW
Operating Temperature Range.......................... -40NC to +85NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +160NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
STEP to AGND ...........................................-0.3V to (V + 0.3V)
IN
PGND to AGND....................................................-0.3V to +0.3V
OUTN to AGND.......................................................-7V to +0.3V
LXN to OUTN.........................................................-0.3V to +14V
LXP, LXN, OUTP, OUTN, IN RMS Current Rating ...............1.6A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = +3.7V, Circuit of Figure 2, V
= +4.9V, V = -4.9V, T = 0°C to +85°C, unless otherwise noted. Typical values are at
OUTN A
IN
OUTP
T
= +25NC.) (Note 1)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IN Input Supply Range
2.3
4.2
V
IN Undervoltage-Lockout
Threshold
V
IN
rising, hysteresis = 200mV
1.8
2.0
2.2
V
IN Quiescent Current
EN = IN, no load, not switching
EN = IN, no load, not switching
EN = IN, no load
50
0.8
1.6
90
1.1
2.5
1
FA
mA
mA
FA
OUTP Quiescent Current
V
IN
Quiescent Current
IN Shutdown Current
EN = AGND, T = +25NC
A
STEP-UP REGULATOR
I
V
= 10mA to 200mA,
= 2.3V to 4.2V
LOAD
OUTP Regulation Voltage
OUTP Fault Trip Level
4.554
4.60
4.646
V
V
IN
Falling edge, no hysteresis
3.496
2.116
3.68
2.3
3.864
2.484
Falling edge, no hysteresis, no timer
OUTP Load Regulation
0 < I
< 200mA, DC regulation
0.1
%
kHz
mA
mA
I
LOAD
Oscillator Frequency
1190
250
1400
1610
Maximum Load Current
V
IN
= 2.9V to 4.2V (Note 2)
LXP/OUTP Peak Current Limit
LXP nMOS N1 On-Resistance
LXP pMOS1 P1 On-Resistance
LXP pMOS2 P2 On-Resistance
Duty cycle = 35%
850
1100
0.2
1350
0.4
I
I
I
= 200mA, Figure 3
= 200mA, Figure 3
= 200mA, Figure 3
LXP1
LXP1
LXP2
0.15
0.15
0.3
I
0.3
I
LXP Damping Switch
On-Resistance
20
330
2
I
I
OUTP Discharge Resistance
OUTP to PGND
7-bit voltage ramp with filtering to prevent high peak
currents
Soft-Start Period
ms
INVERTING REGULATOR
OUTN Default Regulation
Voltage
At startup: I
10mA to 200mA; V = 2.3V to 4.2V
-4.949
-5.454
-4.9
-5.4
-4.851
-5.346
V
V
LOAD
IN
OUTN Minimum Regulation
Voltage
Lowest DAC code: I
10mA to 200mA;
LOAD
V
= 2.3V to 4.2V
IN
2
Dual-Output DC/DC
Power Supply for AMOLED
ELECTRICAL CHARACTERISTICS (continued%
(V = +3.7V, Circuit of Figure 2, V
= +4.9V, V = -4.9V, T = 0°C to +85°C, unless otherwise noted. Typical values are at
OUTN A
IN
OUTP
T
= +25NC.) (Note 1)
A
PARAMETER
CONDITIONS
Highest DAC code: I 10mA to 200mA;
LOAD
MIN
TYP
MAX
UNITS
OUTN Maximum Regulation
Voltage
-1.530
-1.5
-1.470
V
V
= 2.3V to 4.2V
IN
Rising edge, no hysteresis,
relative to current DAC step
73
43
80
87
OUTN Fault Trip Level
%
Rising edge, no hysteresis,
relative to current DAC step, no timer
50
57
Oscillator Frequency
1190
250
1400
1610
kHz
mA
mA
I
Maximum Load Current
V
= 2.9V to 4.2V (Note 2)
IN
OUTN/LXN Peak Current Limit
LXN-to-IN pMOS On-Resistance
Duty cycle = 65%
1000
1200
0.25
1400
0.50
I
= 200mA
LXN
LXN-to-OUTN nMOS
On-Resistance
I
= 200mA
0.25
0.50
I
LXN
LXN Damping Switch
On-Resistance
70
330
2
I
I
OUTN Discharge Resistance
OUTN to PGND
7-bit voltage ramp with filtering to prevent high peak
currents
Soft-Start Period
ms
DAC Step Voltage
0.01
0.025
4
0.04
V
Number of DAC Steps Between
Levels
STEP = AGND
3.5
1.5
5
4
2
6
4.5
2.5
7
STEP Period
R
R
= 50kI
ms
STEP
STEP
= 150kI
SEQUENCE CONTROL
EN Input Low Voltage
EN Input High Voltage
EN Input Resistance
FAULT DETECTION
0.6
V
V
1.2
To AGND
140
kI
Duration-to-Trigger Fault
Condition
OUTP or OUTN below threshold
Latched fault
50
ms
Thermal-Shutdown Threshold
TIMING SPECIFICATIONS
Enable Start Delay
+160
NC
t
t
t
(Note 3)
300
300
60
400
70
Fs
Fs
Fs
EN_DLY
EN Pulse Stop Time
(Note 3)
250
50
STOP
EN Turn-Off Delay
(Note 3)
OFF_DLY
OUTN transition
from -4.9V to -1.5V (Note 4)
OUTN Initial Start Ramp Time
EN Pulse Frequency
2
ms
50% duty factor
12
50
250
kHz
3
Dual-Output DC/DC
Power Supply for AMOLED
ELECTRICAL CHARACTERISTICS
(V = +3.7V, Circuit of Figure 2, V
= +4.9V, V = -4.9V, T = -40°C to +85°C, unless otherwise noted. Typical values are
OUTN A
IN
OUTP
at T = +25NC.) (Note 1)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IN Input Supply Range
2.3
4.2
V
IN Undervoltage-Lockout
Threshold
V
IN
rising, hysteresis = 200mV
1.8
2.2
V
90
2.5
1.1
FA
mA
mA
IN Quiescent Current
EN = IN, no load
EN = IN, no load
OUTP Quiescent Current
STEP-UP REGULATOR
I
V
= 10mA to 200mA,
= 2.3V to 4.2V
LOAD
OUTP Regulation Voltage
OUTP Fault Trip Level
4.554
4.646
V
V
IN
Falling edge, no hysteresis
3.496
2.116
1190
800
3.864
2.484
1610
1400
0.4
Falling edge, no hysteresis, no timer
Oscillator Frequency
kHz
mA
I
LXP/OUTP Peak Current Limit
LXP nMOS N1 On-Resistance
LXP pMOS1 P1 On-Resistance
LXP pMOS2 P2 On-Resistance
INVERTING REGULATOR
Duty cycle = 35%
I
I
I
= 200mA, Figure 3
= 200mA, Figure 3
= 200mA, Figure 3
LXP1
LXP1
LXP2
0.3
I
0.3
I
OUTN Default Regulation
Voltage
At startup: I
10mA to 200mA;
LOAD
-4.949
-5.454
-1.530
73
-4.851
-5.366
-1.470
87
V
V
V
V
= 2.3V to 4.2V
IN
OUTN Minimum Regulation
Voltage
Lowest DAC code: I
10mA to 200mA;
10mA to 200mA;
LOAD
V
IN
= 2.3V to 4.2V
OUTN Maximum Regulation
Voltage
Highest DAC code: I
LOAD
V
IN
= 2.3V to 4.2V
Rising edge, no hysteresis,
relative to current DAC step
OUTN Fault Trip Level
%
Rising edge, no hysteresis,
relative to current DAC step, no timer
43
57
Oscillator Frequency
1190
1000
1610
1400
0.50
kHz
mA
I
OUTN/LXN Peak Current Limit
LXN to IN pMOS On-Resistance
Duty cycle = 65%
I
= 200mA
LXN
LXN to OUTN nMOS
On-Resistance
I
= 200mA
0.50
I
LXN
DAC Step Voltage
0.01
3.5
1.5
5
0.04
4.5
2.5
7
V
STEP = AGND
STEP Period
R
R
= 50kI
ms
STEP
STEP
= 150kI
SEQUENCE CONTROL
EN Input Low Voltage
EN Input High Voltage
0.6
V
V
1.2
4
Dual-Output DC/DC
Power Supply for AMOLED
ELECTRICAL CHARACTERISTICS (continued%
(V = +3.7V, Circuit of Figure 2, V
= +4.9V, V = -4.9V, T = -40°C to +85°C, unless otherwise noted. Typical values are
OUTN A
IN
OUTP
at T = +25NC.) (Note 1)
A
PARAMETER
TIMING SPECIFICATIONS
Enable Start Delay
CONDITIONS
MIN
TYP
MAX
UNITS
t
t
t
(Note 3)
400
Fs
Fs
EN_DLY
EN Pulse Stop Time
EN Turn-Off Delay
(Note 3)
250
50
STOP
(Note 3)
70
Fs
OFF_DLY
EN Pulse Frequency
50% duty factor
12
250
kHz
Note 1: Limits are 100% production tested at T = +25NC. Maximum and minimum limits over temperature are guaranteed by design
A
and characterization.
Note 2: Guaranteed by design, not production tested.
Note 3: The timing definitions are illustrated in Figure 1.
Note 4: The initial start ramp time depends on load conditions and is correct only when the discharge time due to load on the output
capacitance is shorter than ramp time.
t
SH
t
t
t
t
OFF_DLY
EN_DLY
STOP
STOP
EN
OUTN
t
SL
t
t
VO_OFF_DLY
TRA
t
t
IS
SS
Figure 1. EN Serial Interface Timing Diagram
5
Dual-Output DC/DC
Power Supply for AMOLED
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT
STEP-UP REGULATOR OUTPUT
LOAD REGULATION vs. LOAD CURRENT
STARTUP WAVEFORMS
MAX17116 toc01
100
90
80
70
60
50
40
0
-0.1
-0.2
-0.3
-0.4
-0.5
V
V
= 3.7V
= 4.2V
IN
IN
V
EN
2V/div
0V
0V
V
OUTP
5V/div
V
LXP
0V
0V
V
= 2.3V
IN
5V/div
V
OUTN
5V/div
0V
V
LXN
5V/div
10
100
1000
1
10
100
1000
1ms/div
LOAD CURRENT (mA)
LOAD CURRENT (mA)
STEP-UP REGULATOR LOAD TRANSIENT
STEP-UP REGULATOR
SWITCHING WAVEFORMS
(20mA
30mA)
MAX17116 toc04
MAX17116 toc05
V
OUTP
(AC-COUPLED)
10mV/div
0V
V
LXP
2V/div
0V
LOAD CURRENT
20mA/div
INDUCTOR CURRENT
200mA/div
0mA
0mA
40µs/div
400ns/div
BUCK-BOOST REGULATOR EFFICIENCY
vs. LOAD CURRENT
STEP-UP REGULATOR
LINE TRANSIENT
MAX17116 toc06
85
I
= 100mA
OUTP
80
75
70
65
60
55
50
45
40
V
= 4.2V
IN
V
IN
500mV/div
3.4V
V
= 3.7V
IN
V
OUTP
2.9V
(AC-COUPLED)
20mV/div
V
= 2.3V
IN
0V
10
100
LOAD CURRENT (mA)
1000
40µs/div
6
Dual-Output DC/DC
Power Supply for AMOLED
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
BUCK-BOOST REGULATOR OUTPUT
LOAD REGULATION vs. LOAD CURRENT
0.9
BUCK-BOOST REGULATOR
LOAD TRANSIENT (20mA
30mA)
MAX17116 toc09
V
OUTN
(AC-COUPLED)
20mV/div
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0V
LOAD CURRENT
20mA/div
0mA
-0.1
-0.2
1
10
100
1000
40µs/div
LOAD CURRENT (mA)
BUCK-BOOST REGULATOR
SWITCHING WAVEFORMS
BUCK-BOOST REGULATOR
LINE TRANSIENT
MAX17116 toc10
MAX17116 toc11
I
= 100mA
OUTN
V
LXN
5V/div
0V
V
IN
500mV/div
3.4V
V
OUTN
2.9V
(AC-COUPLED)
20mV/div
INDUCTOR CURRENT
200mA/div
0V
0mA
400ns/div
40µs/div
BUCK-BOOST REGULATOR TRANSITION
BEHAVIOR (LATER TRANSITION
BUCK-BOOST REGULATOR TRANSITION
BEHAVIOR (FIRST TRANSITION
FROM -1.5V TO -5.4V)
FROM -4.9V TO -1.5V)
MAX17116 toc13
MAX17116 toc12
V
EN
V
EN
2V/div
0V
2V/div
0V
0V
0V
V
OUTN
V
OUTN
2V/div
2V/div
I
= 100mA
I
= 100mA
OUTN
OUTN
100ms/div
1ms/div
7
Dual-Output DC/DC
Power Supply for AMOLED
Pin Configurations
TOP VIEW
TOP VIEW
18
17
16
15
14
13
12
11
10
9
N.C. 19
N.C. 20
N.C. 21
N.C. 22
N.C.
N.C.
N.C.
IN
LXN
1
2
3
4
5
6
12 PGND
LXP
11
10
9
OUTN
OUTN
EN
OUTP
OUTP
AGND
I.C.
MAX17116ETG+
N.C.
N.C.
N.C.
MAX17116
N.C.
IN
8
23
24
+
8
7
EP
STEP
7
1
2
3
4
5
6
UTDFN (3mm x 3mm)
TQFN
(4mm x 4mm)
Pin Description
PIN
UTDFN TQFN
NAME
FUNCTION
Input Supply. Source of the internal inverting regulator p-channel MOSFET switch. Connect both IN
pins to the input voltage and bypass IN to PGND with a 4.7µF ceramic capacitor.
1
1, 24
IN
Inverting Regulator Switching Node. Connect the inverting regulator’s inductor here and minimize
the trace area to reduce EMI.
2
3, 4
5
2
3, 4
5
LXN
OUTN
EN
Inverting Regulator Output Connection
Active-High Enable Input and Serial Interface Input. See the EN Serial Interface section for more
details.
DAC Step-Rate Adjustment. Connect STEP to AGND to select the default 250Hz (4ms) step rate.
Connect a resistor from STEP to AGND to select a different step rate. Since there are four DAC steps
between each EN code setting, the time between single EN step settings is 4/250Hz = 16ms default
or an adjustable time. See the EN Serial Interface section for more details.
6
6
STEP
7
13
I.C.
Internal Connection. Connect I.C. to AGND.
Not Connected
7–12,
19–23
—
N.C.
Analog Ground for Step-Up Regulator and Inverting Regulator. Connect AGND to the power ground
(PGND) pin.
8
14
15, 16
17
AGND
OUTP
LXP
9, 10
11
Step-Up Regulator Output Connection
Step-Up Regulator Switching Node. Drain of the internal step-up regulator’s n-channel MOSFET
switch. Connect the step-up regulator’s inductor here and minimize the trace area to reduce EMI.
12
—
18
—
PGND
EP
Power Ground
Exposed Pad. Connect to AGND and PGND with a large copper area for power dissipation.
8
Dual-Output DC/DC
Power Supply for AMOLED
Typical Operating Circuit
V
IN
2.3V TO 4.2V
C2
4.7FH
C1
4.7FF
L1
4.7FH
L2
IN
LXP
4.7FH
LXN
OUTP
PGND
C3
10FF
MAX17116
ELVSS
-5.2V TO -2.2V
250mA
OUTN
C4
10FF
ON/OFF
AND
ELVSS ADJ
EN
EP
AGND
STEP
Figure 2. MAX17116 Typical Operating Circuit
The device's typical operating circuit is shown as Figure
2. The input supply voltage range is from 2.3V to 4.2V.
The output voltage ELVDD is a fixed voltage of 4.6V (typ)
and the ELVSS voltage is adjustable from -5.4V to -1.5V
through the EN serial interface. Table 1 lists some rec-
ommended components, and Table 2 lists the contact
information for component suppliers.
Table 1. Component List
DESIGNATION
DESCRIPTION
4.7FF Q10%, 10V X5R ceramic capacitors (0603)
TDK C1608X5R1A475K
C1, C2
C3, C4
10FF Q10%, 10V X7R ceramic capacitors (0805)
Murata GRM21BR71A106K
Low-profile 4.7FH, 0.9A inductors
Würth TPC2807
L1, L2
Sumida CDH36D07NP-4R7
Table 2. Component Suppliers
SUPPLIER
Sumida Corp.
TDK Corp.
PHONE
FAX
WEBSITE
847-545-6700
847-803-610
847-545-6720
847-390-4405
www.sumida.com
www.component.tdk.com
Würth Electronik
GmbH & Co. KG
408-262-4400
408-262-4410
www.we-online.com
9
Dual-Output DC/DC
Power Supply for AMOLED
V
IN
2.3V TO 4.2V
IN
LXP
R
DAM_P
P1
P2
IN
OUTP
ELVDD
4.6V/250mA
P
INV
PWM
BST
PWM
LXN
N1
N
ELVSS
-5.4V TO -1.5V
250mA
PGND
OUTN
R
DAM_N
MAX17116
SEQUENCE AND ELVSS ADJUSTMENT
PGND
REF
AGND
STEP
EN
EP
ON/OFF AND
ELVSS ADJ
Figure 3. MAX17116 Functional Diagram
step-up regulator output is a fixed voltage of 4.6V and
the inverting regulator output is adjustable from -5.4V
to -1.5V through the single-wire EN serial interface. The
input voltage range is 2.3V to 4.2V and both regula-
tors provide an output current of 250mA from an input
voltage of at least 2.9V. Figure 3 shows the MAX17116
functional diagram.
Detailed Description
The MAX17116 includes two current-mode 1.4MHz
SMPS regulators for AMOLED displays. The positive
supply is provided by a step-up regulator with a syn-
chronous rectifier. The negative supply is provided by
an inverting regulator with a synchronous rectifier. The
10
Dual-Output DC/DC
Power Supply for AMOLED
Step-Up Regulator
Inverting Converter
The inverting converter is also a constant-frequency
(1.4MHz) current-mode type and includes synchro-
nous rectification to lower application of BOM cost and
improve efficiency. The inverter operates in skip mode
only at light loads and includes a damping switch that
turns on when the synchronous rectifier turns off at zero
or negative current. The switch prevents ringing in the
inductor in discontinuous conduction and the resulting
RF noise.
The step-up regulator is a constant-frequency current-
mode type. It operates at a 1.4MHz switching frequency
to allow the use of tiny 0.6mm thin inductors. The IC’s
internal digital soft-start, internal MOSFET switch, and
synchronous rectifier reduce the number of external
components for a very compact application circuit.
The regulator controls the output voltage and the power
delivered to the output by modulating duty cycle D of
the internal power MOSFET in each switching cycle. An
error amplifier compares the feedback signal with an
internal reference voltage and changes its output inter-
nal compensation node with its pole/zero series resistor
and capacitor to set the peak inductor current. As the
load varies, the error amplifier sources or sinks current
to the compensation node accordingly to produce the
inductor peak current necessary to service the load. To
maintain stability at high duty cycles, a slope compensa-
tion signal is added.
The inverting converter operates similarly to the step-up
converter, except that the main switch is a p-channel
MOSFET between LXN and IN. Energy is stored in the
inductor during the switch on-time and the continuous
inductor current pulls current from the output to ground
when the flip-flop resets, the main switch turns off, and
the synchronous rectifier turns on.
The internally set output voltage for the inverting con-
verter is adjustable between -5.4V and -1.5V in 100mV
steps. Adjustment is accomplished though a unique
control interface using the EN pin as shown in the EN
Serial Interface section. The step rate while program-
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The
current through the inductor ramps up linearly, stor-
ing energy in its magnetic field. Once the sum of the
current-feedback signal and the slope compensation
exceed the compensation voltage, the controller resets
the flip-flop, turning off the MOSFET and turning on
the synchronous rectifier. Since the inductor current is
continuous, a transverse potential develops across the
inductor and the inductor sources current to the output.
The voltage across the inductor then becomes the differ-
ence between the output voltage and the input voltage.
This discharge condition forces the current through the
inductor to ramp back down, transferring the energy
stored in the magnetic field to the output capacitor and
the load. The MOSFET remains off for the rest of the
clock cycle.
ming V
is also adjustable through STEP pin set-
OUTN
tings shown in the Electrical Characteristics table.
EN Serial Interface
The enable pin (EN) is used as an on/off pin, as well
as a serial interface input. When EN goes high, the IC
starts operation only after a 300Fs delay. Similarly, when
EN falls, the IC enters the shutdown state only after a
60Fs delay. This makes the EN pin available for serial-
data input as long as the pin state keeps changing fast
enough to avoid entering shutdown (12kHz or greater).
The interface protocol is a simple correspondence
between the number of pulses to ground on EN (1 to 40)
and the desired output voltage (-5.4V to -1.5V). Table 3
shows the relationship between the number of pulses
and the desired output voltage for the driver IC.
The converter operates in skip mode only at very light
loads (typically it is less than 4mA) and includes a damp-
ing switch that turns on when the synchronous rectifier
turns off at zero or negative current to control LXP ringing.
11
Dual-Output DC/DC
Power Supply for AMOLED
Table 3. Inverting Regulator Output Voltage with EN Pulses
EN PULSES
V
(V%
EN PULSES
V
(V%
OUTN
-5.4
-5.3
-5.2
-5.1
-5.0
-4.9
-4.8
-4.7
-4.6
-4.5
-4.4
-4.3
-4.2
-4.1
-4.0
-3.9
-3.8
-3.7
-3.6
-3.5
-3.4
OUTN
-3.3
-3.2
-3.1
-3.0
-2.9
-2.8
-2.7
-2.6
-2.5
-2.4
-2.3
-2.2
-2.1
-2.0
-1.9
-1.8
-1.7
-1.6
-1.5
—
1
2
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
—
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
—
—
During serial pulses, EN must remain in the high state
or in the low state for between 2Fs and 45Fs. Pulses are
counted until EN remains high at least 200Fs. After EN
stays high for that length of time, the count of pulses is
latched and decoded to the desired DAC code.
-5.4V, the first commanded transition from the startup
voltage, and shutdown.
For startup, the DAC is set to the standard startup volt-
age of -4.9V, with no DAC stepping, and a 2ms voltage-
ramping soft-start is used. After startup, the first transi-
tion to a programmed value uses DAC stepping with a
step-rate that is 128 times the normal rate to accomplish
the largest possible transition in less than 3ms. Note that
transitions to less negative output voltages depend on
the output load, as much as the DAC stepping, to deter-
mine that transition rate.
The output voltage normally changes very slowly, over a
long time period. This is accomplished by dividing each
100mV DAC step in 4 x 25mV substeps lasting approxi-
mately 4ms each. The timing is controlled by an internal
oscillator with a default timing of 4ms, which can also be
adjusted by an external resistor from STEP to AGND. For
example, when STEP is connected to AGND, a default
For shutdown, the DAC stepping is not used and the
internal discharge resistor, along with the output load,
determines the output discharge rate. The internal dis-
charge resistor (330I, typ) is available on both OUTP
and OUTN.
timing of 4ms per substep is selected and when R
STEP
varies from 50kI to 150kI, the step rate varies from
2ms to 6ms.
For most output-voltage transitions, V
changes
OUTN
slowly in this strictly controlled manner. The exceptions
to this include startup to the standard startup voltage of
Figure 4 shows the timing sequence for the output-volt-
age transitions for these three exceptional cases.
12
Dual-Output DC/DC
Power Supply for AMOLED
OUTN
STARTUP
FIRST TRANSITION
SHUTDOWN
V
IN
OV
V
EN
OV
V
V
OUTP
OV
OV
OUTN
t
t
t
t
OFF_DLY
OUTP, OUTN
DISCHARGE
t
EN_DLY
SS_INV
OUTN
STOP
SS_BST
OUTP
SOFT-START
SOFT-START
Figure 4. MAX17116 Power-On/-Off Timing Sequence
Undervoltage Lockout (UVLO)
The UVLO circuit compares the input voltage at IN
with the UVLO threshold (2.0V, typ) to ensure the input
voltage is high enough for reliable operation. The wide
200mV (typ) hysteresis prevents supply transients from
causing a restart. The startup procedure begins when
input voltage exceeds the UVLO rising threshold and
EN goes above its logic-high threshold. During normal
operation, if the input voltage falls below the UVLO fall-
ing threshold, the device enters its shutdown state.
Output Undervoltage Protection
During steady-state operation, if the output of the step-up
converter or inverting regulator output does not exceed
certain fault-detection thresholds, protection circuitry is
activated and the outputs may shut down. Each regulator
has an output-short threshold (typically 50% of regula-
tion) that triggers immediate shutdown of all outputs.
Further, for simple overload conditions, each regulator
has an undervoltage threshold (typically 80% of regula-
tion) that activates an internal fault timer (50ms, typ); if
the overload condition continues for the fault-timer dura-
tion, then the IC shuts down all its outputs.
13
Dual-Output DC/DC
Power Supply for AMOLED
relatively low, increasing inductance to lower the peak
Thermal Protection
The MAX17116 includes a thermal-protection circuit.
Thermal-overload protection prevents excessive power
dissipation from overheating the device. When the junc-
current can decrease losses throughout the power path.
If extremely thin high-resistance inductors are used, the
best LIR can increase to between 0.5 and 1.0.
tion temperature exceeds T = +160NC (typ), the device
J
Once a physical inductor is chosen, higher and lower
values of the inductor should be evaluated for efficiency
improvements in typical operating regions.
shuts down. Cycling the input voltage (below the UVLO
falling threshold) or bringing EN low for more than 70Fs
clears the fault latch and reactivates the device. The
thermal-overload protection protects the controller in the
event of fault conditions. For continuous operation, do
not exceed the absolute maximum junction temperature
Calculate the required inductance, the maximum DC
current, the inductor ripple current, and the peak induc-
tor current using the equations below to choose an
inductor value from an appropriate inductor family. The
inductor’s saturation current rating and the LXP and LXN
current limits should exceed the peak currents calcu-
lated above. The inductor’s DC current rating should
exceed the maximum expected DC current. For good
efficiency, choose an inductor with less than 0.5Iseries
resistance.
rating of T = +150NC.
J
Design Procedure
Inductor Selections
The inductance value, peak current rating, and series
resistance are factors to consider when selecting the
inductors for the step-up and inverting converters. These
factors influence the converters’ efficiencies, maximum
output load capabilities, transient response times, and
output ripple voltages. Physical size and cost are also
important factors to be considered.
Step-Up Converter Inductor L
P
Use the following procedure to choose the inductor for
the step-up converter. An example is provided below
using typical operating conditions of:
V
V
= 3.7V Typical operating input voltage
= 2.3V Minimum operating input voltage
IN(TYP)
The maximum output currents, input voltages, output
voltages, and switching frequencies determine the
inductor values. Very high inductance values minimize
the current ripple, and therefore, reduce the peak cur-
rent, which decreases core losses in the inductor and
I2R losses in the entire power path. However, large
inductor values also require more energy storage and
more turns of wire, which increase physical size and
can increase I2R losses in the inductor. Low inductance
values decrease the physical size but increase the cur-
rent ripple and peak current. Finding the best inductor
involves choosing the best compromise between circuit
efficiency, inductor size, and cost.
IN(MIN)
I
= 250mA Maximum output current (V
2.9V)
>
=
OUTP1(MAX)
IN
IN
I
= 200mA Maximum output current (V
2.3V)
OUTP2(MAX)
η
η
= 0.90 Expected efficiency at the typical oper-
ating condition
P(TYP)
P(MIN)
= 0.81 Worst-case efficiency expected at the
minimum operating input voltage and
maximum output current
f
= 1.4MHz Switching frequency
SW
The equations used here include a constant, LIR, which
is the ratio of the inductor peak-to-peak ripple current to
the average DC inductor current at the full load current.
The best trade-off between inductor size and circuit effi-
ciency for step-up and inverting regulators generally has
an LIR between 0.3 and 0.5. However, depending on
the AC characteristics of the inductor core material and
ratio of inductor resistance to other power-path resis-
tances, the best LIR can shift up or down. If the inductor
resistance is relatively high, more current ripple can be
accepted to reduce the number of turns required and
increase the wire diameter. If the inductor resistance is
LIR = 0.5
Ratio of the inductor peak-to-peak rip-
ple current to the average DC inductor
current
1) Calculate the required inductance:
2
V
V
- V
η
IN(TYP)
OUTP
IN(TYP)
P(TYP)
LIR
L
=
×
×
P
V
I
× f
OUTP(MAX) SW
OUTP
2
3.7V
4.6V
4.6V - 3.7V
250mA×1.4MHz
0.9
0.5
=
×
×
= 2.99µH
14
Dual-Output DC/DC
Power Supply for AMOLED
Choose L = 4.7FH since actual inductance of these
η
= 0.60 Worst-case efficiency expected at the
minimum operating input voltage and
maximum output current
P
N(MIN)
small inductors is much less at significant current.
2) Calculate the maximum DC current in the inductor
and select an inductor whose DC current rating is
greater than the maximum DC current calculated:
f
= 1.4MHz Switching frequency
SW
LIR = 0.6
Ratio of the inductor peak-to-peak ripple
current to the average DC inductor cur-
rent
I
×V
OUTP2(MAX)
OUTP
× η
P(MIN)
I
=
=
LP(DC_MAX)
V
IN(MIN)
1) Calculate the required inductance:
200mA × 4.6V
2.3V × 0.81
2
V
V
× η
IN(TYP)
OUTN N(TYP)
L
=
=
= 493mA
N
(V
) + V
f
×I
×LIR
IN(TYP)
OUTN
SW OUTN1(MAX)
3) Calculate the peak amplitude of the inductor current
and choose an inductor with a saturation current rat-
ing greater than the peak inductor current calculated.
Also, verify that the peak inductor current amplitude
is below the minimum current rating of LXP. Use the
formulas below to calculate the inductor current ripple
and peak inductor current:
2
-4.9V × 0.70
3.7V
3.7V + -4.9V
1.4MHz × 250mA × 0.6
= 3.6A
Choose L = 4.7FH since inductance of these small
inductors decreases with high current.
N
2) Calculate the maximum DC current in the inductor to
select an inductor whose DC current rating is greater
than the maximum DC current calculated:
V
× V
- V
(
)
IN(MIN)
OUTP IN(MIN)
∆I
=
LP_RIPPLE
L
× V
× f
P
OUTP SW
V
+ V
OUTN
IN(MIN)
∆I
LP_RIPPLE
2
I
=I
×
LN(DC,MAX) OUTN2(MAX)
I
= I
+
LP(DC,MAX)
P(PEAK)
η
× V
IN(MIN)
N(MIN)
2.3V × 4.6V - 2.3V
(
)
-4.9V + 2.3V
= 493mA +
= 580mA
=130mA ×
2× 4.7µH× 4.6V ×1.4MHz
0.60 ×2.3V
3) Calculate the peak amplitude of the inductor current
to choose an inductor with a saturation current rating
less than the peak inductor current calculated. Also,
with this result, verify that the peak inductor current
amplitude is below the minimum current rating of
LXN. Formulas to calculate the inductor current ripple
and peak inductor current follow:
Inverting Converter Inductor L
N
Use the following procedure to choose the inductor for
the inverting converter. An example is provided below
using typical operating conditions of:
V
V
V
I
= 3.7V Typical operating input voltage
= 2.3V Minimum operating input voltage
IN(TYP)
IN(MIN)
= -4.9V Output voltage
V
OUTN
V
IN(MIN)
OUTN
∆I
=
×
LN_RIPPLE
= 250mA Maximum output current (V
>
=
L
× f
V
+ V
OUTN1(MAX)
IN
IN
N
SW
IN(MIN)
OUTN
2.9V)
∆I
LN_RIPPLE
2
I
= I
+
I
= 130mA Maximum output current (V
2.3V)
OUTN2(MAX)
LN(PEAK) LN(DC,MAX)
-4.9V
2.3V
η
= 0.70 Expected efficiency at the typical oper-
ating condition
= 680mA +
P(TYP)
4.7µH×1.4MHz 2.3 + -4.9V
15
Dual-Output DC/DC
Power Supply for AMOLED
OUTP and OUTN Output
Input Capacitor Selection
Capacitor Selection
The total output voltage ripple has two components: the
capacitive ripple caused by the charging and discharg-
ing of the output capacitance, and the ohmic ripple due
to the capacitor’s equivalent series resistance (ESR):
The input capacitor reduces the current peaks drawn
from the input supply and reduces noise injection into the
IC. Two 4.7µF ceramic capacitors are used in Figure 2.
Applications Information
For the step-up converter:
Power Dissipation
An IC’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the IC package, PCB copper area,
other thermal mass, and airflow. More PCB copper, cool-
er ambient air, and more airflow increase the possible
dissipation, while less copper or warmer air decreases
the IC’s dissipation capability. The major components of
power dissipation are the power dissipated in the step-
up regulator and inverting converter.
V
= V
+ V
OUTP_RIPPLE
V
OUTP_RIPPLE(C) OUTP_RIPPLE(ESR)
I
V
− V
V
OUTP
OUTP
OUTP IN
≈
OUTP_RIPPLE(C)
C
× f
OUTP SW
and:
V
≈I
×R
OUTP_RIPPLE(ESR) LP(PEAK) ESR_COUTP
where:
Step-Up Regulator
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, the inductor, and the
synchronous rectifier. If the step-up regulator has 90%
efficiency, approximately 4% to 6% of the power is lost in
the internal MOSFET and synchronous rectifier, approxi-
mately 3% to 4% in the inductor. The remaining 1% to
3% is distributed among the input and output capacitors
and the PCB traces. This gives a good estimate of the
power dissipated in the IC by the step-up regulator.
The following formulas can also be used to estimate
the power loss in the internal power MOSFET and the
synchronous rectifier (excluding switching losses). The
conduction power loss in the internal power MOSFET is:
C
is the step-up converter’s output capacitance.
OUTP
I
is the step-up converter’s peak inductor cur-
LP(PEAK)
rent from the inductor selection.
R
is the capacitor’s ESR.
ESR_COUTP
For the inverting converter:
V
= V
OUTN_RIPPLE(C)
+ V
OUTN_RIPPLE(ESR)
OUTN_RIPPLE
V
V
I
OUTN
+ V
OUTN
OUTN
× f
≈
OUTN_RIPPLE(C)
C
V
IN
OUTN SW
and:
V
≈I
×R
OUTN_RIPPLE(ESR) LN(PEAK) ESR_COUTN
2
P
= I
×R
DSON_LXP
LXP_ON
SW1(RMS)
where:
C
OUTN
is the inverting converter’s output capacitance
where:
I
is the inverting converter’s peak inductor cur-
LN(PEAK)
∆I
1
3
LP_RIPPLE
2
I
= I
× D ×[1+ ×(
) ]
rent from the inductor selection
SW1(RMS)
LP(DC_MAX)
1
I
LP(DC_MAX)
R
is the capacitor’s ESR
ESR_COUTN
For ceramic capacitors, the output-voltage ripple is
typically dominated by the capacitive term. The voltage
rating and temperature characteristics of the output
capacitor must also be considered.
R
is the on-resistance for the internal power
DSON_LXP
MOSFET.
D is the duty cycle on the step-up regulator.
1
16
Dual-Output DC/DC
Power Supply for AMOLED
The conduction power loss in the synchronous rectifier is:
The conduction power loss in the synchronous rectifier is:
2
2
P
= I
× R
DSON_SYN2
P
= I
× R
DSON_SYN1
SYN2
SYN1
SYN2(RMS)
SYN1(RMS)
where:
where:
∆I
1
3
LN_RIPPLE
∆I
2
1
3
LP_RIPPLE
2
I
= I
SYN2(RMS) LN(DC_MAX)
×
(1-D )×[1+ ×(
) ]
I
= I
×
(1-D )×[1+ ×(
) ]
2
SYN1(RMS)
LP(DC_MAX)
1
I
LN(DC_MAX)
I
LP(DC_MAX)
R
is the on-resistance for the synchronous
R
is the on-resistance for the synchronous
DSON_SYN1
DSON_SYN2
rectifier.
rectifier.
D is the duty cycle on the step-up regulator.
1
D is the duty cycle on the inverting converter.
2
In general, at full power, if the switch sizes have been
chosen well, the switching losses in the main switch are
approximately equal to the conduction losses in that
switch. The synchronous rectifier switching losses are
small since switching occurs with zero voltage across
the switch.
In general, at full power, if the switch sizes have been
chosen well, the switching losses in the main switch are
approximately equal to the conduction losses in that
switch. The synchronous rectifier switching losses are
small since switching occurs with zero voltage across
the switch.
Inverting Converter
The largest portions of power dissipation in the invert-
ing regulator are the internal MOSFET, the inductor,
and the synchronous rectifier. If the inverting regulator
has 85% efficiency, approximately 7% to 10% of the
power is lost in the internal MOSFET and synchronous
rectifier, approximately 4% to 5% in the inductor. The
remaining 1% to 4% is distributed among the input and
output capacitors and the PCB traces. This gives a good
estimate of the power dissipated in the IC by the invert-
ing regulator. Like the step-up converter, the following
formulas can be used to estimate the power loss in the
internal power MOSFET and the synchronous rectifier
(excluding switching losses):
PCB Layout and Grounding
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
1) Place the input capacitors as close as possible to
the IN pin so the trace connecting one end of the
capacitors to the IN pin and the trace connecting
the other end of the capacitors to the PGND pin is
as short as possible.
2) Place the step-up converter inductor so the traces
connecting the inductor to the LXP pin and the input
capacitors are as short as possible.
3) Connect the output capacitors of OUTP and OUTN
as close as possible to their respective pins.
The conduction power loss in the internal power MOSFET is:
2
4) Create a power ground plane (PGND) so the other
end of these capacitors and the PGND pin can con-
nect to this plane directly.
P
= I
×R
DSON_LXN
LXN_ON
SW2(RMS)
5) Create an analog ground plane (AGND) so the other
end of these capacitors and the AGND pin can con-
nect to this plane directly. Place the inverting con-
verter inductor so the trace connecting the inductor
to the LXN pin and the distance the inductor current
has to travel through the PGND plane to the PGND
pin are as short as possible.
where:
∆I
1
3
LN_RIPPLE
2
I
= I
×
(1-D )×[1+ ×(
) ]
SYN2(RMS)
LN(DC_MAX)
2
I
LN(DC_MAX)
R
is the on-resistance for the internal power
DSON_LXN
MOSFET.
D is the duty cycle on the inverting converter.
2
17
Dual-Output DC/DC
Power Supply for AMOLED
6) Make a single connection between the AGND and
PGND planes together at a point closest to the
PGND pin only. Connect the entire backside pad to
PGND with a larger plane for good thermal perfor-
mance. Make no other connections between these
two ground planes. If vias are needed to make this
connection, use multiple vias instead of a single via
to help reduce the resistance and the inductance
attributed by the vias and place the vias close to
the PGND pin so the AGND plane can connect to
the PGND plane at a point closest to the PGND pin.
9) Avoid using vias in the high-current paths. If vias are
unavoidable, use multiple vias instead of single vias
to help reduce the resistance and the inductance
attributed by the vias. Avoid using vias in connec-
tion with switched current. Use vias, if necessary, in
connections with continuous currents. For the step-
up regulator, the continuous-current connections
are between the input capacitor and the inductor
and between the inductor and LXP. For the inverting
regulator, the continuous current paths are between
the inductor and PGND and between the inductor
and LXN. Avoid vias in all other high-current connec-
tions including ground connections.
7) Care should be taken to avoid running traces that
carry any noise-sensitive signals near LXP or LXN or
high-current traces.
10 Refer to the MAX17116 Evaluation Kit for an example
of a proper board layout.
8) Minimize the length and maximize the width of the
traces between the output capacitors and the load
for best transient responses.
Chip Information
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
12 UTDFN-EP
24 TQFN-EP
V1233N+1
T2444N+4
21-0451
21-0139
90-0339
90-0035
18
Dual-Output DC/DC
Power Supply for AMOLED
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
0
12/10
Initial release
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
19
©
2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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