MAX17020 [MAXIM]
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator; 双通道Quick - PWM降压型控制器，具有低功耗LDO和RTC电源
| 型号： | MAX17020 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator |
| 文件： | 总34页 (文件大小：633K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4118; Rev 2; 2/09
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
General Description
Features
o
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The MAX17020 is a dual Quick-PWM™ step-down
power-supply (SMPS) controller with synchronous rec-
tification, intended for main 5V/3.3V or I/O 1.5V/1.05V
power generation in battery-powered systems. Low-
side MOSFET sensing provides a simple low-cost,
highly efficient current sense for valley current-limit
protection. Combined with the output overvoltage and
undervoltage protection features, this current limit
ensures robust output supplies.
Dual Quick-PWM
Internal 100mA 5V or Adjustable Linear Regulator
Independent LDO Bypass Input
Internal Boost Diodes
Secondary Feedback Input Maintains Charge Pump
3.3V 5mA RTC Power (Always On)
OUT1: 5V or 1.5V Fixed or 0.7V Adjustable
Feedback
The 5V/3.3V or 1.5V/1.05V SMPS outputs can save
power by operating in pulse-skipping mode or in ultra-
sonic mode to avoid audible noise. Ultrasonic mode
forces the controller to maintain switching frequencies
greater than 20kHz at light loads.
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OUT2: 3.3V or 1.05V Fixed or Dynamic Adjustable
Dynamic 0V to 2V REFIN2 Input on Second SMPS
2V 1ꢀ 50ꢁA Reference
6V to 24V Input Range (28V max)
Ultrasonic Mode
An internal 100mA linear regulator can be used to
either generate the 5V bias needed for power-up or
other lower power “always-on” suspend supplies. An
independent bypass input allows automatic bypassing
of the linear regulator when the SMPS is active.
Independent SMPS and LDO Enable Controls
Independent SMPS Power-Good Outputs
Minimal Component Count
This main controller also includes a secondary feed-
back input that triggers an ultrasonic pulse (DL1 turned
on) if the SECFB voltage drops below its threshold volt-
age. This refreshes an external charge pump driven by
DL1 without overcharging the output voltage.
Ordering Information
PART
MAX17020ETJ+
TEMP RANGE
PIN-PACKAGE
-40°C to +85°C
32 TQFN
The device includes independent shutdown controls to
simplify power-up and power-down sequencing. To
prevent current surges at startup, the internal voltage
target is slowly ramped up from zero to the final target
over a 1ms period. To prevent the output from ringing
below ground in shutdown, the internal voltage target
is ramped down from its previous value to zero over a
1ms period. Two independent power-good outputs
simplify the interface with external controllers.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
16
15
LX2 25
DH2 26
LX1
The MAX17020 is a pin-for-pin replacement of the
MAX8778.
DH1
14 ON1
27
28
29
30
31
32
ON2
Applications
PGOOD1
ILIM1
13
12
PGOOD2
SKIP
Notebook Computers
MAX17020
Main System Supply (5V and 3.3V Supplies)
I/O System Supply (1.5V and 1.05V Supplies)
Graphic Cards
11 FB1
OUT2
10 OUT1
ILIM2
9
BYP
+
REFIN2
1
2
3
4
5
6
7
8
DDR1, DDR2, DDR3 Power Supplies
Game Consoles
Low-Power I/O and Chipset Supplies
Two-to-Four Li+ Cell Battery-Powered Devices
PDAs and Mobile Communicators
Telecommunication
THIN QFN (T3255-4)
5mm x 5mm
A "+" SIGN FIRST-PIN INDICATOR DENOTES A LEAD-FREE PACKAGE.
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
ABSOLUTE MAXIMUM RATINGS
IN, ONLDO to GND ................................................-0.3V to +28V
BST1 to LX1..............................................................-0.3V to +6V
DH2 to LX2 ..............................................-0.3V to (V + 0.3V)
V , V
DD CC
to GND .....................................................-0.3V to +6V
BST2
RTC, LDO to GND ....................................................-0.3V to +6V
OUT_ to GND ...........................................................-0.3V to +6V
ON1, ON2 to GND....................................................-0.3V to +6V
BST2 to LX2..............................................................-0.3V to +6V
LDO, RTC, REF Short Circuit to GND.........................Momentary
RTC Current Continuous.....................................................+5mA
LDO Current (Internal Regulator)
Continuous..................................................................+100mA
LDO Current (Switched Over) Continuous .....................+200mA
PGOOD_ to GND........................................-0.3V to (V
REF, ILIM_, TON, SKIP to GND..................-0.3V to (V
+ 0.3V)
+ 0.3V)
CC
CC
FB1, REFIN2, LDOREFIN to GND ............................-0.3V to +6V
SECFB to GND .........................................................-0.3V to +6V
Continuous Power Dissipation (T = +70°C)
A
BYP to GND..............................................-0.3V to (V
GND to PGND .......................................................-0.3V to +0.3V
DL_ to PGND..............................................-0.3V to (V + 0.3V)
+ 0.3V)
32-Pin 5mm x 5mm TQFN
LDO
MAX1720
(derate 34.5mW/°C above +70°C).................................2.76W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DD
BST_ to GND ..........................................................-0.3V to +34V
BST_ to V ............................................................-0.3V to +28V
DD
DH1 to LX1 ..............................................-0.3V to (V
+ 0.3V)
BST1
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC
A
A
(Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT SUPPLIES
V
= 6V to 24V, ON1 = ON2 = GND,
IN
IN Standby Supply Current
I
85
50
175
70
µA
µA
IN(STBY)
ONLDO = V
CC
V
= 4.5V to 24V,
IN
IN Shutdown Supply Current
IN Supply Current
I
IN(SHDN)
ON1 = ON2 = ONLDO = GND
ON1 = ON2 = REFIN2 = V
SKIP = FB1 = GND,
V
,
CC
I
0.1
1.0
0.2
1.5
mA
mA
IN
= 3.5V, V
= 5.3V
OUT2
OUT1
ON1 = ON2 = REFIN2 = V
SKIP = FB1 = GND,
,
CC
V
CC
Supply Current
I
CC
V
= 3.5V, V
= 5.3V
OUT1
OUT2
PWM CONTROLLERS
5V preset output: FB1 = GND,
= 12V, SKIP = V
4.95
1.485
0.693
5.00
1.50
5.05
1.515
0.707
V
IN
CC
V
OUT1
OUT1 Output Voltage Accuracy
(Note 1)
1.5V preset output: FB1 = V (5V),
CC
V
V
= 12V, SKIP = V
CC
IN
Adjustable feedback output,
= 12V, SKIP = V
V
0.700
FB1
V
IN
CC
OUT1 Voltage Adjust Range
0.7
5.5
V
V
Low
High
0.04
0.110
FB1 Dual-Mode™ Threshold
Voltage Levels
V
CC
-
V
CC
-
1.6V
0.7V
FB1 Input Bias Current
I
V
FB1
= 0.8V, T = +25°C
-0.2
+0.2
µA
FB1
A
Dual Mode is a trademark of Maxim Integrated Products, Inc.
_______________________________________________________________________________________
2
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC
A
A
(Note 3)
PARAMETER
SYMBOL
CONDITIONS
3.3V preset output: REFIN2 = V (5V),
MIN
TYP
MAX
UNITS
CC
3.267
3.30
3.333
1.060
1.005
V
= 12V, SKIP = V
CC
IN
OUT2 Output Voltage Accuracy
(Note 1)
1.05V preset output: REFIN2 = RTC (3.3V),
V
V
1.040
0.995
1.050
1.00
OUT2
V
= 12V, SKIP = V
CC
IN
Tracking output: V
= 1.0V,
REFIN2
V
= 12V, SKIP = V
CC
IN
OUT2 Voltage-Adjust Range
REFIN2 Voltage-Adjust Range
0
2
V
V
0
2
V
V
= 2.2V, T = +25°C
-0.1
-0.5
2.2
+0.1
+0.1
3.0
REFIN2
A
REFIN2 Input Bias Current
I
µA
REFIN2
= 0, T = +25°C
REFIN2
A
Low (REFIN2 = RTC)
REFIN2 Dual-Mode Threshold
Voltage Levels
V
V
CC
-
V
CC
-
High (REFIN2 = V
)
CC
1.0V
0.4V
Either SMPS, SKIP = V , I
= 0 to 5A
= 0 to 5A
-0.1
-1.7
CC LOAD
Load Regulation Error
%
Either SMPS, SKIP = REF, I
LOAD
Either SMPS, SKIP = GND, I
= 0 to 5A
-1.5
LOAD
Line Regulation Error
DH1 On-Time
Either SMPS, V = 6V to 24V
0.005
%/V
ns
IN
TON = GND or REF
(400kHz)
V
V
= 12V,
IN
895
1052
1209
t
t
= 5.0V
ON1
ON2
OUT1
(Note 2)
TON = V (200kHz)
CC
1895
475
2105
555
2315
635
TON = GND (500kHz)
V
V
= 12V,
IN
OUT2
= 3.3V
DH2 On-Time
ns
TON = REF or V
(300kHz)
CC
833
925
1017
400
(Note 2)
Minimum Off-Time
t
(Note 2)
250
1
ns
ms
OFF(MIN)
Soft-Start/Stop Slew Rate
Soft-Start/Stop Slew Rate
Dynamic REFIN2 Slew Rate
Ultrasonic Operating Frequency
SECFB Threshold Voltage
SECFB Input Bias Current
LINEAR REGULATOR (LDO)
t
t
Rising/falling edge on ON1 or ON2 (preset)
Rising/falling edge on ON2 (REFIN2 ADJ)
SS
SS
1
8
mV/µs
mV/µs
kHz
V
t
Rising edge on REFIN2
DYN
SW(USONIC)
f
SKIP = open (REF)
20
27
2.0
V
1.94
-0.2
2.06
+0.2
SECFB
I
V
V
= 2.2V, T = +25°C
µA
SECFB
SECFB
A
= 24V, LDOREFIN = BYP = GND,
IN
4.90
3.23
5.0
3.3
1.0
5.10
3.37
0mA < I
< 100mA
LDO
V
= 24V, LDOREFIN = V , BYP = GND,
CC
IN
LDO Output-Voltage Accuracy
V
V
LDO
0mA < I
< 100mA
LDO
V
= 24V, BYP = GND, V
= 0.5V,
IN
LDOREFIN
0.960
1.040
0mA < I
< 100mA
LDO
LDOREFIN Input Range
V
V
V
= 2 x V
0.3
-0.5
0.1
2.0
V
LDOREFIN
LDO
LDOREFIN
LDOREFIN Leakage Current
I
= 0 or 2V, T = +25°C
+0.5
0.20
µA
LDOREFIN
LDOREFIN
A
LDOREFIN low threshold
0.15
LDOREFIN Dual-Mode
Threshold Voltage
V
V
CC
2V
-
V
CC
-
V
CC
-
LDOREFIN high threshold
1.5V
0.9V
_______________________________________________________________________________________
3
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC
A
A
(Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LDO Short-Circuit Current
I
LDO = GND
100
260
mA
ILIM(LDO)
LDO Regulation Reduction/
Bypass Switchover Threshold
With respect to the LDO voltage,
falling edge of BYP
-11.0
-8.5
-6.5
-6.0
%
%
LDO Bypass Switchover
Threshold
With respect to the LDO voltage,
rising edge of BYP
MAX1720
LDO Bypass Switchover
Startup Timeout
t
Rising edge of BYP to bypass gate pulled low
500
1.2
4.0
μs
BYP
LDO Bypass Switch Resistance
LDO to BYP, V
= 5V (Note 4)
4.5
4.3
Ω
BYP
Falling edge of V
,
CC
3.8
V
Undervoltage-Lockout
CC
PWM disabled below this threshold
V
V
UVLO(VCC)
(UVLO) Threshold
Rising edge of V
4.2
CC
Thermal-Shutdown Threshold
T
Hysteresis = 10°C
+160
°C
SHDN
3.3V ALWAYS-ON LINEAR REGULATOR (RTC)
ON1 = ON2 = GND, V = 6V to 24V,
IN
3.23
3.33
3.43
0 < I
< 5mA
RTC
RTC Output-Voltage Accuracy
V
V
RTC
ON1 = ON2 = ONLDO = GND,
= 6V to 24V, 0 < I < 5mA
3.19
5
3.47
30
V
IN
RTC
RTC Short-Circuit Current
REFERENCE (REF)
I
RTC = GND
mA
ILIM(RTC)
Reference Voltage
V
V
= 4.5V to 5.5V, I = 0
REF
1.980
-10
2.00
1.95
2.020
+10
V
mV
V
REF
CC
Reference Load-Regulation Error
REF Lockout Voltage
ΔV
I
= -20μA to 50μA
REF
REF
V
V
Rising edge, 350mV (typ) hysteresis
REF(UVLO)
OUT1 FAULT DETECTION
OUT1 Overvoltage Trip
Threshold
With respect to error-comparator threshold
13
16
19
%
OVP(OUT1)
OUT1 Overvoltage Fault-
Propagation Delay
t
FB1 forced 50mV above trip threshold
10
70
10
-16
10
μs
%
OVP
OUT1 Undervoltage-Protection
Trip Threshold
V
With respect to error-comparator threshold
65
75
UVP(OUT1)
OUT1 Output-Undervoltage
Fault-Propagation Delay
t
μs
%
UVP
With respect to error-comparator threshold,
falling edge, hysteresis = 1%
PGOOD1 Lower Trip Threshold
PGOOD1 Propagation Delay
PGOOD1 Output Low Voltage
PGOOD1 Leakage Current
-19
-13
FB1 forced 50mV beyond PGOOD1 trip
threshold, falling edge
t
μs
V
PGOOD1
PGOOD1
V
= 0.56V (PGOOD1 low impedance),
= 4mA
FB1
0.3
1
I
SINK
V
= 0.70V (PGOOD1 high impedance),
FB1
I
μA
PGOOD1 forced to 5.5V, T = +25°C
A
4
_______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC
A
A
(Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUT2 FAULT DETECTION
Preset mode (REFIN2 = RTC or V ): with
CC
respect to error-comparator threshold
13
16
19
%
V
OUT2 Overvoltage Trip
Threshold
Dynamic transition,
V
+
REF
0.20
V
OVP(OUT2)
SKIP = REF or V and OUT2 > REFIN2
CC
Tracking mode: with respect to REFIN2 voltage
Minimum overvoltage threshold
170
200
0.7
230
mV
V
OUT2 Overvoltage
Fault-Propagation Delay
t
OUT2 forced 50mV above trip threshold
10
µs
OVP
Preset mode: with respect to
error-comparator threshold
65
70
-300
10
75
%
mV
µs
OUT2 Undervoltage-Protection
Trip Threshold
V
UVP(OUT2)
Tracking mode: with respect to REFIN2 voltage
-250
-350
OUT2 Overvoltage
Fault-Propagation Delay
t
OUT2 forced 50mV above trip threshold
OVP
OUT2 Output Undervoltage
Fault-Propagation Delay
t
OUT2 forced 50mV below trip threshold
10
25
µs
UVP
Blanking initiated; REFIN2 deviation from the
internal target voltage (error-comparator
threshold); hysteresis = 5mV
Dynamic REFIN2 Transition
PGOOD Blanking Threshold
mV
Preset mode: with respect to error-comparator
threshold, falling edge, hysteresis = 1%
-19
-16
-150
10
-13
%
mV
µs
V
PGOOD2 Lower Trip Threshold
Tracking mode: with respect to REFIN2
voltage, falling edge, hysteresis = 12mV
-175
-125
OUT2 forced 50mV beyond PGOOD1 trip
threshold, falling edge
PGOOD2 Propagation Delay
PGOOD2 Output-Low Voltage
PGOOD2 Leakage Current
t
PGOOD2
PGOOD2
V
= V
- 150mV (PGOOD2 low
REFIN2
OUT2
0.3
1
impedance), I
= 4mA
SINK
OUT2 = REFIN2 (PGOOD2 high impedance),
PGOOD2 forced to 5.5V, T = +25°C
I
µA
A
CURRENT LIMIT
ILIM_ Adjustment Range
ILIM_ Current
V
0.2
2.0
V
ILIM
I
5
µA
ILIM
R
R
R
_ = 100kꢀ
_ = 200kꢀ
_ = 400kꢀ
44
90
50
56
ILIM
ILIM
ILIM
Valley Current-Limit Threshold
(Adjustable)
V
V
AGND
- V _
LX
mV
100
200
110
220
VALLEY
180
Current-Limit Threshold
(Negative)
With respect to valley current-limit threshold,
SKIP = V
V
-120
25
%
NEG
CC
Ultrasonic Current-Limit Threshold
V
V
= V
= V
= 0.77V, V = 0.70V
REFIN2
mV
mV
NEG(US)
OUT1
OUT2
FB1
Current-Limit Threshold
(Zero Crossing)
V
V
- V _, SKIP = GND or OPEN/REF
3
ZX
AGND
LX
_______________________________________________________________________________________
5
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC
A
A
(Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GATE DRIVERS
DH_ Gate Driver On-Resistance
R
BST1 - LX1 and BST2 - LX2 forced to 5V
DL1, DL2; high state
1.5
2.2
0.6
3.5
4.5
1.5
ꢀ
ꢀ
DH
DL_ Gate Driver On-Resistance
R
DL
DL1, DL2; low state
MAX1720
DH_ Gate Driver Source/Sink
Current
DH1, DH2 forced to 2.5V,
BST1 - LX1 and BST2 - LX2 forced to 5V
I
2
A
DH
I
DL
DL_ Gate Driver Source Current
DL1, DL2 forced to 2.5V
DL1, DL2 forced to 2.5V
1.7
3.3
5
A
A
ꢀ
(SOURCE)
DL_ Gate Driver Sink Current
I
DL (SINK)
Internal BST_ Switch
On-Resistance
R
BST
I _ = 10mA, V = 5V
BST DD
V
_ = 26V, T = +25°C,
A
BST
BST_ Leakage Current
I
0.1
5
µA
BST
OUT2 and FB1 above regulation threshold
INPUTS AND OUTPUTS
V
0.4V
-
CC
High
TON Input Logic Levels
V
REF or open
Low
1.6
3.0
0.4
V
0.4V
-
CC
High (forced-PWM)
SKIP Input Logic Levels
V
Open (ultrasonic)
Low (skip)
1.6
3.0
0.4
+2
SKIP, TON Leakage Current
ON_ Input Logic Levels
ON_ Leakage Current
I
I
V
= V = 0 or 5V, T = +25°C
TON A
-2
µA
V
SKIP, TON
SKIP
High (SMPS on)
2.4
68mV hysteresis
Low (SMPS off)
0.8
+2
I
V
= V = 0 or 5V, T = +25°C
ON2 A
-2
µA
V
ON_
ON1
High (SMPS on)
2.4
ONLDO Input Logic Levels
ONLDO Leakage Current
68mV hysteresis
Low (SMPS off)
= 0 or 24V, T = +25°C
0.8
+1
I
V
-1
µA
ONLDO
ONLDO
A
6
_______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = -40°C to +85°C, unless otherwise noted.) (Note 3)
CC
A
PARAMETER
INPUT SUPPLIES
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
= 6V to 24V, ON1 = ON2 = GND,
IN
IN Standby Supply Current
IN Shutdown Supply Current
IN Supply Current
I
200
µA
µA
IN(STBY)
ONLDO = V
CC
I
V
IN
= 4.5V to 24V, ON1 = ON2 = ONLDO = GND
70
IN(SHDN)
ON1 = ON2 = REFIN2 = V
SKIP = FB1 = GND, V
,
CC
I
IN
0.2
mA
= 3.5V, V
= 5.3V
= 5.3V
OUT2
OUT1
OUT1
ON1 = ON2 = REFIN2 = V
SKIP = FB1 = GND, V
,
CC
V
CC
Supply Current
I
1.5
mA
CC
= 3.5V, V
OUT2
PWM CONTROLLERS
5V preset output: FB1 = GND,
= 12V, SKIP = V
4.90
1.47
5.10
1.53
V
IN
CC
V
OUT1
OUT1 Output-Voltage Accuracy
(Note 1)
1.5V preset output: FB1 = V (5V),
CC
V
V
= 12V, SKIP = V
CC
IN
Adjustable feedback output,
= 12V, SKIP = V
V
FB1
0.685
0.715
V
IN
CC
OUT1 Voltage-Adjust Range
0.7
5.5
V
V
Low
High
3.3V preset output: REFIN2 = V (5V),
0.040
0.125
FB1 Dual-Mode Threshold
Voltage
V
CC
-
V
CC
-
1.6V
0.7V
CC
3.234
3.366
V
= 12V, SKIP = V
CC
IN
OUT2 Output-Voltage Accuracy
(Note 1)
1.05V preset output: REFIN2 = RTC (3.3V),
V
1.029
0.985
1.071
1.015
V
OUT2
V
= 1.2V, SKIP = V
CC
IN
Tracking output: V
= 1.0V,
REFIN2
V
= 12V, SKIP = V
CC
IN
OUT2 Voltage-Adjust Range
REFIN2 Voltage-Adjust Range
0
0
2
2
V
V
Low (REFIN2 = RTC)
High (REFIN2 = V
2.2
3.0
REFIN2 Dual-Mode Threshold
Voltage
V
V
CC
-
V
CC
-
)
CC
1.2V
0.4V
TON = GND or REF
(400kHz)
895
1209
V
V
= 12V,
IN
DH1 On-Time
DH2 On-Time
t
t
ns
ns
ON1
ON2
= 5.0V (Note 2)
= 3.3V (Note 2)
OUT1
TON = V (200kHz)
CC
1895
475
2315
635
TON = GND (500kHz)
V
V
= 12V,
IN
TON = REF or V
(300kHz)
CC
OUT2
833
1017
425
Minimum Off-Time
t
(Note 2)
ns
kHz
V
OFF(MIN)
Ultrasonic Operating Frequency
SECFB Threshold Voltage
f
SKIP = open (REF)
18
SW(USONIC)
V
1.92
2.08
SECFB
_______________________________________________________________________________________
7
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = -40°C to +85°C, unless otherwise noted.) (Note 3)
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LINEAR REGULATOR (LDO)
V
= 24V, LDOREFIN = BYP = GND,
IN
4.85
3.20
5.15
0mA < I
< 100mA
LDO
V
= 24V, LDOREFIN = V , BYP = GND,
CC
IN
LDO Output-Voltage Accuracy
V
LDO
3.40
V
0mA < I
< 100mA
LDO
MAX1720
V
= 24V, BYP = GND, V
= 0.5V,
IN
LDOREFIN
0.960
1.040
0mA < I
< 100mA
LDO
LDOREFIN Input Range
V
V
= 2x V
0.3
2.0
V
V
LDOREFIN
ILIM(LDO)
LDO
LDOREFIN
LDOREFIN low threshold
0.10
0.25
LDOREFIN Dual-Mode
Threshold Voltage
V
CC
2V
-
V
CC
-
LDOREFIN high threshold
0.9V
LDO Short-Circuit Current
I
LDO = GND
260
mA
%
LDO Regulation Reduction/
Bypass Switchover Threshold
Falling edge of BYP
-12
3.8
-5
V
CC
Undervoltage-Lockout
Falling edge of V
PWM disabled below this threshold
,
CC
V
4.3
V
UVLO(VCC)
Threshold
3.3V ALWAYS-ON LINEAR REGULATOR (RTC)
ON1 = ON2 = GND, V = 6V to 24V,
IN
3.18
3.45
0 < I
< 5mA
RTC
RTC Output-Voltage Accuracy
V
RTC
V
ON1 = ON2 = ONLDO = GND,
= 6V to 24V, 0 < I < 5mA
3.16
5
3.50
30
V
IN
RTC
RTC Short-Circuit Current
REFERENCE (REF)
I
RTC = GND
mA
ILIM(RTC)
Reference Voltage
V
V
= 4.5V to 5.5V, I = 0
REF
1.975
-10
2.025
+10
V
REF
CC
Reference Load-Regulation Error
OUT1 FAULT DETECTION
V
I
= -20µA to 50µA
mV
REF
REF
OUT1 Overvoltage Trip
Threshold
V
V
With respect to error-comparator threshold
With respect to error-comparator threshold
12
63
20
77
%
%
%
V
OVP(OUT1)
OUT1 Undervoltage-Protection
Trip Threshold
UVP(OUT1)
With respect to error-comparator threshold,
falling edge, hysteresis = 1%
PGOOD1 Lower Trip Threshold
-20
-12
0.4
V
= 0.56V (PGOOD1 low impedance),
= 4mA
FB1
PGOOD1 Output-Low Voltage
I
SINK
OUT2 FAULT DETECTION
Preset mode (REFIN2 = RTC or V ): with
CC
respect to error-comparator threshold
12
20
%
OUT2 Overvoltage Trip
Threshold
V
OVP(OUT2)
Tracking mode: with respect to REFIN2 voltage
160
240
mV
8
_______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, V = 12V, V
= V
= V
= 5V, V
= 1.0V, BYP =
REFIN2
IN
DD
CC
SECFB
LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = V , T = -40°C to +85°C, unless otherwise noted.) (Note 3)
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
63
TYP
MAX
UNITS
%
Preset mode: with respect to error-comparator
threshold
77
-370
-12
OUT2 Undervoltage-Protection
Trip Threshold
V
UVP(OUT2)
Tracking mode: with respect to REFIN2 voltage
-230
-20
mV
%
Preset mode: with respect to error-comparator
threshold, falling edge, hysteresis = 1%
PGOOD2 Lower Trip Threshold
PGOOD2 Output-Low Voltage
Tracking mode: with respect to REFIN2
voltage, falling edge, hysteresis = 12mV
-185
-115
0.4
mV
V
V
= V
- 150mV (PGOOD2 low
OUT2
REFIN2
impedance), I
= 4mA
SINK
CURRENT LIMIT
ILIM_ Adjustment Range
V
0.2
40
2.0
60
V
ILIM
R
ILIM
R
ILIM
R
ILIM
_ = 100kΩ
_ = 200kΩ
_ = 400kΩ
Valley Current-Limit Threshold
(Adjustable)
V
V
AGND
- V _
LX
85
115
236
mV
VALLEY
164
GATE DRIVERS
DH_ Gate Driver On-Resistance
R
BST1 - LX1 and BST2 - LX2 forced to 5V
DL1, DL2; high state
3.5
4.5
1.5
Ω
Ω
DH
DL_ Gate Driver On-Resistance
R
DL
DL1, DL2; low state
INPUTS AND OUTPUTS
V
0.4V
-
CC
High
TON Input Logic Levels
V
V
REF or open
Low
1.6
3.0
0.4
V
-
CC
High (forced-PWM)
0.4V
SKIP Input Logic Levels
Open (ultrasonic)
Low (skip)
1.6
2.4
2.4
3.0
0.4
High (SMPS on)
Low (SMPS off)
High (LDO on)
Low (LDO off)
ON_ Input Logic Levels
V
V
0.8
0.8
ONLDO Input Logic Levels
Note 1: DC output accuracy specifications refer to the threshold of the error comparator. When the inductor is in continuous conduc-
tion, the MAX17020 regulates the valley of the output ripple, so the actual DC output voltage is higher than the trip level by
50% of the output ripple voltage. In discontinuous conduction (I
< I
), the output voltage has a DC regulation
LOAD(SKIP)
OUT
level higher than the error-comparator threshold by approximately 1.5% due to slope compensation.
Note 2: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = PGND, V
= 5V,
BST
and a 500pF capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times might be differ-
ent due to MOSFET switching speeds.
Note 3: Limits are 100% production tested at T = +25°C. Maximum and minimum limits over temperature are guaranteed by design
A
and characterization.
Note 4: Specifications increased by 1Ω to account for test measurement error.
_______________________________________________________________________________________
9
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
Typical Operating Characteristics
(Circuit of Figure 1, V = 12V, V
= V
= 5V, TON = REF, T = +25°C, unless otherwise noted.)
IN
DD
CC
A
5V OUTPUT EFFICIENCY
vs. LOAD CURRENT
5V OUTPUT EFFICIENCY
vs. LOAD CURRENT
3.3V OUTPUT EFFICIENCY
vs. LOAD CURRENT
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
5V SMPS ENABLED
7V
SKIP MODE
MAX1720
PWM MODE
12V
20V
7V
20V
ULTRASONIC
MODE
12V
SKIP MODE
PWM MODE
SKIP MODE
PWM MODE
12V
0.01
0.1
1
10
0.01
0.1
1
10
10
12
0.01
0.01
0
0.1
1
10
10
25
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
3.3V OUTPUT EFFICIENCY
vs. LOAD CURRENT
SMPS OUTPUT VOLTAGE DEVIATION
vs. LOAD CURRENT
SWITCHING FREQUENCY
vs. LOAD CURRENT
100
95
90
85
80
75
70
65
60
55
50
3
2
1000
100
10
5V SMPS ENABLED
PWM MODE
LOW-NOISE
ULTRASONIC
SKIP MODE
LOW-NOISE
ULTRASONIC
MODE
1
PWM MODE
ULTRASONIC
MODE
0
SKIP MODE
-1
PWM MODE
SKIP MODE
-2
-3
12V
12V
12V
1
0.01
0.1
1
10
0.01
0.1
1
0.1
1
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
5V LDO OUTPUT VOLTAGE
vs. LOAD CURRENT
3.3V RTC OUTPUT VOLTAGE
vs. LOAD CURRENT
NO-LOAD INPUT SUPPLY CURRENT
vs. INPUT VOLTAGE
5.2
5.1
5.0
4.9
4.8
4.7
3.5
3.4
3.3
100
10
PWM MODE
LOW-NOISE
ULTRASONIC
SKIP MODE
1
0.1
3.2
3.1
3.0
0.01
0
20
40
60
80 100 120 140
0
2
4
6
8
10
5
10
15
20
LOAD CURRENT (mA)
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
10 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 12V, V
= V = 5V, TON = REF, T = +25°C, unless otherwise noted.)
CC A
IN
DD
STANDBY AND SHUTDOWN INPUT
SUPPLY CURRENT vs. INPUT VOLTAGE
REFERENCE OFFSET
VOLTAGE DISTRIBUTION
REFIN2 OFFSET
VOLTAGE DISTRIBUTION
1
70
60
50
70
60
50
SAMPLE SIZE = 150
SAMPLE SIZE = 150
+85°C
+25°C
+85°C
+25°C
STANDBY (ONLDO = V
)
IN
40
30
40
30
0.1
20
10
0
20
10
0
SHUTDOWN
(ONLDO = ON1 = ON2 = GND)
0.01
0
5
10
15
20
25
-20
-12
-4
4
12
20
-5
-3
-1
1
3
5
INPUT VOLTAGE (V)
2V REF OFFSET VOLTAGE (mV)
REFIN2 OFFSET VOLTAGE (mV)
100mV ILIM THRESHOLD
VOLTAGE DISTRIBUTION
LDO AND RTC POWER-UP
LDO AND RTC POWER REMOVAL
MAX17020 toc15
MAX17020 toc14
50
40
30
20
10
0
SAMPLE SIZE = 150
+85°C
+25°C
A
12V
12V
5V
12V
A
12V
B
5V
0V
0V
C
3.3V
B
5V
3.3V
2V
D
2.0V
C
3.3V
D
2.0V
0V
0V
90
94
98
102
106
110
200μs/div
A. INPUT SUPPLY, 5V/div
B. 5V LDO, 2V/div
200μs/div
A. INPUT SUPPLY, 5V/div
B. 5V LDO, 2V/div
C. 3.3V RTC, 2V/div
D. 2.0V REF, 1V/div
C. 3.3V RTC, 2V/div
D. 2.0V REF, 1V/div
ILIM THRESHOLD VOLTAGE (mV)
______________________________________________________________________________________ 11
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 12V, V
IN
= V
= 5V, TON = REF, T = +25°C, unless otherwise noted.)
DD
CC
A
STARTUP WAVEFORMS
5V LDO LOAD TRANSIENT
5V SMPS STARTUP AND SHUTDOWN
(SWITCHING REGULATORS)
MAX17020 toc16
MAX17020 toc17
MAX17020 toc18
A
5V
5V
5V
0V
A
5V
5V
A
0V
5V
5V
B
5V
MAX1720
B
5V
0V
0V
C
D
0.1A
0A
B
5V
0V
0A
C
4μs/div
200μs/div
A. 5V LDO OUTPUT, 0.2V/div
B. 5V SMPS OUTPUT, 2V/div
C. ON1, 5V/div
100μs/div
A. LDO OUTPUT,
100mV/div
B. LOAD CURRENT,
100mA/div
A. ON1, 2V/div
C. PGOOD1, 5V/div
D. INDUCTOR CURRENT,
5A/div
B. 5V SMPS OUTPUT,
2V/div
SHUTDOWN WAVEFORMS
(SWITCHING REGULATORS)
5V SMPS LOAD TRANSIENT
(PWM MODE)
MAX17020 toc20
MAX17020 toc19
3.1A
0A
5V
A
B
0V
5V
A
5V
0A
0V
5V
0V
B
C
D
C
0A
40μs/div
A. LOAD CURRENT, 2A/div
200μs/div
C. PGOOD1, 2V/div
A. ON1, 5V/div
B. 5V SMPS OUTPUT, 100mV/div
C. INDUCTOR CURRENT, 2A/div
B. 5V SMPS OUTPUT,
2V/div
D. INDUCTOR CURRENT,
5A/div
12 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 12V, V
= V
= 5V, TON = REF, T = +25°C, unless otherwise noted.)
CC A
IN
DD
POWER REMOVAL
(SMPS UVLO RESPONSE)
3.3V SMPS LOAD TRANSIENT
MAX17020 toc21
MAX17020 toc22
6.5A
0.5A
7V
A
A
B
5V
5V
3.3V
0A
B
C
5V
C
D
40μs/div
A. LOAD CURRENT, 5A/div
B. 3.3V SMPS OUTPUT, 100mV/div
C. INDUCTOR CURRENT, 5A/div
10ms/div
A. INPUT VOLTAGE, 5V/div C. 5V SMPS, 2V/div
B. 5V LDO OUTPUT, 2V/div D. PGOOD1, 5V/div
Pin Description
PIN
NAME
FUNCTION
2V Reference-Voltage Output. Bypass REF to AGND with a 0.1µF or greater ceramic capacitor. The
reference can source up to 50µA for external loads. Loading REF degrades output-voltage accuracy
according to the REF load-regulation error. The reference shuts down when ON1, ON2, and ONLDO are all
pulled low.
1
REF
Switching-Frequency Setting Input. Select the OUT1/OUT2 switching frequencies by connecting TON as
follows for:
2
TON
High (V ) = 200kHz/300kHz
CC
Open (REF) = 400kHz/300kHz
GND = 400kHz/500kHz
Analog Supply Voltage Input. Connect V to the system supply voltage with a series 50ꢀ resistor, and
bypass to analog ground using a 1µF or greater ceramic capacitor.
CC
3
4
V
CC
Enable Input for LDO. Drive ONLDO high to enable the linear regulator (LDO) output. Drive ONLDO low to
shut down the linear regulator output.
ONLDO
RTC
3.3V Always-On Linear Regulator Output for RTC Power. Bypass RTC with a 1µF or greater ceramic
capacitor to analog ground. RTC can source at least 5mA for external load support. RTC power-up is
required for controller operation.
5
6
Power-Input Supply. IN powers the linear regulators (RTC and LDO) and senses the input voltage for the
Quick-PWM on-time one-shot timers. The high-side MOSFET’s on-time is inversely proportional to the input
voltage. Bypass IN with a 0.1μF or greater ceramic capacitor to PGND close to the MAX17020.
IN
Linear Regulator Output. Bypass LDO with a 4.7µF or greater ceramic capacitor. LDO can source at least
100mA for external load support. LDO is powered from IN and its regulation threshold is set by LDOREFIN.
For preset 5V operation, connect LDOREFIN directly to GND. For preset 3.3V operation, connect LDOREFIN
7
LDO
directly to V . When LDO is used for 5V operation, LDO must supply V and V .
DD
CC
CC
______________________________________________________________________________________ 13
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
Pin Description (continued)
PIN
NAME
FUNCTION
External Reference Input for the Linear Regulator. LDOREFIN sets the LDO regulation voltage (V
= 2 x
LDO
V
) for a 0.3V to 2V LDOREFIN range. Connect LDOREFIN to GND for a fixed 5V linear-regulator
LDOREFIN
8
LDOREFIN
output voltage, or connect LDOREFIN to V for a fixed 3.3V linear-regulator output voltage. When LDO is set
CC
to 5V and is enabled, LDO must supply V and V
.
CC
DD
Linear Regulator Bypass Input. When BYP voltage exceeds 93.5% of the LDO voltage, the controller
bypasses the LDO output to the BYP input. The bypass switch is disabled if the LDO voltage drops by 8.5%
from its nominal regulation threshold. When not being used, connect BYP to GND.
9
BYP
OUT1
FB1
MAX1720
Output Voltage-Sense Input for SMPS1. OUT1 is an input to the Quick-PWM on-time one-shot timer. OUT1 also
serves as the feedback input for the preset 5V (FB1 = GND) and 1.5V (FB1 = V ) output voltage settings.
CC
10
11
Adjustable Feedback Voltage-Sense Connection for SMPS1. Connect FB1 to GND for fixed 5V operation.
Connect FB1 to V for fixed 1.5V operation. Connect FB1 to an external resistive voltage-divider from OUT1
CC
to analog ground to adjust the output voltage between 0.7V and 5.5V.
Valley Current-Limit Adjustment for SMPS1. The GND - LX1 current-limit threshold is 1/10 the voltage present
on ILIM1 over a 0.2V to 2V range. An internal 5µA current source allows this voltage to be set with a single
resistor between ILIM1 and analog ground.
12
13
ILIM1
Open-Drain Power-Good Output for SMPS1. PGOOD1 is low when the output voltage is more than 16% (typ) below
the nominal regulation threshold, during soft-start, in shutdown, and after the fault latch has been tripped. After the
soft-start circuit has terminated, PGOOD1 becomes high impedance if the output is in regulation.
PGOOD1
14
15
ON1
DH1
Enable Input for SMPS1. Drive ON1 high to enable SMPS1. Drive ON1 low to shut down SMPS1.
High-Side Gate-Driver Output for SMPS1. DH1 swings from LX1 to BST1.
Inductor Connection for SMPS1. Connect LX1 to the switched side of the inductor. LX1 is the lower supply rail
for the DH1 high-side gate driver.
16
LX1
Boost Flying-Capacitor Connection for SMPS1. Connect to an external capacitor as shown in Figure 1. An
optional resistor in series with BST1 allows the DH1 turn-on current to be adjusted.
17
18
19
BST1
DL1
Low-Side Gate-Driver Output for SMPS1. DL1 swings from PGND to V
DD.
Supply-Voltage Input for the DL_ Gate Drivers. Connect to a 5V supply. Also connect to the drain of the BST
diode switch.
V
DD
Secondary Feedback Input. The secondary feedback input forces the SMPS1 output into ultrasonic mode
when the SECFB voltage drops below its 2V threshold voltage. This forces DL1 and DH1 to switch, allowing
the system to refresh an external low-power charge pump being driven by DL1 (see Figure 1). Connect
20
SECFB
SECFB to V to the 5V bias supply to disable secondary feedback.
CC
21
22
23
AGND
PGND
DL2
Analog Ground. Connect the backside exposed pad to AGND.
Power Ground
Low-Side Gate-Driver Output for SMPS2. DL2 swings from PGND to V
DD.
Boost Flying-Capacitor Connection for SMPS2. Connect to an external capacitor as shown in Figure 1. An
optional resistor in series with BST2 allows the DH2 turn-on current to be adjusted.
24
25
BST2
LX2
Inductor Connection for SMPS2. Connect LX2 to the switched side of the inductor. LX2 is the lower supply rail
for the DH2 high-side gate driver.
14 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Pin Description (continued)
PIN
26
NAME
DH2
FUNCTION
High-Side Gate-Driver Output for SMPS2. DH2 swings from LX2 to BST2.
Enable Input for SMPS2. Drive ON2 high to enable SMPS2. Drive ON2 low to shut down SMPS2.
27
ON2
Open-Drain Power-Good Output for SMPS2. PGOOD2 is low when the output voltage is more than 150mV
(typ) below the REFIN2 voltage or more than 16% below the preset voltage, during soft-start, in shutdown,
28
29
PGOOD2 and when the fault latch has been tripped. After the soft-start circuit has terminated, PGOOD2 becomes high
impedance if the output is in regulation. PGOOD2 is blanked—forced high-impedance state—when a
dynamic REFIN transition is detected.
Pulse-skipping Control Input. This three-level input determines the operating mode for the switching
regulators:
SKIP
High (V ) = Forced-PWM operation
CC
Open/REF (2V) = Ultrasonic mode
GND = Pulse-skipping mode
Output Voltage-Sense Input for SMPS2. OUT2 is an input to the Quick-PWM on-time one-shot timer. OUT2
also serves as the feedback input for the preset 3.3V (REFIN2 = V ) and 1.05V (REFIN2 = RTC).
CC
30
31
OUT2
ILIM2
Valley Current-Limit Adjustment for SMPS2. The GND - LX2 current-limit threshold is 1/10 the voltage present
on ILIM2 over a 0.2V to 2V range. An internal 5µA current source allows this voltage to be set with a single
resistor between ILIM2 and analog ground.
External Reference Input for SMPS2. REFIN2 sets the feedback-regulation voltage (V
= V
). The
REFIN2
OUT2
MAX17020 includes an internal window comparator to detect when the REFIN2 voltage changes, allowing the
controller to blank PGOOD2 and the fault protection. Connect REFIN2 to RTC for fixed 1.05V operation.
Connect REFIN2 to V for fixed 3.3V operation.
CC
32
—
REFIN2
EP
Exposed Pad. Connect the backside exposed pad to AGND.
______________________________________________________________________________________ 15
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
INPUT (V )*
IN
7V TO 24V
NOTE: PLACE C22 BETWEEN
IN AND PGND AS CLOSE AS
POSSIBLE TO THE MAX17020.
C22
0.1μF
C
IN
IN
4 x 10μF 25V
N
H1
N
H2
DH1
DH2
BST1
BST2
C
BST1
C
BST2
L2
L1
0.1μF
0.1μF
5V OUTPUT
LX1
DL1
LX2
DL2
3.3V OUTPUT
C
C
OUT2
OUT1
D1
MAX1720
D2
N
L1
N
L2
PGND
AGND
RGND
0Ω
OUT1
BYP
OUT2
5V SMPS OUTPUT (OUT1)
D
X1
R6
100kΩ
C5
10nF
R7
100kΩ
MAX17020
C6
0.1μF
PGOOD1
POWER-GOOD
}
PGOOD2
C7
10nF
RTC
RTC SUPPLY
12V TO 15V
CHARGE
PUMP
C3
1μF
C8
0.1μF
R4
500kΩ
D
X2
C4
0.1μF
SECFB
FB1
REF
SKIP
R5
100kΩ
LDOREFIN
V
DD
LDO
ON1
ON2
5V LDO OUTPUT
C1
4.7μF
ON
OFF
R1
47Ω
ONLDO
V
CC
POWER GROUND
ANALOG GROUND
C2
1.0μF
OUT1/OUT2 SWITCHING FREQUENCY
OPEN (REF): 400kHz/300kHz
TON
X
REFIN2
R
ILIM1
R
ILIM2
ILIM1
ILIM2
*LOWER INPUT VOLTAGES REQUIRE
ADDITIONAL INPUT CAPACITANCE. IF
PAD
OPERATING NEAR DROPOUT, COMPONENT
SELECTION MUST BE CAREFULLY DONE TO
ENSURE PROPER OPERATION.
Figure 1. Standard Application Circuit—Main Supply
16 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
IN
ONLDO
TON
5V LINEAR
REGULATOR
LDOREFIN
LDO
SKIP
3.3V LINEAR
REGULATOR
LDO BYPASS
CIRCUITRY
RTC
BYP
SECFB
ILIM2
OUT2
ILIM1
OUT1
V
DD
V
DD
BST2
DH2
LX2
PWM2
CONTROLLER
(FIGURE 3)
BST1
DH1
LX1
PWM1
CONTROLLER
(FIGURE 3)
V
DD
DL2
V
DD
DL1
PGND
FB SELECT
(PRESET vs. ADJ)
REFIN2
ON2
FB SELECT
(PRESET vs. ADJ)
FB1
UVLO
ON1
UVLO
PGOOD2
POWER-GOOD
AND FAULT
PROTECTION
PGOOD1
POWER-GOOD
AND FAULT
PROTECTION
V
CC
REF
2V
REF
GND
MAX17020
PAD
Figure 2. Functional Diagram Overview
______________________________________________________________________________________ 17
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
Table 1. Component Selection for Standard Applications
400kHz/300kHz
SMPS 1: 5V AT 5A
SMPS 2: 3.3V AT 8A
400kHz/500kHz
SMPS 1: 5V AT 3A
SMPS 2: 3.3V AT 5A
400kHz/300kHz
SMPS 1: 1.5V AT 8A
SMPS 2: 1.05V AT 5A
COMPONENT
Input Voltage
Input Capacitor
(C
V
= 7V to 24V
V
= 7V to 24V
V = 7V to 24V
IN
IN
IN
(4x) 10μF, 25V
(2x) 10μF, 25V
(4x) 10μF, 25V
)
Taiyo Yuden TMK432BJ106KM Taiyo Yuden TMK432BJ106KM Taiyo Yuden TMK432BJ106KM
IN
SMPS 1
Output Capacitor
330μF, 6V, 18mΩ
330μF, 6V, 18mΩ
(2x) 330μF, 2V, 7mΩ
MAX1720
(C
)
SANYO 6TPE330MIL
SANYO 6TPE330MIL
SANYO 2TPF330M7
OUT1
Inductor
(L1)
4.3μH, 11.4mΩ, 11A
Sumida CEP125U
4.7μH, 9.8mΩ, 7A
Sumida CDRH10D68
1.5μH, 12A, 7mΩ
NEC/Tokin MPLC1040L1R5
Fairchild Semiconductor
FDS6612A
26mΩ/30mΩ, 30V
Fairchild Semiconductor
FDS8690
8.6mΩ/11.4mΩ, 30V
High-Side MOSFET
Vishay Siliconix
Si4814DY
Dual 30V MOSFET
High side: 19mΩ/23mΩ
Low side: 18mΩ/22mΩ
(N
)
H1
Fairchild Semiconductor
FDS6670S
9mΩ/11.5mΩ, 30V
Fairchild Semiconductor
FDMS8660S
2.6mΩ/3.5mΩ, 30V
Low-Side MOSFET
(N
)
L1
Current-Limit Resistor
(R
200kΩ
150kΩ
49.9kΩ
)
ILIM1
SMPS 2
Output Capacitor
470μF, 4V, 15mΩ
330μF, 6V, 18mΩ
330μF, 2V, 7mΩ
(C
)
SANYO 4TPE470MFL
SANYO 6TPE330MIL
SANYO 2TPF330M7
OUT2
Inductor
(L2)
4.3μH, 11.4mΩ, 11A
Sumida CEP125U
4.7μH, 9.8mΩ, 7A
Sumida CDRH10D68
1.5μH, 12A, 7mΩ
NEC/Tokin MPLC1040L1R5
Fairchild Semiconductor
FDS8690
8.6mΩ/11.4mΩ, 30V
Fairchild Semiconductor
FDS8690
8.6mΩ/11.4mΩ, 30V
High-Side MOSFET
Vishay Siliconix
Si4814DY
Dual 30V MOSFET
High side: 19mΩ/23mΩ
Low side: 18mΩ/22mΩ
(N
)
H2
Fairchild Semiconductor
FDMS8660S
2.6mΩ/3.5mΩ, 30V
Fairchild Semiconductor
FDMS8660S
2.6mΩ/3.5mΩ, 30V
Low-Side MOSFET
(N
)
L2
Current-Limit Resistor
(R
200kΩ
200kΩ
49.9kΩ
)
ILIM2
Table 2. Component Suppliers
SUPPLIER
AVX Corp.
Central Semiconductor Corp. www.centralsemi.com
WEBSITE
SUPPLIER
WEBSITE
www.avxcorp.com
Renesas Technology Corp. www.renesas.com
SANYO Electric Co., Ltd.
Sumida Corp.
www.sanyodevice.com
www.sumida.com
Fairchild Semiconductor
International Rectifier
KEMET Corp
www.fairchildsemi.com
www.irf.com
Taiyo Yuden
www.t-yuden.com
www.kemet.com
TDK Corp.
www.component.tdk.com
www.tokoam.com
NEC/Tokin America, Inc.
Panasonic Corp.
www.nec-tokinamerica.com
www.panasonic.com
TOKO America, Inc.
Vishay (Dale, Siliconix)
www.vishay.com
Philips/nxp Semiconductor www.semiconductors.philips.com
Pulse Engineering www.pulseeng.com
Würth Elektronik GmbH &
Co. KG
www.we-online.com
18 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Adjustable 100mA Linear Regulator
The MAX17020 includes a high-current (100mA) linear
Detailed Description
The MAX17020 step-down controller is ideal for high-
regulator that can be configured for preset 5V or 3.3V
operation or adjusted between 0.6V to 4V. When the
MAX17020 is configured as a main supply, this LDO is
required to generate the 5V bias supply necessary to
power up the switching regulators. Once the switching
regulators are enabled, the LDO can be bypassed
using the dedicated BYP input. The adjustable linear
regulator allows generation of the 3.3V suspend supply
or buffered low-power chipset and GPU reference sup-
plies. The MAX17020 LDO sources at least 100mA of
supply current.
voltage, low-power supplies for notebook computers.
Maxim’s Quick-PWM pulse-width modulator in the
MAX17020 is specifically designed for handling fast
load steps while maintaining a relatively constant oper-
ating frequency and inductor operating point over a
wide range of input voltages. The Quick-PWM architec-
ture circumvents the poor load-transient timing prob-
lems of fixed-frequency current-mode PWMs, while also
avoiding the problems caused by widely varying
switching frequencies in conventional constant-on-time
and constant-off-time PWM schemes. Figure 2 is a
functional diagram overview. Figure 3 is the functional
diagram—Quick-PWM core.
Bypass Switch
The MAX17020 includes an independent LDO bypass
input that allows the LDO to be bypassed by either
switching regulator output or from a different regulator all
together. When the bypass voltage (BYP) exceeds 93.5%
of the LDO output voltage for 500μs, the MAX17020
reduces the LDO regulation threshold and turns on an
internal p-channel MOSFET to short BYP to LDO. Instead
of disabling the LDO when the MAX17020 enables the
bypass switch, the controller reduces the LDO regulation
voltage, which effectively places the linear regulator in a
standby state while switched over, yet allows a fast
recovery if the bypass supply drops.
The MAX17020 includes several features for multipur-
pose notebook functionality, allowing this controller to
be used two or three times in a single notebook—main,
I/O chipset, and graphics. The MAX17020 includes a
100mA LDO that can be configured for preset 5V oper-
ation—ideal for initial power-up of the notebook and
main supply—or can be adjusted for lower voltage
operation—ideal for low-power I/O or graphics supply
requirements. Additionally, the MAX17020 includes a
3.3V, 5mA RTC supply that remains always enabled,
which can be used to power the RTC supply and sys-
tem pullups when the notebook shuts down. The
MAX17020 also includes an optional secondary feed-
back input that allows an unregulated charge pump or
secondary winding to be included on a supply—ideal
for generating the low-power 12V to 15V load switch
supply. Finally, the MAX17020 includes a reference
input on SMPS 2 that allows dynamic voltage transitions
when driven by an adjustable resistive voltage-divider or
DAC—ideal for the dynamic graphics core requirements.
Connect BYP to GND when not used to avoid uninten-
tional conduction through the body diode (BYP to LDO)
of the p-channel MOSFET.
5V Bias Supply (V /V
)
CC DD
The MAX17020 requires an external 5V bias supply
(V and V ) in addition to the battery. Typically, this
DD
CC
5V bias supply is generated by either the internal
100mA LDO (when configured for a main supply) or
from the notebook’s 95%-efficient 5V main supply (when
configured for an I/O chipset, DDR, or graphics).
Keeping these bias supply inputs independent
improves the overall efficiency and allows the internal
linear regulator to be used for other applications as well.
3.3V RTC Power
The MAX17020 includes a low-current (5mA) linear reg-
ulator that remains active as long as the input supply
(IN) exceeds 2V (typ). The main purpose of this
“always-enabled” linear regulator is to power the real-
time clock (RTC) when all other notebook regulators are
disabled. RTC also serves as the main bias supply of
the MAX17020 so it powers up before the LDO and
switching regulators. The RTC regulator sources at
least 5mA for external loads.
The V
bias supply input powers the internal gate dri-
DD
vers and the V
bias supply input powers the analog
CC
control blocks. The maximum current required is domi-
nated by the switching losses of the drivers and can be
estimated as follows:
I
= I
+ f Q ≈ 30mA to 60mA (typ)
SW G
BIAS(MAX)
CC(MAX)
______________________________________________________________________________________ 19
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
where K (switching period) is set by the tri-level TON
Free-Running Constant-On-Time PWM
Controller with Input Feed-Forward
input (see the Pin Description section). High-frequency
(400kHz/500kHz) operation optimizes the application
for the smallest component size, trading off efficiency
due to higher switching losses. This might be accept-
able in ultra-portable devices where the load currents
are lower and the controller is powered from a lower
voltage supply. Low-frequency (200kHz/300kHz) oper-
ation offers the best overall efficiency at the expense of
component size and board space.
The Quick-PWM control architecture is a pseudo-fixed-
frequency, constant on-time, current-mode regulator
with voltage feed-forward. This architecture relies on
the output filter capacitor’s ESR to act as a current-
sense resistor, so the feedback ripple voltage provides
the PWM ramp signal. The control algorithm is simple:
the high-side switch on-time is determined solely by a
one-shot whose pulse width is inversely proportional to
input voltage and directly proportional to output volt-
age. Another one-shot sets a minimum off-time (400ns
typ). The on-time one-shot is triggered if the error com-
parator is low, the low-side switch current is below the
valley current-limit threshold, and the minimum off-time
one-shot has timed out.
MAX1720
For continuous conduction operation, the actual switching
frequency can be estimated by:
V
+ V
DROP1
OUT
f
=
SW
t
(V + V
− V
)
ON IN
DROP1
DROP2
where V
is the sum of the parasitic voltage drops
DROP1
On-Time One-Shot
The heart of the PWM core is the one-shot that sets the
high-side switch on-time. This fast, low-jitter, adjustable
one-shot includes circuitry that varies the on-time in
response to battery and output voltage. The high-side
switch on-time is inversely proportional to the battery
voltage as sensed by the IN input, and proportional to
the output voltage:
in the inductor discharge path, including synchronous
rectifier, inductor, and PCB resistances; V is the
DROP2
sum of the voltage drops in the charging path, includ-
ing the high-side switch, inductor, and PCB resis-
tances; and t
MAX17020.
is the on-time calculated by the
ON
On-Time = K (V
/V )
OUT IN
Table 3. Approximate K-Factor Errors
SWITCHING
REGULATOR
TON SETTING
(kHz)
TYPICAL K-FACTOR
(µs)
K-FACTOR ERROR
(%)
COMMENTS
200kHz
5.0
2.5
3.3
2.0
10
12.5
10
Use for absolute best efficiency.
TON = V
CC
SMPS 1
SMPS 2
400kHz
TON = REF or GND
Useful in 3-cell systems for lighter loads
than the CPU core or where size is key.
300kHz
TON = REF or V
Considered mainstream by current
standards.
CC
500kHz
TON = GND
Good operating point for compound buck
designs or desktop circuits.
12.5
20 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
INTEGRATOR
REF
GND
FB
INT PRESET
OR EXT ADJ
ANALOG
SOFT-
START/STOP
REFIN
ON
SLOPE COMP
AGND
t
OFF(MIN)
TRIG
Q
ONE-SHOT
S
Q
DH DRIVER
AGND
LX
R*
* RESET DOMINATE
NEG CURRENT
LIMIT
t
ON
TRIG
Q
VCC
ONE-SHOT
VALLEY
CURRENT LIMIT
ILIM
ON-TIME
COMPUTE
TON
IN
ZERO
CROSSING
ULTRASONIC
TRIG
Q
ONE-SHOT
GND
ULTRASONIC
THRESHOLD
FB
REFIN
GND
S
Q
R
DL DRIVER
SKIP
THREE-LEVEL
DECODE
Figure 3. Functional Diagram—Quick-PWM Core
______________________________________________________________________________________ 21
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
DL high, turning on the low-side MOSFET to induce a
Modes of Operation
Forced-PWM Mode (SKIP = V
negative inductor current. After the inductor current
reaches the negative ultrasonic current threshold, the
controller turns off the low-side MOFET (DL pulled low)
and triggers a constant on-time (DH driven high). When
the on-time has expired, the controller reenables the
low-side MOSFET until the inductor current drops below
the zero-crossing threshold. Starting with a DL pulse
greatly reduces the peak output voltage when com-
pared to starting with a DH pulse.
)
CC
The low-noise forced-PWM mode (SKIP = V ) dis-
CC
ables the zero-crossing comparator, which controls the
low-side switch on-time. This forces the low-side gate-
drive waveform to constantly be the complement of the
high-side gate-drive waveform, so the inductor current
reverses at light loads while DH maintains a duty factor
of V
/V . The benefit of forced-PWM mode is to
OUT IN
keep the switching frequency fairly constant. However,
forced-PWM operation comes at a cost: the no-load 5V
bias current remains between 20mA to 60mA depend-
ing on the switching frequency and MOSFET selection.
MAX1720
The output voltage at the beginning of the ultrasonic
pulse determines the negative ultrasonic current thresh-
old, resulting in the following equation:
V
= I R = (V
- V ) x 0.385V
The MAX17020 automatically uses forced-PWM opera-
tion during all transitions—dynamic REFIN, startup, and
shutdown—regardless of the SKIP configuration.
NEG(US)
L CS
NOM FB
where V
age, and V
), and R
across LX to AGND.
is the nominal feedback-regulation volt-
NOM
is the actual feedback voltage (V
>
FB
FB
V
is the current-sense resistance seen
CS
NOM
Automatic Pulse-Skipping Mode (SKIP = GND)
In skip mode (SKIP = GND), an inherent automatic
switchover to PFM takes place at light loads. This
switchover is affected by a comparator that truncates
the low-side switch on-time at the inductor current’s
zero crossing. The zero-crossing comparator threshold
is set by the differential across LX and AGND.
37μs (typ)
INDUCTOR
CURRENT
DC output-accuracy specifications refer to the integrat-
ed threshold of the error comparator. When the inductor
is in continuous conduction, the MAX17020 regulates
the valley of the output ripple and the internal integrator
removes the actual DC output-voltage error caused by
the output-ripple voltage and internal slope compensa-
tion. In discontinuous conduction (SKIP = GND and
ZERO-CROSSING
DETECTION
I
< I
), the integrator cannot correct for
LOAD(SKIP)
OUT
0
the low-frequency output ripple error, so the output volt-
age has a DC regulation level higher than the error
comparator threshold by approximately 1.5% due to
slope compensation and output ripple voltage.
I
SONIC
ON-TIME (t
)
ON
Ultrasonic Mode (SKIP = Open or REF)
Leaving SKIP unconnected or connecting SKIP to REF
(2V) activates a unique pulse-skipping mode with a
guaranteed minimum switching frequency of 20kHz.
This ultrasonic pulse-skipping mode eliminates audio-
frequency modulation that would otherwise be present
when a lightly loaded controller automatically skips
pulses. In ultrasonic mode, the controller automatically
transitions to fixed-frequency PWM operation when the
load reaches the same critical conduction point
Figure 4. Ultrasonic Waveforms
Secondary Feedback: SECFB—OUT1 ONLY
When the controller skips pulses (SKIP = GND or REF),
the long time between pulses (especially if the output is
sinking current) allows the external charge-pump voltage
or transformer secondary winding voltage to drop. When
the SECFB voltage drops below its 2V feedback thresh-
old, the MAX17020 issues an ultrasonic pulse (regardless
of the ultrasonic one-shot state). This forces a switching
cycle, allowing the external unregulated charge pump (or
transformer secondary winding) to be refreshed. See the
Ultrasonic Mode (SKIP = Open or REF) section for
switching cycle sequence/specifications.
(I
) that occurs when normally pulse skipping.
LOAD(SKIP)
An ultrasonic pulse occurs (Figure 4) when the con-
troller detects that no switching has occurred within the
last 37μs or when SECFB drops below its feedback
threshold. Once triggered, the ultrasonic circuitry pulls
22 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Dynamic Output Voltage—OUT2 Only
Valley Current-Limit Protection
The current-limit circuit employs a unique “valley” cur-
rent-sensing algorithm that senses the inductor current
through the low-side MOSFET—across LX to AGND. If
the current through the low-side MOSFET exceeds the
valley current-limit threshold, the PWM controller is not
allowed to initiate a new cycle. The actual peak current
is greater than the valley current-limit threshold by an
amount equal to the inductor ripple current. Therefore,
the exact current-limit characteristic and maximum load
capability are a function of the inductor value and bat-
tery voltage. When combined with the undervoltage
protection circuit, this current-limit method is effective in
almost every circumstance.
The MAX17020 regulates OUT2 to the voltage set at
REFIN2, so the MAX17020 supports applications that
require dynamic output-voltage changes between two
set points by adjusting the REFIN2 voltage. For a step-
voltage change at REFIN2, the rate of change of the
output voltage is limited either by the internal slew-rate
circuit, by the REFIN2 slew rate, or by the component
selection—inductor current ramp, the total output
capacitance, the current limit, and the load during the
transition—whichever is the slowest. The total output
capacitance determines how much current is needed to
change the output voltage, while the inductor limits the
current ramp rate. Additional load current slows down
the output voltage change during a positive REFIN2
voltage change, and speeds up the output voltage
change during a negative REFIN2 voltage change.
Figure 5 is the dynamic REFIN transition.
In forced-PWM mode, the MAX17020 also implements
a negative current limit to prevent excessive reverse
inductor currents when V
is sinking current. The
OUT
negative current-limit threshold is set to approximately
120% of the positive current limit.
Automatic Fault Blanking
When the MAX17020 automatically detects that the
internal target and REFIN2 are more than 25mV (typ)
apart, the controller automatically blanks PGOOD2,
blanks the UVP protection, and sets the OVP threshold
to REF + 200mV. The blanking remains until 1) the inter-
nal target and REFIN2 are within 20mV of each other
and 2) an edge is detected on the error amplifier signi-
fying that the output is in regulation. This prevents the
system or internal fault protection from shutting down
the controller during transitions.
POR, UVLO
rises above the power-on reset (POR) thresh-
When V
CC
old, the MAX17020 clears the fault latches, forces the
low-side MOSFET to turn on (DL high), and resets the
soft-start circuit, preparing the controller for power-up.
However, the V
undervoltage lockout (UVLO) circuitry
CC
inhibits switching until V
reaches 4.2V (typ). When
CC
V
rises above 4.2V and the controller has been
CC
enabled (ON_ pulled high), the controller activates the
enabled PWM controllers and initializes soft-start.
DYNAMIC REFIN WINDOW
REFIN
20mV
20mV WINDOW BETWEEN
INTERNAL TARGET AND REFIN2
OUTPUT
VOLTAGE
INTERNAL EA TARGET = ACTUAL V
OUT
20mV
LX
PGOOD
OVP
BLANK HIGH-Z
REF + 140mV
BLANK HIGH-Z
EA TARGET + 140mV
EA TARGET + 140mV
Figure 5. Dynamic REFIN Transition
______________________________________________________________________________________ 23
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
When V
drops below the UVLO threshold (falling
the output voltage regulates slightly higher than it would
in PWM operation.
CC
edge), the controller stops switching, and DH and DL are
pulled low and a 10Ω switch discharges the outputs.
When the 2V POR falling-edge threshold is reached, the
DL state no longer matters since there is not enough volt-
age to force the switching MOSFETs into a low on-resis-
tance state, so the controller pulls DL high, allowing a
soft discharge of the output capacitors (damped
Internal Integrator
The internal integrator improves the output accuracy by
removing any output accuracy errors caused by the
slope compensation, output ripple voltage, and error-
amplifier offset. Therefore, the DC accuracy (in forced-
PWM mode) depends on the integrator’s gain, the inte-
grator’s offset, and the accuracy of the integrator’s refe-
rence input.
response). However, if the V
recovers before reaching
CC
the falling POR threshold, DL remains low until the error
comparator has been properly powered up and triggers
an on-time. Only one enable input needs to be toggled
to clear the fault latches and activate both outputs.
MAX1720
Adjustable/Fixed Output Voltages
Connect FB1 to GND for fixed 5V operation. Connect
FB1 to V
for fixed 1.5V operation. Connect FB1 to an
CC
Soft-Start and Soft-Shutdown
The MAX17020 includes voltage soft-start and soft-
shutdown—slowly ramping up and down the target volt-
age. During startup, the slew-rate control softly slews
the preset/fixed target voltage over a 1ms startup peri-
od or its tracking voltage (REFIN2 < 2V) with a 1mV/μs
slew rate. This long startup period reduces the inrush
current during startup.
external resistive voltage-divider from OUT1 to analog
ground to adjust the output voltage between 0.7V and
5.5V. During soft-shutdown, application circuits config-
ured for adjustable feedback briefly switch modes when
FB1 drops below the 110mV dual-mode threshold.
Choose R
(resistance from FB1 to AGND) to be
FBL
approximately 49.9kΩ and solve for R
(resistance
FBH
from OUT1 to FB1) using the following equation:
When ON1 or ON2 is pulled low or the output undervolt-
age fault latch is set, the respective output automatically
enters soft-shutdown—the regulator enters PWM mode
and ramps down its preset/fixed output voltage over a
1ms period or its tracking voltage (REFIN2 < 2V) with a
1mV/μs slew rate. After the output voltage drops below
0.1V, the MAX17020 pulls DL high, clamping the output
and LX switching node to ground, preventing leakage
currents from pulling up the output and minimizing the
negative output voltage undershoot during shutdown.
V
0.7V
⎛
⎞
⎠
OUT1
R
= R
×
−1
⎟
FBH
FBL
⎜
⎝
Connect REFIN2 to V
for fixed 3.3V operation.
CC
Connect REFIN2 to RTC (3.3V) for fixed 1.05V operation.
Connect REFIN2 to an external resistive voltage-divider
from REF to analog ground to adjust the output voltage
between 0V and 2V.
Choose R
(resistance from REFIN2 to GND) to
REFINL
be approximately 49.9kΩ and solve for R
(resis-
REFINH
Output Voltage
DC output-accuracy specifications in the Electrical
Characteristics table refer to the error comparator’s
threshold. When the inductor continuously conducts, the
MAX17020 regulates the valley of the output ripple, so
the actual DC output voltage is lower than the slope-com-
pensated trip level by 50% of the output ripple voltage.
For PWM operation (continuous conduction), the output
voltage is accurately defined by the following equation:
tance from REF to REFIN2) using the equation:
⎛
⎞
V
REF
R
= R
×
−1
REFINH
⎜
⎟
REFINL
V
⎝
⎠
OUT2
Power-Good Outputs (PGOOD)
and Fault Protection
PGOOD is the open-drain output that continuously
monitors the output voltage for undervoltage and over-
voltage conditions. PGOOD_ is actively held low in shut-
down (ON_ = GND), during soft-start or soft-shutdown.
Approximately 20μs (typ) after the soft-start
terminates, PGOOD_ becomes high impedance as long
as the feedback voltage exceeds 85% of the nominal
fixed-regulation voltage or within 150mV of the REFIN2
input voltage. PGOOD_ goes low if the feedback volt-
age drops 16% below the fixed target voltage, or if the
output voltage drops 150mV below the dynamic REFIN2
voltage, or if the SMPS controller is shut down. For a
⎛ V
⎞
RIPPLE
V
= V
+
NOM
⎜
OUT(PWM)
⎟
⎠
⎝
2A
CCV
where V
is the nominal feedback voltage, A
is
NOM
CCV
the integrator’s gain, and V
is the output ripple
RIPPLE
voltage (V
= ESR x ΔI
, as described in
RIPPLE
INDUCTOR
the Output Capacitor Selection section).
In discontinuous conduction (I < I
longer off-times allow the slope compensation to
increase the threshold voltage by as much as 1%, so
), the
LOAD(SKIP)
OUT
24 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
logic-level PGOOD_ output voltage, connect an external
design trade-off lies in choosing a good switching fre-
quency and inductor operating point, and the following
four factors dictate the rest of the design:
pullup resistor between PGOOD_ and V . A 100kΩ
DD
pullup resistor works well in most applications.
•
Input Voltage Range: The maximum value
(V ) must accommodate the worst-case, high
Overvoltage Protection (OVP)
When the output voltage rises 16% above the fixed-reg-
ulation voltage or has risen 200mV above the dynamic
REFIN2 input voltage, the controller immediately pulls
the respective PGOOD_ low, sets the overvoltage fault
latch, and immediately pulls the respective DL_ high—
clamping the output to GND. Toggle either ON1 or ON2
IN(MAX)
AC-adapter voltage. The minimum value (V
)
IN(MIN)
must account for the lowest battery voltage after
drops due to connectors, fuses, and battery-selector
switches. If there is a choice at all, lower input volt-
ages result in better efficiency.
•
Maximum Load Current: There are two values to
input, or cycle V
power below its POR threshold to
CC
consider. The peak load current (I ) deter-
LOAD(MAX)
clear the fault latch and restart the controller.
mines the instantaneous component stresses and fil-
tering requirements and thus drives output capacitor
selection, inductor saturation rating, and the design of
the current-limit circuit. The continuous load current
Undervoltage Protection (UVP)
When the output voltage drops 30% below the fixed-
regulation voltage or has dropped 300mV below the
dynamic REFIN2 input voltage, the controller immedi-
ately pulls the respective PGOOD_ low, sets the under-
voltage fault latch, and begins the shutdown sequence.
After the output voltage drops below 0.1V, the synchro-
nous rectifier turns on, clamping the output to GND.
(I
) determines the thermal stresses and thus dri-
LOAD
ves the selection of input capacitors, MOSFETs, and
other critical heat-contributing components.
•
•
Switching Frequency: This choice determines the
basic trade-off between size and efficiency. The opti-
mal frequency is largely a function of maximum input
voltage due to MOSFET switching losses that are
Toggle either ON1 or ON2 input, or cycle V
power
CC
below its POR threshold to clear the fault latch and
restart the controller.
proportional to frequency and V 2. The optimum fre-
IN
quency is also a moving target due to rapid improve-
ments in MOSFET technology that are making higher
frequencies more practical.
Thermal-Fault Protection (TSHDN)
The MAX17020 features a thermal-fault protection circuit.
When the junction temperature rises above +160°C, a
thermal sensor activates the fault latch, pulls PGOOD1
and PGOOD2 low, enables the 10Ω discharge circuit,
and disables the controller—DH and DL are pulled low.
Toggle ONLDO or cycle IN power to reactivate the con-
troller after the junction temperature cools by 15°C.
Inductor Operating Point: This choice provides
trade-offs between size vs. efficiency and transient
response vs. output ripple. Low inductor values pro-
vide better transient response and smaller physical
size, but also result in lower efficiency and higher
output ripple due to increased ripple currents. The
minimum practical inductor value is one that causes
the circuit to operate at the edge of critical conduc-
tion (where the inductor current just touches zero
with every cycle at maximum load). Inductor values
Design Procedure
Firmly establish the input-voltage range and maximum
load current before choosing a switching frequency and
inductor operating point (ripple-current ratio). The primary
Table 4. Fault Protection and Shutdown Operation Table
MODE
CONTROLLER STATE
DRIVER STATE
Voltage soft-shutdown initiated. Internal error-amplifier target
slowly ramped down to GND and output actively discharged
(automatically enters forced-PWM mode).
DL driven high and DH pulled
low after soft-shutdown
completed (output < 0.1V).
Shutdown (ON_ = High to Low);
Output UVP (Latched)
Controller shuts down and EA target internally slewed down.
Controller remains off until ON_ toggled or V power cycled. DH pulled low.
CC
DL immediately driven high,
Output OVP (Latched)
V
UVLO Falling-Edge
SMPS controller disabled (assuming ON_ pulled high), 10ꢀ
output discharge active.
CC
DL and DH pulled low.
Thermal Fault (Latched)
V
V
UVLO Rising Edge
POR
SMPS controller enabled (assuming ON_ pulled high).
SMPS inactive, 10ꢀ output discharge active.
DL driven high, DH pulled low.
DL driven high, DH pulled low.
CC
CC
______________________________________________________________________________________ 25
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
lower than this grant no further size-reduction bene-
fit. The optimum operating point is usually found
between 20% and 50% ripple current. When pulse
skipping (SKIP low and light loads), the inductor
value also determines the load-current value at
which PFM/PWM switchover occurs.
where t
is the minimum off-time (see the
OFF(MIN)
Electrical Characteristics table) and K is from Table 3.
The amount of overshoot during a full-load to no-load tran-
sient due to stored inductor energy can be calculated as:
2
ΔI
× L
(
)
LOAD(MAX)
V
≈
SOAR
Inductor Selection
The switching frequency and inductor operating point
determine the inductor value as follows:
2 × C
× V
OUT
OUT
Setting the Current Limit
The minimum current-limit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I
half the ripple current; therefore:
MAX1720
V
× (V − V
OUT
)
RIPPLE
IN
L =
V
× f ×I
× LIR
IN SW LOAD(MAX)
minus
LOAD(MAX)
For example: I
= 4A, V = 12V, V
=
OUT2
LOAD(MAX)
= 355kHz, 30% ripple current or LIR = 0.3:
IN
2.5V, f
SW
I
× LIR
⎛
⎞
LOAD(MAX)
2.5V × (12V − 2.5V)
12V × 355kHz × 4A × 0.3
I
> I
−
LIM(VAL) LOAD(MAX)
L =
= 4.65μH
⎜
⎟
2
⎝
⎠
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite
cores are often the best choice, although powdered
iron is inexpensive and can work well at 200kHz. The
core must be large enough not to saturate at the peak
where I
equals the minimum valley current-limit
LIM(VAL)
threshold voltage divided by the current-sense resis-
tance (R
). When using a 100kΩ ILIM resistor, the
SENSE
minimum valley current-limit threshold is 40mV.
Connect a resistor between ILIM_ and analog ground
(AGND) to set the adjustable current-limit threshold. The
valley current-limit threshold is approximately 1/10 the
ILIM voltage formed by the external resistance and inter-
nal 5μA current source. The 40kΩ to 400kΩ adjustment
range corresponds to a 20mV to 200mV valley current-
limit threshold. When adjusting the current limit, use 1%
tolerance resistors to prevent significant inaccuracy in
the valley current-limit tolerance.
inductor current (I
):
PEAK
LIR
2
⎛
⎝
⎞
I
= I
× 1+
⎜
⎟
⎠
PEAK LOAD(MAX)
Most inductor manufacturers provide inductors in stan-
dard values, such as 1.0μH, 1.5μH, 2.2μH, 3.3μH, etc.
Also look for nonstandard values, which can provide a
better compromise in LIR across the input voltage
range. If using a swinging inductor (where the no-load
inductance decreases linearly with increasing current),
evaluate the LIR with properly scaled inductance values.
Output Capacitor Selection
The output filter capacitor must have low enough equiv-
alent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements.
Transient Response
The inductor ripple current also impacts transient-
response performance, especially at low V - V
dif-
OUT
IN
For processor core voltage converters and other appli-
cations where the output is subject to violent load tran-
sients, the output capacitor’s size depends on how
much ESR is needed to prevent the output from dipping
too low under a load transient. Ignoring the sag due to
finite capacitance:
ferentials. Low inductor values allow the inductor
current to slew faster, replenishing charge removed
from the output filter capacitors by a sudden load step.
The amount of output sag is also a function of the maxi-
mum duty factor, which can be calculated from the on-
time and minimum off-time:
V
STEP
R
ESR
≤
⎡
⎢
⎣
− V
⎤
⎥
⎦
2
⎛
⎞
V
K
ΔI
OUT
LOAD(MAX)
L × ΔI
×
+ t
OFF(MIN)
(
)
(
LOAD(MAX)
⎜
⎝
⎟
⎠
V
IN
In applications without large and fast load transients,
the output capacitor’s size often depends on how much
ESR is needed to maintain an acceptable level of out-
put voltage ripple. The output ripple voltage of a step-
down controller equals the total inductor ripple current
V
=
SAG
⎡
⎢
⎤
⎥
⎛
⎞
V
× K
)
IN
OUT
2 × C
× V
− t
OUT
OUT
OFF(MIN)
⎜
⎟
V
⎝
⎠
⎢
⎣
⎥
⎦
IN
26 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
multiplied by the output capacitor’s ESR. Therefore, the
maximum ESR required to meet ripple specifications is:
inches downstream from the feedback sense point,
which should be as close as possible to the inductor.
Unstable operation manifests itself in two related, but
distinctly different ways: double-pulsing and fast-feed-
back loop instability. Double-pulsing occurs due to
noise on the output or because the ESR is so low that
there is not enough voltage ramp in the output voltage
signal. This “fools” the error comparator into triggering
a new cycle immediately after the 400ns minimum off-
time period has expired. Double-pulsing is more annoy-
ing than harmful, resulting in nothing worse than
increased output ripple. However, it can indicate the
possible presence of loop instability due to insufficient
ESR. Loop instability results in oscillations at the output
after line or load steps. Such perturbations are usually
damped, but can cause the output voltage to rise
above or fall below the tolerance limits.
V
RIPPLE
R
≤
ESR
I
× LIR
LOAD(MAX)
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, polymers, and other electrolytics).
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V
and V
from
OAR
S
S
AG
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
is no longer a problem (see the V
and V
equa-
OAR
S
AG
S
tions in the Transient Response section). However, low-
capacity filter capacitors typically have high ESR zeros
that could affect the overall stability (see the Output
Capacitor Stability Considerations section).
Output Capacitor Stability Considerations
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
Input Capacitor Selection
The input capacitor must meet the ripple current
requirement (I
) imposed by the switching currents:
RMS
⎛
⎞
V
(V − V
)
OUT IN
OUT
I
= I
×
⎜
⎟
RMS LOAD
f
SW
V
⎝
⎠
IN
f
≤
ESR
π
For most applications, nontantalum chemistries (ceramic,
aluminum, or OS-CON) are preferred due to their resis-
tance to power-up surge currents typical of systems
with a mechanical switch or connector in series with the
input. If the MAX17020 is operated as the second stage
of a two-stage power conversion system, tantalum input
capacitors are acceptable. In either configuration,
choose a capacitor that has less than 10°C temperature
rise at the RMS input current for optimal reliability and
lifetime.
where:
1
f
=
ESR
2π × R
× C
OUT
ESR
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use at
the time of publication have typical ESR zero frequen-
cies of 25kHz. In the design example used for inductor
selection, the ESR needed to support 25mV
ripple is
Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability when
using high-voltage (> 20V) AC adapters. Low-current
applications usually require less attention.
P-P
25mV/1.2A = 20.8mΩ. One 220μF/4V SANYO polymer
(TPE) capacitor provides 15mΩ (max) ESR. This results
in a zero at 48kHz, well within the bounds of stability.
Do not put high-value ceramic capacitors directly
across the feedback sense point without taking precau-
tions to ensure stability. Large ceramic capacitors can
have a high ESR zero frequency and cause erratic,
unstable operation. However, it is easy to add enough
series resistance by placing the capacitors a couple of
The high-side MOSFET (N ) must be able to dissipate
H
the resistive losses plus the switching losses at both
V
and V
. Ideally, the losses at V
IN(MAX) IN(MIN)
IN(MIN)
should be roughly equal to the losses at V
, with
IN(MAX)
lower losses in between. If the losses at V
are
IN(MIN)
______________________________________________________________________________________ 27
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
significantly higher, consider increasing the size of N .
where C
is the high-side MOSFET’s output capaci-
OSS
H
Conversely, if the losses at V
are significantly
tance, Q is the charge needed to turn on the high-
G(SW)
IN(MAX)
higher, consider reducing the size of N . If V does
side MOSFET, and I
source/sink current (1A typ).
is the peak gate-drive
GATE
H
IN
not vary over a wide range, maximum efficiency is
achieved by selecting a high-side MOSFET (N ) that
H
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied due to the squared term in the switching-
loss equation provided above. If the high-side MOSFET
has conduction losses equal to the switching losses.
Choose a low-side MOSFET (N ) that has the lowest
L
possible on-resistance (R
), comes in a moder-
DS(ON)
ate-sized package (i.e., 8-pin SO, DPAK, or D2PAK),
and is reasonably priced. Ensure that the MAX17020
DL_ gate driver can supply sufficient current to support
the gate charge and the current injected into the para-
sitic drain-to-gate capacitor caused by the high-side
MOSFET turning on; otherwise, cross-conduction prob-
lems might occur. Switching losses are not an issue for
the low-side MOSFET since it is a zero-voltage
switched device when used in the step-down topology.
chosen for adequate R
at low battery voltages
DS(ON)
becomes extraordinarily hot when subjected to
, consider choosing another MOSFET with
MAX1720
V
IN(MAX)
lower parasitic capacitance.
For the low-side MOSFET (N ), the worst-case power
L
dissipation always occurs at maximum battery voltage:
⎡
⎤
⎛
⎞
V
2
OUT
PD(N Resistive) = ⎢1−
⎥ I
× R
DS(ON)
(
)
⎜
⎟
L
LOAD
V
⎢
⎣
⎥
⎝
⎠
IN(MAX)
⎦
Power-MOSFET Dissipation
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N ), the worst-
H
, but are not high enough to
LOAD(MAX)
case power dissipation due to resistance occurs at
minimum input voltage:
⎛
⎝
⎞
⎠
V
V
2
OUT
PD (N Resistive) =
× I
(
× R
DS(ON)
)
H
LOAD
⎜
⎟
I
× LIR
IN
⎛
⎞
LOAD(MAX)
I
≈ I
+
LOAD VALLEY(MAX)
⎜
⎟
2
⎝
⎠
Generally, use a small, high-side MOSFET to reduce
switching losses at high input voltages. However, the
where I
is the maximum valley current
VALLEY(MAX)
R
required to stay within package power-dissi-
DS(ON)
allowed by the current-limit circuit, including threshold
tolerance and sense-resistance variation. The
MOSFETs must have a relatively large heatsink to han-
dle the overload power dissipation.
pation often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction (R
) losses. High-side switching loss-
DS(ON)
es do not become an issue until the input is greater
than approximately 15V.
Choose a Schottky diode (D ) with a forward voltage
L
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3 the load current. This diode is optional and
can be removed if efficiency is not critical.
Calculating the power dissipation in high-side
MOSFETs (N ) due to switching losses is difficult, since
H
it must allow for difficult-to-quantify factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PCB layout
characteristics. The following switching loss calculation
provides only a very rough estimate and is no substitute
for breadboard evaluation, preferably including verifica-
Applications Information
Step-Down Converter Dropout
Performance
tion using a thermocouple mounted on N :
H
The output-voltage adjustable range for continuous-
conduction operation is restricted by the nonadjustable
minimum off-time one-shot. For best dropout perfor-
mance, use the slower (200kHz) on-time setting. When
working with low input voltages, the duty-factor limit
must be calculated using worst-case values for on- and
off-times. Manufacturing tolerances and internal propa-
gation delays introduce an error to the TON K-factor.
This error is greater at higher frequencies (Table 3).
V
×I
× f × Q
⎛
⎞
(MAX) LOAD SW G(SW)
PD(N Switching) =
+
H
⎜
⎟
I
⎝
⎠
GATE
2
⎛
⎜
⎝
⎞
⎟
⎠
V
× C
× f
IN
OSS SW
2
28 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Also, keep in mind that transient response performance
Dropout Design Example:
= 2.5V
of buck regulators operated too close to dropout is poor,
and bulk output capacitance must often be added (see
V
OUT2
f
= 355kHz
SW
the V
equation in the Transient Response section).
S
AG
K = 3.0μs, worst-case K
= 3.3μs
MIN
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time (ΔI
)
t
= 500ns
DOWN
OFF(MIN)
as much as it ramps up during the on-time (ΔI ). The
UP
V
CHG
= 100mV
ratio h = ΔI /ΔI
indicates the controller’s ability
UP DOWN
h = 1.5:
to slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current cannot increase as much during
2.5V + 0.1V
V
) =
= 3.47V
IN(MIN
⎛
⎞
1.5 × 500ns
1−
⎜
⎝
⎟
⎠
each switching cycle, and V
greatly increases
3.0μs
S
AG
unless additional output capacitance is used.
Calculating again with h = 1 and the typical K-factor
value (K = 3.3μs) gives the absolute limit of dropout:
A reasonable minimum value for h is 1.5, but adjusting
this up or down allows trade-offs between V
, output
S
AG
capacitance, and minimum operating voltage. For a
given value of h, the minimum operating voltage can be
calculated as:
2.5V + 0.1V
V
) =
= 3.06V
IN(MIN
⎛
⎞
1× 500ns
3.3μs
1−
⎜
⎝
⎟
⎠
V
+ V
CHG
OUT
h× t
V
) =
IN(MIN
Therefore, V must be greater than 3.06V, even with
IN
very large output capacitance, and a practical input volt-
age with reasonable output capacitance would be 3.47V.
⎛
⎞
OFF(MIN)
K
1−
⎜
⎝
⎟
⎠
where V
is the parasitic voltage drop in the charge
CHG
Dynamic Output Voltage Settings
(OUT2 Only)
The second output (OUT2) of the MAX17020 works with
applications that require multiple dynamic output volt-
ages, easily supporting two to four output voltages with
external resistors selected by control FETs or REFIN2
can be driven by a DAC for tight voltage control.
path (see the On-Time One-Shot section), t
is
OFF(MIN)
from the Electrical Characteristics table, and K (1/f
is taken from Table 3. The absolute minimum input volt-
age is calculated with h = 1.
)
SW
If the calculated V
minimum input voltage, operating frequency must be
reduced or output capacitance added to obtain an
acceptable V
pated, calculate V
response.
is greater than the required
IN(MIN)
Figure 6 shows an application circuit providing four volt-
age levels using discrete components. Switching resis-
tors in and out of the resistor network changes the
voltage at REFIN2. The reference input automatically
detects large input voltage transitions and blanks the
fault and PGOOD2 comparators, allowing the system to
perform the transition without tripping the fault protection.
. If operation near dropout is antici-
SAG
S
AG
to be sure of adequate transient
______________________________________________________________________________________ 29
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
INPUT (V )*
IN
5V TO 24V
NOTE: PLACE C22 BETWEEN
IN AND PGND AS CLOSE AS
POSSIBLE TO THE MAX17020.
C22
0.1μF
C
IN
IN
N
H1
N
H2
DH1
DH2
BST1
BST2
C
BST1
C
BST2
L2
L1
0.1μF
0.1μF
0.8V/1.2V
GPU SUPPLY
1.2V OUTPUT
LX1
DL1
LX2
DL2
C
OUT1
C
OUT2
MAX1720
D2
D1
N
L2
N
L1
PGND
AGND
RGND
0Ω
OUT1
OUT2
R1
7.15kΩ
C4
0.1μF
MAX17020
FB1
BYP
REF
R2
10kΩ
R3
80.6kΩ
RTC
REFIN2
SKIP
1μF
R5
100kΩ
R4
118kΩ
SLEEP
LDO
C3
4.7μF
2V
R8
150kΩ
R9
49.9kΩ
3.3 SYSTEM SUPPLY
LDOREFIN
R7
100kΩ
R6
100kΩ
5V SYSTEM SUPPLY
V
DD
PGOOD1
PGOOD2
C1
1.0μF
POWER-GOOD
}
SECFB
OUT1/OUT2 SWITCHING FREQUENCY
OPEN (REF): 400kHz/300kHz
R10
47Ω
TON
X
V
CC
ON1
ON2
ON
OFF
C2
1.0μF
ONLDO
R
ILIM1
R
ILIM2
ILIM1
ILIM2
POWER GROUND
ANALOG GROUND
PAD
Figure 6. Dynamic Output Application Circuit—Graphics Supply
30 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Layout Procedure
PCB Layout Guidelines
Careful PCB layout is critical to achieving low switching
losses and clean, stable operation. The switching
power stage requires particular attention. If possible,
mount all the power components on the top side of the
board, with their ground terminals flush against one
another. Follow these guidelines for good PCB layout:
1) Place the power components first, with ground ter-
minals adjacent (N source, C , C
, and D
OUT_ L_
L_
IN
anode). If possible, make all these connections on
the top layer with wide, copper-filled areas.
2) Mount the controller IC adjacent to the low-side
MOSFET, preferably on the back side opposite N
L_
and N to keep LX_, GND, DH_, and the DL_ gate-
•
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
H_
drive lines short and wide. The DL_ and DH_ gate
traces must be short and wide (50 mils to 100 mils
wide if the MOSFET is 1in from the controller IC) to
keep the driver impedance low and for proper
adaptive dead-time sensing.
•
Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PCBs (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing
PCB traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
3) Group the gate-drive components (BST_ capacitor,
V
DD
bypass capacitor) together near the controller IC.
4) Make the DC-DC controller ground connections as
shown in Figures 1 and 6. This diagram can be
viewed as having two separate ground planes:
power ground, where all the high-power compo-
nents go; and an analog ground plane for sensitive
analog components. The analog ground plane and
power ground plane must meet only at a single
point directly at the IC.
•
•
Minimize current-sensing errors by connecting LX_
directly to the drain of the low-side MOSFET.
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
5) Connect the output power planes directly to the out-
put filter capacitor positive and negative terminals
with multiple vias. Place the entire DC-DC converter
circuit as close to the load as is practical.
•
Route high-speed switching nodes (BST_, LX_,
DH_, and DL_) away from sensitive analog areas
(REF, FB_, and OUT_).
A sample layout is available in the MAX17020 evalua-
tion kit data sheet.
Table 5. MAX17020 vs. MAX8778 Design Differences
MAX17020
MAX8778
RTC power-up required for controller operation.
LDO and switching regulators independent of RTC operation.
______________________________________________________________________________________ 31
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
INPUT (V )*
IN
7V TO 24V
NOTE: PLACE C22 BETWEEN
IN AND PGND AS CLOSE AS
POSSIBLE TO THE MAX17020.
C22
0.1μF
C
IN
IN
N
H1
N
H2
2x 10μF 25V
DH1
DH2
BST1
BST2
C
BST1
C
BST2
L2
L1
0.1μF
0.1μF
1.5V OUTPUT
LX1
DL1
LX2
DL2
1.05V OUTPUT
C
OUT1
C
OUT2
MAX1720
N
L1
N
L2
PGND
AGND
RGND
0Ω
OUT1
OUT2
R1
11.3kΩ
3.3 SMPS SUPPLY
R7
100kΩ
R6
100kΩ
MAX17020
R2
10kΩ
FB1
PGOOD1
POWER-GOOD
}
PGOOD2
SECFB
5V SYSTEM SUPPLY
V
DD
REFIN2
RTC
C1
4.7μF
R10
47Ω
RTC SUPPLY
C3
1μF
V
CC
C2
1.0μF
LDOREFIN
BYP
C4
0.1μF
REF
3.3V SMPS SUPPLY
3.3V LDO OUTPUT
C5
1μF
SKIP
LDO
C6
4.7μF
ON1
ON2
ON
OFF
ONLDO
OUT1/OUT2 SWITCHING FREQUENCY
OPEN (REF): 400kHz/300kHz
R
ILIM1
TON
X
ILIM1
R
ILIM2
ILIM2
POWER GROUND
ANALOG GROUND
PAD
Figure 7. Standard Output Application Circuit—Chipset Supply
32 ______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
MAX1720
Package Information
Chip Information
For the latest package outline information, go to
PROCESS: BiCMOS
www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
32 TQFN
T3255-3
21-0140
______________________________________________________________________________________ 33
Dual Quick-PWM Step-Down Controller
with Low-Power LDO, RTC Regulator
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
2
5/08
9/08
2/09
Initial release
—
Added three new TOCs, various changes throughout
Minor edits to EC table and text additions
3, 8, 12–15, 24, 25, 26, 33
1, 5, 7, 14, 15, 23
MAX1720
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
34 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products. Inc.
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