MAX17015ETP+T [MAXIM]
Switching Regulator;型号: | MAX17015ETP+T |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Switching Regulator 开关 |
文件: | 总24页 (文件大小:464K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-4041; Rev 0; 2/08
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
General Description
Features
♦ High Switching Frequency (1.2MHz)
The MAX17005/MAX17006/MAX17015 are high-frequen-
cy multichemistry battery chargers. These circuits fea-
ture a new high-frequency current-mode architecture
that significantly reduces component size and cost. The
charger uses a high-side MOSFET with n-channel syn-
chronous rectifier. Widely adjustable charge current,
charge voltage, and input current limit simplify the con-
struction of highly accurate and efficient chargers.
♦ Controlled Inductor Current-Ripple Architecture
Reduced BOM Cost
Small Inductor and Output Capacitors
♦
♦
♦
0.4% Accurate Charge Voltage
2.5% Accurate Input-Current Limiting
3% Accurate Charge Current
♦ Single-Point Compensation
The charge voltage and charge current are set with
analog control inputs. The charge current setting can
also be adjusted with a PWM input. High-accuracy cur-
rent-sense amplifiers provide fast cycle-by-cycle cur-
rent-mode control to protect against short circuits to the
battery and respond quickly to system load transients.
In addition, the charger provides a high-accuracy ana-
log output that is proportional to the adapter current. In
the MAX17015, this current monitor remains active
when the adapter is absent to monitor battery dis-
charge current.
♦ Monitor Outputs for
2.5% Accurate Input Current Limit
2.5% Battery Discharge Current
(MAX17015 only)
AC Adapter Detection
♦ Analog/PWM Adjustable Charge-Current Setting
♦ Battery Voltage Adjustable for 3 and 4 Cells
(MAX17005) or 2 and 3 Cells (MAX17006)
♦ Adjustable Battery Voltage (4.2V to 4.4V/Cell)
♦ Cycle-by-Cycle Current Limit
Battery Short-Circuit Protection
Fast Response for Pulse Charging
Fast System-Load-Transient Response
The MAX17005 charges three or four Li+ series cells,
and the MAX17006 charges two or three Li+ series
cells. The MAX17015 adjusts the charge voltage setting
and the number of cells through a feedback resistor-
divider from the output. All variants of the charger can
provide at least 4A of charge current with a 10mΩ
sense resistor.
♦ Programmable Charge Current < 5A
♦ Automatic System Power Source Selection with
n-Channel MOSFET
♦ Internal Boost Diode
♦ +8V to +26V Input Voltage Range
The charger utilizes a charge pump to control an n-channel
adapter selection switch. The charge pump remains
active even when the charger is off. When the adapter
is absent, a p-channel MOSFET selects the battery.
Ordering Information
The MAX17005/MAX17006/MAX17015 are available in
a small, 4mm x 4mm x 0.8mm 20-pin, lead-free TQFN
package. An evaluation kit is available to reduce
design time.
PIN-
PACKAGE
PKG
CODE
PART
TEMP RANGE
20 Thin QFN
(4mm x 4mm)
MAX17005ETP+ -40°C to +85°C
MAX17006ETP+ -40°C to +85°C
T2044-3
T2044-3
T2044-3
Applications
20 Thin QFN
(4mm x 4mm)
Notebook Computers
Tablet PCs
20 Thin QFN
(4mm x 4mm)
MAX17015ETP+ -40°C to +85°C
Portable Equipment with Rechargeable Batteries
+Denotes a lead-free package.
Pin Configuration and Minimal Operating Circuit appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1.2MHz Low-Cost,
High-Performance Chargers
ABSOLUTE MAXIMUM RATINGS
DCIN, CSSP, CSSN, BATT, CSIN, CSIP, ACOK,
LX to AGND .......................................................-0.3V to +30V
BST to LDO.............................................................-0.3V to +30V
CSIP to CSIN, CSSP to CSSN .............................. -0.3V to +0.3V
DLO to PGND ............................................-0.3V to (LDO + 0.3V)
PGND to AGND.................................................... -0.3V to +0.3V
Continuous Power Dissipation (T = +70°C)
A
16-Pin TQFN (derate 16.9mW/°C above +70°C)....1349.1mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
IINP, FB, ACIN to AGND.............................-0.3V to (V + 0.3V)
AA
V
, LDO, ISET, VCTL, CC to AGND.......................-0.3V to +6V
AA
DHI to LX ....................................................-0.3V to (BST + 0.3V)
BST to LX..................................................................-0.3V to +6V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V
= V
= V
= 19V, V
= V
= V
= 16.8V, V
= V , V
= 1V, T = 0°C to +85°C,
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
AA ISET A
unless otherwise noted. Typical values are at T = +25°C.)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
CHARGE-VOLTAGE REGULATION
2 cells, V
= GND (for MAX17006)
8.3664 8.40 8.4336
VCTL
3 cells, V
= V (for MAX17005 and MAX17006) 12.549 12.60 12.651
VCTL
AA
Battery Regulation-Voltage Accuracy
V
4 cells, V
= GND (for MAX17005)
16.733 16.80 16.867
VCTL
FB accuracy using FB divider (for MAX17015)
(Note 1)
2.0916
-1
2.1
2.1084
+1
FB Input Bias Curent
VCTL Range
μA
V
V
-0.2
/2
AA
2 cells (for MAX17006), 4 cells (for MAX17005)
3 cells (for MAX17005 and MAX17006)
0.0
V
AA
/2
V
AA
+0.2
6/MAX7015
VCTL Gain
V
V
/V
5.85
-1
6
6.15
+1
V/V
μA
CELL VCTL
VCTL Input Bias Current
CHARGE-CURRENT REGULATION
ISET Range
= GND and VCTL = V
AA
VCTL
0.0
V
AA
/2
V
ISET = 1.4V
80
60
60
ISET Full-Scale Setting
mV
ISET = 99.9% duty cycle
58.2
-3
61.8
+3
mV
%
V
= V /4 or ISET
AA
ISET
= 99.9% duty cycle
Full-Charge Current Accuracy
(CSIP to CSIN)
38.2
-4.5
1.4
-52
-2
40
3
41.8
+4.5
4.6
mV
%
V
= V /6 or ISET
ISET
AA
V
BATT
= 1V to 16.8V
= 66.7% duty cycle
mV
%
V
= V /80 or ISET
ISET
AA
Trickle Charge-Current Accuracy
= 5% duty cycle
+52
+2
Charge-Current Gain Error
Based on V
Based on V
= V
= V
/4 and V
/4 and V
= V
= V
/80
/80
%
ISET
ISET
VAA
VAA
ISET
ISET
VAA
VAA
Charge-Current Offset Error
-1.4
0
+1.4
24
mV
V
BATT/CSIP/CSIN Input Voltage Range
ISET falling
ISET rising
21
26
40
31
ISET Power-Down Mode Threshold
mV
33
47
2
_______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 19V, V
= V
= V
= 16.8V, V
= V , V
= 1V, T = 0°C to +85°C,
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
AA ISET A
unless otherwise noted. Typical values are at T = +25°C.)
A
PARAMETER
CONDITIONS
MIN
-0.2
-0.2
TYP
MAX UNITS
V
= 3V
+0.2
μA
ISET
ISET Input Bias Current
ISET PWM Threshold
CSSN = BATT, V
Rising
= 5V
+0.2
ISET
2.4
V
Falling
0.8
ISET Frequency
0.128
500
kHz
Bits
ISET Effective Resolution
INPUT-CURRENT REGULATION
f
= 3.2MHz
8
PWM
58.5
-2.5
-0.1
8.0
60
61.5
+2.5
+0.1
26.0
2.94
+2.5
+2.5
mV
%
Input Current-Limit Threshold
V
- V
CSSP CSSN
CSSN Input Bias Current
CSSP/CSSN Input-Voltage Range
IINP Transconductance
Adapter present
μA
V
V
CSSP
V
CSSP
V
CSSP
- V
CSSN
- V
CSSN
- V
CSSN
= 60mV
2.66
-2.5
-2.5
2.8
μA/mV
= 60mV, V
= 35mV
= 0V to 4.5V
IINP
IINP Accuracy
%
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range
8
26
V
V
DCIN falling
DCIN rising
7.9
8.1
8.7
3
DCIN Undervoltage-Lockout (UVLO) Trip-Point
DCIN + CSSP + CSSN Quiescent Current
8.9
6
Adapter present (Note 2)
Adapter absent (Note 2)
mA
μA
30
50
Adapter absent (Note 2)
10
20
V
BATT
= 16.8V
BATT + CSIP + CSIN + LX Input Current
μA
Charger shutdown (Note 2)
10
20
V
= 2V to 19V, adapter present (Note 2)
< 26V, no load
200
5.35
100
4.1
500
5.55
200
5.0
BATT
LDO Output Voltage
LDO Load Regulation
LDO UVLO Threshold
REFERENCES
8.0V < V
5.15
3.2
V
mV
V
DCIN
0 < I
< 40mA
LDO
V
AA
V
AA
Output Voltage
UVLO Threshold
I
= 50μA
falling
4.18
4.20
3.1
4.22
3.9
V
V
VAA
V
AA
ACIN
ACIN Threshold
ACIN Threshold Hysteresis
ACIN Input Bias Current
ACOK
2.058
10
2.1
20
2.142
30
V
mV
μA
-1
+1
ACOK Sink Current
ACOK Leakage Current
V
V
= 0.4V, V
= 5.5V, V
= 1.5V
= 2.5V
6
mA
μA
ACOK
ACOK
ACIN
1
ACIN
_______________________________________________________________________________________
3
1.2MHz Low-Cost,
High-Performance Chargers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 19V, V
= V
= V
= 16.8V, V
= V , V
= 1V, T = 0°C to +85°C,
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
AA ISET A
unless otherwise noted. Typical values are at T = +25°C.)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
SWITCHING REGULATOR
DHI Off-Time K Factor
V
V
= 19V, V
= 10V
0.029 0.030 0.041
μs/V
mV
DCIN
BATT
Sense Voltage for Minimum Discontinuous
Mode Ripple Current
- V
10
10
CSIP
CSIN
Zero-Crossing Comparator Threshold
Cycle-by-Cycle Current-Limit Sense Voltage
DHI Resistance High
V
V
- V
- V
mV
mV
ꢀ
CSIP
CSIN
105
110
1.5
0.8
3
115
3
CSIP
CSIN
I
I
I
I
= 10mA
= -10mA
= 10mA
= -10mA
DLO
DLO
DLO
DLO
DHI Resistance Low
1.75
6
ꢀ
DLO Resistance High
ꢀ
DLO Resistance Low
3
7
ꢀ
ADAPTER DETECTION
Adapter Absence-Detect Threshold
Adapter Detect Threshold
V
- V
, V
falling
V rising
BATT, DCIN
+70
+360
180
+120 +170
+420 +580
mV
mV
Hz
DCIN
BATT DCIN
V
DCIN
- V
Adapter Switch Charge-Pump Frequency
Charger Shutdown
200
0.1
220
0.20
0.30
DLO
DHI
0.04
0.07
Adapter Switch Charge-Pump Refresh Pulse
μs
0.15
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V
= V
= V
= 19V, V
= V
= V
= 16.8V, V
= V , V
= 1V, T = -40°C to +85°C,
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
AA ISET A
unless otherwise noted.)
6/MAX7015
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
CHARGE-VOLTAGE REGULATION
2 cells, V
3 cells, V
(for MAX17005 and MAX17006)
= GND (for MAX17006)
8.366
12.549
16.73
2.091
8.433
VCTL
VCTL
= V
AA
12.651
Battery Regulation-Voltage Accuracy
V
4 cells, V = GND (for MAX17005)
16.86
VCTL
FB accuracy using FB divider (for MAX17015)
(Note 1)
2.108
2 cells (for MAX17006),
4 cells (for MAX17005)
V
- 0.2
/2
AA
0.0
VCTL Range
VCTL Gain
V
V
AA
/2
3 cells (for MAX17005 and MAX17006)
V
AA
+ 0.2
V
/V
5.85
6.15
V/V
CELL VCTL
4
_______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 19V, V
= V
= V
= 16.8V, V
= V , V
= 1V, T = -40°C to +85°C,
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
AA ISET A
unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
CHARGE-CURRENT REGULATION
ISET Range
0.0
57.5
-4.2
38
V
/2
V
mV
%
AA
62.5
+4.2
42
V
= V /4 or
AA
ISET
ISET = 99.9% duty cycle
Full Charge-Current Accuracy
(CSIP to CSIN)
mV
%
V
ISET
= V /6 or
AA
V
BATT
= 1V to 16.8V
ISET = 66.7% duty cycle
-5
+5
1.4
-52
-2
4.6
+52
+2
mV
%
V
= V /80 or
ISET
AA
Trickle Charge-Current Accuracy
ISET = 5% duty cycle
Charge-Current Gain Error
Based on V
Based on V
= V
= V
/4 and V
/4 and V
= V
= V
/80
/80
%
ISET
ISET
VAA
VAA
ISET
ISET
VAA
VAA
Charge-Current Offset Error
-1.4
0
+1.4
24
mV
V
BATT/CSIP/CSIN Input Voltage Range
ISET falling
ISET rising
Rising
21
31
ISET Power-Down Mode Threshold
ISET PWM Threshold
mV
33
47
2.4
V
Falling
0.8
ISET Frequency
0.128
500
kHz
INPUT-CURRENT REGULATION
58.2
-3
61.8
+3
mV
%
Input Current-Limit Threshold
V
- V
CSSP CSSN
CSSN Input Bias Current
CSSP/CSSN Input-Voltage Range
IINP Transconductance
Adapter present
-2
+2
μA
8.0
2.66
-2.5
-2.5
26.0
2.94
+2.5
+2.5
V
V
CSSP
V
CSSP
V
CSSP
- V
CSSN
- V
CSSN
- V
CSSN
= 60mV
μA/mV
= 60mV, V
= 35mV
= 0V to 4.5V
IINP
IINP Accuracy
%
SUPPLY AND LINEAR REGULATOR
DCIN Input-Voltage Range
8
26
V
V
DCIN falling
DCIN rising
7.9
DCIN UVLO Trip-Point
8.9
6
Adapter present (Note 2)
Adapter absent (Note 2)
mA
μA
DCIN + CSSP + CSSN Quiescent Current
BATT + CSIP + CSIN + LX Input Current
50
Adapter absent (Note 2)
Charger shutdown (Note 2)
= 2V to 19V, adapter present (Note 2)
< 26V, no load
20
V
= 16.8V
BATT
μA
20
V
BATT
500
5.55
200
5.0
LDO Output Voltage
LDO Load Regulation
LDO UVLO Threshold
8.0V < V
5.15
3.2
V
mV
V
DCIN
0 < I
< 40mA
LDO
_______________________________________________________________________________________
5
1.2MHz Low-Cost,
High-Performance Chargers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
= V
= V
= 19V, V
= V
= V
= 16.8V, V
= V , V
= 1V, T = -40°C to +85°C,
DCIN
CSSP
CSSN
BATT
CSIP
CSIN
VCTL
AA ISET A
unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
REFERENCES
VAA Output Voltage
VAA UVLO Threshold
ACIN
I
= 50μA
falling
4.18
4.22
3.9
V
V
VAA
V
AA
ACIN Threshold
2.058
10
2.142
30
V
ACIN Threshold Hysteresis
ACOK
mV
ACOK Sink Current
SWITCHING REGULATOR
DHI Off-Time K Factor
V
= 0.4V, V
= 1.5V
6
mA
ACOK
ACIN
V
V
= 19V, V
= 10V
0.029
105
0.041
115
3
μs/V
mV
ꢀ
DCIN
BATT
Cycle-by-Cycle Current-Limit Sense Voltage
DHI Resistance High
- V
CSIN
CSIP
I
I
I
I
= 10mA
= -10mA
= 10mA
= -10mA
DLO
DLO
DLO
DLO
DHI Resistance Low
1.75
6
ꢀ
DLO Resistance High
ꢀ
DLO Resistance Low
7
ꢀ
ADAPTER DETECTION
Adapter Absence-Detect Threshold
Adapter Detect Threshold
V
- V
, V
falling
V rising
BATT, DCIN
+70
+320
180
+170
+620
220
mV
mV
Hz
DCIN
BATT DCIN
V
DCIN
- V
Adapter Switch Charge-Pump Frequency
DLO
DHI
0.04
0.07
0.2
Adapter Switch Charge-Pump Refresh Pulse
μs
0.3
Note 1: Accuracy does not include errors due to external resistance tolerances.
Note 2: Adapter present conditions are tested at V = 19V and V = 16.8V. Adapter absent conditions are tested at
6/MAX7015
DCIN
BATT
V
DCIN
= 16V, V
= 16.8V.
BATT
6
_______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
Typical Operating Characteristics
(Circuit of Figure 1, adapter = 19V, battery = 10V, ISET = 1.05V, V
= GND, T = +25°C, unless otherwise noted.)
A
CTL
IINP DC ERROR
vs. SYSTEM CURRENT
IINP ERROR
vs. SYSTEM CURRENT
ISET PWM DUTY-CYCLE CHANGE
10
8
10
8
3.0
2.5
2.0
1.5
1.0
0.5
0
6
6
4
4
V
= 16.8V
BATT
2
2
0
0
-2
-4
-6
-8
-10
-2
-4
-6
-8
-10
V
= 8.4V
BATT
V
= 12.6V
BATT
0
1
2
3
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
SYSTEM CURRENT (A)
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
DUTY CYCLE
SYSTEM CURRENT (A)
BATTERY VOLTAGE-SETTING ERROR
ISET PWM DUTY-CYCLE CHANGE
ISET PWM FREQUENCY SWEEP
0
3.5
3.0
2.5
2.0
3.0
2.5
2.0
1.5
-0.1
-0.2
DUTY CYCLE = 75%
DUTY CYCLE = 25%
-0.3
-0.4
-0.5
-0.6
1.5
1.0
0.5
0
1.0
0.5
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VCTL (V)
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE
0
100 200 300 400 500 600 700 800
FREQUENCY (kHz)
EFFICIENCY
vs. CHARGE CURRENT
SYSTEM LOAD TRANSIENT
MAX17005 toc07
100
95
90
SYSTEM
CURRENT
5A/div
2 CELLS
85
80
75
70
65
3 CELLS
CHARGING
CURRENT
5A/div
4 CELLS
INDUCTOR
CURRENT
5A/div
60
200μs/div
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
CHARGE CURRENT (A)
_______________________________________________________________________________________
7
1.2MHz Low-Cost,
High-Performance Chargers
Typical Operating Characteristics (continued)
(Circuit of Figure 1, adapter = 19V, battery = 10V, ISET = 1.05V, V
= GND, T = +25°C, unless otherwise noted.)
A
CTL
LDO LOAD REGULATION
LDO LINE REGULATION
V
AA
LOAD REGULATION
5.50
5.45
5.50
5.45
4.205
4.204
4.203
4.202
4.201
4.200
4.199
4.198
4.197
4.196
4.195
5.40
5.35
5.30
5.40
5.35
5.30
0
5
10 15 20 25 30 35 40
LDO CURRENT (mA)
8
10 12 14 16 18 20 22 24 26
INPUT VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1.0
LOAD CURRENT (mA)
HIGH-SIDE MOSFET OFF-TIME AND
V
AA
vs. TEMPERATURE
SWITCHING FREQUENCY vs. BATTERY VOLTAGE
MAX17005 toc13
4.2005
4.2000
4.1995
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
6
5
4
3
2
1
0
V
= 20V
IN
SWITCHING FREQUENCY
4.1990
4.1985
4.1980
4.1975
4.1970
4.1965
HIGH-SIDE MOSFET OFF-TIME
6/MAX7015
-60 -40 -20
0
20 40 60 80 100
0
2
4
6
8
10 12 14 16 18
TEMPERATURE (°C)
BATTERY VOLTAGE (V)
ADAPTER CURRENT
vs. ADAPTER VOLTAGE
BATTERY LEAKAGE
ADAPTER REMOVAL
MAX17005 toc16
1.6
400
350
300
250
200
150
100
50
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
5.00V
5.00V
5.00V
0
0
5
10
15
20
0
2
4
6
8
10 12 14 16 18 20
200ms/div
ADAPTER VOLTAGE (V)
BATTERY VOLTAGE (V)
8
_______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
Pin Description
PIN
1
NAME
DCIN
AGND
CSIP
FUNCTION
Charger Bias Supply Input. Bypass DCIN with a 1μF capacitor to PGND.
2
Analog Ground
3
Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
Output Current-Sense Negative Input
4
CSIN
Input Current-Monitor Output. IINP sources the current proportional to the current sensed across
CSSP and CSSN. The transconductance from (CSSP - CSSN) to IINP is 2.8μA/mV. See the Analog
Input Current-Monitor Output section to configure the current monitor for a particular gain setting.
5
IINP
6
7
BATT
Battery Voltage Feedback Input
AC Detect Output. This open-drain output is high impedance when ACIN is lower than V /2.
AA
Connect a 10kꢀ pullup resistor from LDO to ACOK.
ACOK
8
9
CSSP
CSSN
Input Current Sense for Positive Input. Connect a current-sense resistor from CSSP to CSSN.
Input Current-Sense Negative Input
Dual Mode™ Input for Setting Maximum Charge Current. ISET can be configured either with a
resistor voltage-divider or with a PWM signal from 128Hz to 500kHz. If there is no clock edge
within 20ms, ISET defaults to analog input mode. Pull ISET to GND to shut down the charger.
10
ISET
In the MAX17015, when the adapter is absent, drive ISET above 1V to enable IINP during battery
discharge. When the adapter is reinserted, ISET must be released to the correct control level within
300ms.
11
12
PGND
DLO
Power Ground Connection for MOSFET Drivers
Low-Side Power-MOSFET Driver Output. Connect to low-side n-channel MOSFET gate.
Linear Regulator Output. LDO provides the power to the MOSFET drivers. LDO is the output of the 5.4V
linear regulator supplied from DCIN. Bypass LDO with a 4.7μF ceramic capacitor from LDO to PGND.
13
LDO
14
15
16
17
18
BST
DHI
LX
High-Side Driver Supply. Connect a 0.68μF capacitor from BST to LX.
High-Side Power-MOSFET Driver Output. Connect to high-side n-channel MOSFET gate.
High-Side Driver Source Connection. Connect a 0.68μF capacitor from BST to LX.
AC Adapter Detect Input. ACIN is the input to an uncommitted comparator.
ACIN
V
AA
4.2V Voltage Reference and Device Power-Supply Input. Bypass V with a 1μF capacitor to GND.
AA
Voltage Regulation Loop-Compensation Point. Connect 3kꢀ and 0.01μF capacitor in series from
CC to GND.
19
CC
Battery Voltage Adjust Input. VCTL sets the number of cells and adjusts the voltage per cell. The
adjustment range is 4.2V to 4.4V per cell. See the Setting Charge Voltage section.
20
—
VCTL
BP
Backside Paddle. Connect the backside paddle to analog ground.
Dual Mode is a trademark of Maxim Integrated Products, Inc.
_______________________________________________________________________________________
9
1.2MHz Low-Cost,
High-Performance Chargers
SYSTEM LOAD
Q1b
RS1
15mΩ
Q1a
ADAPTER
N3
C
IN
C7
0.1μF
R9
2MΩ
C6
1μF
R4
200kΩ
ADAPTER
R
ACIN1
R6
200kΩ
N4
D1
DCIN
ACIN
CSSP
CSSN
BATT
BST
C4
0.68μF
C
C
= 2 x 4.7μF
= 4.7μF
IN
OUT
LDO
N1
N2
10kΩ
DHI
LX
L1 = 2μH
ACOK
IINP
R
ACIN2
DLO
C2
0.1μF
R1
22.6kΩ
L1
PGND
CSIP
V
AA
RS2
10mΩ
MAX17005
MAX17006
MAX17015
C3
1μF
R2
CSIN
GND
C
R3
OUT
VCTL
BATTERY
BATT
CC
R5
3kΩ
R7
R8
6/MAX7015
PWM SIGNAL
ISET
C5
0.01μF
ONLY FOR MAX17015
LDO
C1
4.7μF
Figure 1. Typical Operating Circuit
The MAX17005/MAX17006/MAX17015 use a new ther-
mally optimized high-frequency architecture. With this
new architecture, the switching frequency is adjusted
to control the power dissipation in the high-side
MOSFET. Benefits of the new architecture include:
reduced output capacitance and inductance, resulting in
smaller printed-circuit board (PCB) area and lower cost.
Detailed Description
The MAX17005/MAX17006/MAX17015 include all the
functions necessary to charge Li+, NiMH, and NiCd
batteries. An all n-channel synchronous-rectified step-
down DC-DC converter is used to implement a preci-
sion constant-current, constant-voltage charger. The
charge current and input current-limit sense amplifiers
have low-input offset errors (250μV typ), allowing the
use of small-valued sense resistors.
10 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
IINP ACIN
ACOK
CSSP
CSSN
LDO
CSA
A = 17.5V/V
Gm =
2.8μA/mV
DCIN
BATT
V
AA
/2
V
AA
4.2V
REFERENCE
GMS
VCTL + 100mV
60mV
GND
BDIV
LDO
POWER
FAIL
5.4V LINEAR
REGULATOR
CC
10mV
BATT
CELL
SELECT
LOGIC
OVP
IMIN
BDIV
LOWEST
BST
DHI
LX
VOLTAGE
CLAMP
GMV
CSI
DC-DC
CONVERTER
VCTL
LEVEL
SHIFT
HIGH-SIDE
DRIVER
CCMP
V
AA
LDO
CSIP
CSIN
DLO
LOW-SIDE
DRIVER
CSA
A = 17.5V/V
IMAX
IZX
PGND
110mV
GMI
PWM
FILTER
26mV
10mV
CHARGER
MAX17005
MAX17006
MAX17015
SHUTDOWN
ISET
Figure 2. Functional Diagram
The MAX17005/MAX17006/MAX17015 feature a volt-
age-regulation loop (CCV) and two current-regulation
loops (CCI and CCS). The loops operate independently
of each other. The CCV voltage-regulation loop moni-
tors BATT to ensure that its voltage never exceeds the
voltage set by VCTL. The CCI battery charge current-
regulation loop monitors current delivered to BATT to
ensure that it never exceeds the current limit set by
ISET. The charge current-regulation loop is in control as
long as the battery voltage is below the set point. When
the battery voltage reaches its set point, the voltage-
regulation loop takes control and maintains the battery
voltage at the set point. A third loop (CCS) takes control
and reduces the charge current when the adapter cur-
rent exceeds the input current limit.
The MAX17005/MAX17006/MAX17015 have single-
point compensation. The two current loops are internal-
ly compensated while the voltage loop is compensated
with a series RC network at CC pin. See the CC Loop
Compensation section for the resistor and capacitor
selection. A functional diagram is shown in Figure 2.
______________________________________________________________________________________ 11
1.2MHz Low-Cost,
High-Performance Chargers
There are two constraints in choosing R7 and R8. The
Setting Charge Voltage
resistors cannot be too small since they discharge the
battery, and they cannot be too large because FB pin
consumes less than 1μA of input bias current. Pick R8
to be approximately 10kΩ and then calculate R7.
The VCTL input adjusts the battery-output voltage,
BATT
V
, and determines the number of cells. For 3- and
4-cell applications, use the MAX17005; for 2- and 3-cell
applications, use the MAX17006. Use the MAX17015 to
adjust the cell number and set the cell voltage with a
resistive voltage-divider from the output. Based on the
version of the part, the number of cells and the level of
VCTL should be set as in Table 1:
FB regulation error ( 0.5ꢀ max) and the tolerance of R7
and R8 both contribute to the error on the battery volt-
age. Use 0.1ꢀ feedback resistors for best accuracy.
Setting Charge Current
The voltage at ISET determines the voltage across cur-
rent-sense resistor RS2. ISET can accept either analog
or digital inputs. The full-scale differential voltage
between CSIP and CSIN is 80mV (8A for RS2 = 10mΩ)
for the analog input, and 60mV (6A for RS2 = 10mΩ) for
the digital PWM input.
Table 1. Cell Configuration
VERSION
MAX17005
MAX17005
MAX17006
MAX17006
MAX17015
NO. OF CELLS
LEVEL
3
2.4V < VCTL < 4.2V
0V < VCTL < 1.8V
4
2
3
0V < VCTL < 1.8V
2.4V < VCTL < 4.2V
VCTL = GND or VCTL = V
When the MAX17005/MAX17006/MAX17015 power up
and the charger is ready, if there is no clock edge with-
in 20ms, the circuit assumes ISET is an analog input,
and disables the PWM filter block. To configure the
charge current, force the voltage on ISET according to
the following equation:
Sets FB
AA
The MAX17005 and MAX17006 support from 4.2V/cell
to 4.4V/cell, whereas the MAX17015 supports minimum
2.1V. The maximum voltage is determined with the
dropout performance of IC. When the required voltage
falls outside the range available with the MAX17005 or
MAX17006, the MAX17015 should be used.
V
240mV
RS2
ISET
I
=
×
CHG
V
AA
The input range for ISET is from 0 to V /2. To shut
AA
down the charger, pull ISET below 26mV.
The charge-voltage regulation for the MAX17005 and
MAX17006 is calculated with the following equations:
If there is a clock edge on ISET within 20ms, the PWM
filter is enabled and ISET accepts digital PWM input.
The PWM filter has a DAC with 8-bit resolution that cor-
4.2V − V
VCTL
V
= 4.2V +
CELL
6
responds to equivalent V steps.
CSIP-CSIN
0
for 3-cell selection of MAX17005 and MAX17006, 4.2V
> VCTL > 2.4V:
V
VCTL
6
CSIN
V
= 4.2V +
CELL
for 2- or 4-cell selection of MAX17006 or MAX17005,
respectively, 0V < VCTL < 1.8V. Connect VCTL to GND
C
OUT
BATTERY
R7
R8
MAX17015
or to V for default 4.2V/cell battery-voltage setting.
AA
For the MAX17015, connect VCTL to GND to set the FB
regulation point to 2.1V. The charge-voltage regulation is
calculated with the following equation:
FB
R8 + R7
R8
V
= V
×
CHG _REG
FB _ SETPOINT
Figure 3. MAX17015 Charge-Voltage Regulation Feedback Network
12 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
The PWM filter accepts the digital signal with a frequency
from 128Hz to 500kHz. Zero duty cycle shuts down the
MAX17005/MAX17006/MAX17015, and 99.5ꢀ duty cycle
corresponds to full scale (60mV) across CSIP and CSIN.
60mV
RS1
Rb
Ra
I
=
× (1+
)
INPUT _LIMIT
To minimize power dissipation, first choose RS1
according to the closest available value. For conve-
nience, choose Ra = 6kΩ and calculate Rb from the
above equation.
Choose a current-sense resistor (RS2) to have a suffi-
cient power-dissipation rating to handle the full-charge
current. The current-sense voltage can be reduced to
minimize the power-dissipation period. However, this
can degrade accuracy due to the current-sense amplifi-
er’s input offset (0.25mV typ). See Typical Operating
Characteristics to estimate the charge-current accuracy
at various set points.
Choose a current-sense resistor (RS1) to have a suffi-
cient power rating to handle the full system current. The
current-sense resistor can be reduced to improve effi-
ciency, but this degrades accuracy due to the current-
sense amplifier’s input offset (0.15mV typ). See Typical
Operating Characteristics to estimate the input current-
limit accuracy at various set points.
Setting Input-Current Limit
The total input current, from a wall adapter or other DC
source, is the sum of the system supply current and the
current required by the charger. When the input current
exceeds the set input-current limit, the controller
decreases the charge current to provide priority to sys-
tem load current. System current normally fluctuates as
portions of the system are powered up or down. The
input-current-limit circuit reduces the power require-
ment of the AC wall adapter, which reduces adapter
cost. As the system supply rises, the available charge
current drops linearly to zero. Thereafter, the total input
current can increase without limit.
Automatic Power-Source Selection
The MAX17005/MAX17006/MAX17015 use an external
charge pump to drive the gate of an n-channel adapter
selection switch (N3 and Q1a). In Figure 1, when the
adapter is present, BST is biased 5V above V
ADAPTER
so that N3 and Q1a are on, and Q1b is off. As long as
the adapter is present, even though the charger is off,
the power stage forces a refresh pulse to the BST
charge pump every 5ms.
When the adapter voltage is removed, the charger
stops generating BST refresh pulses and N4 forces N2
off, Q1b turns on and supplies power to the system
from the battery.
The total input current is the sum of the device supply cur-
rent, the charger input current, and the system load cur-
rent. The total input current can be estimated as follows:
In Figure 1, D1 must have low forward-voltage drop and
low reverse-leakage current to ensure sufficient gate
drive at N3 and Q1a. A 100mA, low reverse-leakage
Schottky diode is the right choice.
I
× V
BATTERY
CHARGE
I
= I
+
INPUT
LOAD
V
× η
IN
where η is the efficiency of the DC-to-DC converter
(typically 85ꢀ to 95ꢀ).
Analog Input Current-Monitor Output
Use IINP to monitor the system-input current, which is
sensed across CSSP and CSSN. The voltage at IINP is
proportional to the input current:
In the MAX17005/MAX17006/MAX17015, the voltage
across CSSP and CSSN is constant at 60mV. Choose
the current-sense resistor, RS1, to set the input current
limit. For example, for 4A input current limit, choose
RS1 = 15mΩ. For the input current-limit settings, which
cannot be achievable with standard sense resistor val-
ues, use a resistive voltage-divider between CSSP and
CSSN to tune the setting (Figure 4).
V
IINP
I
=
INPUT
RS1× G
× R
IINP
IINP
where I
is the DC current supplied by the AC
INPUT
adapter, G
is the transconductance of the sense
IINP
RS1
amplifier (2.8 mA/V typ), and R
is the resistor con-
IINP
nected between IINP and ground. Typically, IINP has a
0V to 3.5V output voltage range. Leave IINP unconnect-
ed when not used.
Rb
Ra
CSSP
CSSN
MAX17005/MAX17006/MAX17015
Figure 4. Input Current-Limit Fine Tuning
______________________________________________________________________________________ 13
1.2MHz Low-Cost,
High-Performance Chargers
Operating Conditions
The MAX17005/MAX17006/MAX17015 have the following
operating states:
RS1
15mΩ
Q1a
SYSTEM LOAD
ADAPTER
•
Adapter Present: When DCIN is greater than 8.7V,
C
IN
the controller detects the adapter. In this condition,
C7
10nF
both the LDO and V turn on and battery charging
AA
is allowed:
Q1b
R6
50kΩ
a) Charging: The total MAX17005/MAX17006/
MAX17015 quiescent current when charging is
3mA (max) plus the current required to drive the
MOSFETs.
BATTERY
D1
CSSP
CSSN
BST
b) Not Charging: To disable charging drive ISET
below 26mV. When the adapter is present and
charging is disabled, the total adapter quiescent
current is less than 1.5mA and the total battery
quiescent current is less than 60μA. The charge
pump still operates.
C4
0.1μF
MAX17015
N1
DHI
LX
•
Adapter Absent (Power Fail): When V
is less
DCIN
than V
+ 120mV, the DC-DC converter is in
CSIN
Figure 5. Current-Monitoring Design Battery Discharge
dropout. The charger detects the dropout condition
and shuts down.
IINP can also be used to monitor battery discharge cur-
rent (see Figure 5). In the MAX17015, when the adapter is
absent, drive ISET above 1V to enable IINP during battery
discharge. When the adapter is reinserted, ISET must be
released to the correct control level within 300ms.
The MAX17005/MAX17006/MAX17015 allow charging
under the following conditions:
•
•
•
DCIN > 7.5V, LDO > 4V, V > 3.1V
AA
V
DCIN
V
ISET
> V
+ 420mV (300mV falling hysteresis)
CSIN
> 45mV or PWM detected
AC Adapter Detection
The MAX17005/MAX17006/MAX17015 include a hys-
teretic comparator that detects the presence of an AC
power adapter. When ACIN is lower than 2.1V, the
open-drain ACOK output becomes high impedance.
Connect a 10kΩ pullup resistance between LDO and
ACOK. Use a resistive voltage-divider from the
adapter’s output to the ACIN pin to set the appropriate
detection threshold. Select the resistive voltage-divider
so that the voltage on ACIN does not to exceed its
absolute maximum rating (6V).
____________________DC-DC Converter
The MAX17005/MAX17006/MAX17015 employ a syn-
chronous step-down DC-DC converter with an n-chan-
nel high-side MOSFET switch and an n-channel
low-side synchronous rectifier. The charger features a
controlled inductor current-ripple architecture, current-
mode control scheme with cycle-by-cycle current limit.
6/MAX7015
The controller’s off-time (t
) is adjusted to keep the
OFF
high-side MOSFET junction temperature constant. In
this way, the controller switches faster when the high-
side MOSFET has available thermal capacity. This
allows the inductor current ripple and the output-volt-
age ripple to decrease so that smaller and cheaper
components can be used. The controller can also oper-
ate in discontinuous conduction mode for improved
light-load efficiency.
LDO Regulator and V
AA
An integrated low-dropout (LDO) linear regulator pro-
vides a 5.4V supply derived from DCIN, and delivers
over 40mA of load current. Do not use the LDO to
external loads greater than 10mA. The LDO powers the
gate drivers of the n-channel MOSFETs. See the
MOSFET Drivers section. Bypass LDO to PGND with a
4.7μF ceramic capacitor. V
is 4.2V reference sup-
AA
plied by DCIN. V biases most of the control circuitry,
AA
and should be bypassed to GND with a 1μF or greater
ceramic capacitor.
14 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
BDIV
OVP
SET POINT + 100mV
CSI
IMAX
11A
Q
DH DRIVER
R
CCMP
LVC
IMIN
S
Q
DL DRIVER
1A
ZCMP
1A
OFF-TIME
ONE SHOT
CSSP
CSIN
OFF-TIME
COMPUTE
Figure 6. DC-DC Converter Functional Diagram
The operation of the DC-to-DC controller is determined
by the following five comparators as shown in the func-
tional diagram in Figures 2 and 6:
The high-side MOSFET on-time is terminated when
the current-sense signal exceeds 11A. A new cycle
cannot start until the IMAX comparator’s output
goes low.
•
The IMIN comparator triggers a pulse in discontinu-
ous mode when the accumulated error is too high.
IMIN compares the control signal (LVC) against
• The ZCMP comparator provides zero-crossing detec-
tion during discontinuous conduction. ZCMP com-
pares the current-sense feedback signal to 1A (RS2
= 10mΩ). When the inductor current is lower than
the 1A threshold, the comparator output is high,
and DLO is turned off.
10mV (referred at V
- V
). When LVC is less
CSIN
CSIP
than this threshold, DHI and DLO are both forced
low. Indirectly, IMIN sets the peak inductor current
in discontinuous mode.
•
•
The CCMP comparator is used for current-mode
regulation in continuous-conduction mode. CCMP
compares LVC against the inductor current. The
high-side MOSFET on-time is terminated when the
CSI voltage is higher than LVC.
•
The OVP comparator is used to prevent overvoltage
at the output due to battery removal. OVP com-
pares BATT against the VCTL. When BATT is
100mV/cell above the set value, the OVP compara-
tor output goes high, and the high-side MOSFET
on-time is terminated. DHI and DLO remain off until
the OVP condition is removed.
The IMAX comparator provides a secondary cycle-
by-cycle current limit. IMAX compares CSI to
110mV (corresponding to 11A when RS2 = 10mΩ).
______________________________________________________________________________________ 15
1.2MHz Low-Cost,
High-Performance Chargers
At the end of the computed off-time, the controller initi-
ates a new cycle if the control point (LVC) is greater
than 10mV (V - V referred), and the charge
CC, CCI, CCS, and LVC Control Blocks
The MAX17005/MAX17006/MAX17015 control input
current (CCS control loop), charge current (CCI control
loop), or charge voltage (CC control loop), depending
on the operating condition. The three control loops, CC,
CCI, and CCS are brought together internally at the
lowest voltage clamp (LVC) amplifier. The output of the
LVC amplifier is the feedback control signal for the
DC-DC controller. The minimum voltage at the CC, CCI,
or CCS appears at the output of the LVC amplifier and
clamps the other control loops to within 0.3V above the
control point. Clamping the other two control loops
close to the lowest control loop ensures fast transition
with minimal overshoot when switching between differ-
ent control loops (see the Compensation section). The
CCS and CCI loops are compensated internally, and
the CC loop is compensated externally.
CSIP
CSIN
current is less than the cycle-by-cycle current limit.
Restated another way, IMIN must be high, IMAX must
be low, and OVP must be low for the controller to initi-
ate a new cycle. If the peak inductor current exceeds
IMAX comparator threshold or the output voltage
exceeds the OVP threshold, then the on-time is termi-
nated. The cycle-by-cycle current limit effectively pro-
tects against overcurrent and short-circuit faults.
If during the off-time the inductor current goes to zero,
the ZCMP comparator output pulls high, turning off the
low-side MOSFET. Both the high- and low-side
MOSFETs are turned off until another cycle is ready to
begin. ZCOMP causes the MAX17005/MAX17006/
MAX17015 to enter into the discontinuous conduction
mode (see the Discontinuous Conduction section).
Continuous-Conduction Mode
With sufficiently large charge current, the MAX17005/
MAX17006/MAX17015s’ inductor current never crosses
zero, which is defined as continuous-conduction mode.
The controller starts a new cycle by turning on the high-
side MOSFET and turning off the low-side MOSFET.
When the charge-current feedback signal (CSI) is
greater than the control point (LVC), the CCMP com-
parator output goes high and the controller initiates the
off-time by turning off the high-side MOSFET and turn-
ing on the low-side MOSFET. The operating frequency
is governed by the off-time and is dependent upon
Discontinuous Conduction
The MAX17005/MAX17006/MAX17015 can also operate
in discontinuous conduction mode to ensure that the
inductor current is always positive. The MAX17005/
MAX17006/MAX17015 enter discontinuous conduction
mode when the output of the LVC control point falls below
10mV (referred at V
- V
). For RS2 = 10mΩ, this
CSIP
CSIN
corresponds to a peak inductor current of 1A.
In discontinuous mode, a new cycle is not started until
the LVC voltage rises above IMIN. Discontinuous mode
operation can occur during conditioning charge of
overdischarged battery packs, when the charge cur-
rent has been reduced sufficiently by the CCS control
loop, or when the charger is in constant-voltage mode
with a nearly full battery pack.
V
CSIN
and V
.
DCIN
The on-time can be determined using the following
equation:
6/MAX7015
L ×I
RIPPLE
t
=
ON
V
− V
DCIN
BATT
Compensation
The charge voltage, charge current, and input current-
limit regulation loops are compensated separately. The
charge current and input current-limit loops, CCI and
CCS, are compensated internally, whereas the charge
voltage loop is compensated externally at CC.
where:
V
× t
OFF
L
BATT
I
=
RIPPLE
The switching frequency can then be calculated:
1
f
=
SW
t
+ t
OFF
ON
16 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
CC Loop Compensation
1
The simplified schematic in Figure 7 is sufficient to
describe the operation of the controller’s voltage loop,
CC. The required compensation network is a pole-zero
GM
=
OUT
ACSI × RS2
where A
= 20, and RS2 = 10mΩ in the typical appli-
CSI
pair formed with C
and R . The zero is necessary
CC
to compensate the pole formed by the output capacitor
and the load. R is the equivalent series resistance
CC
cation circuits, so GM
= 5A/V.
OUT
ESR
The loop transfer function is given by:
LTF = GM × R × GMV × R
OGMV
(ESR) of the charger output capacitor (C
). R is the
L
OUT
equivalent charger output load, where R = ΔV
/
BATT
OUT
L
× R
L
ΔI
. The equivalent output impedance of the GMV
CHG
(1+ sC
)(1+ sC
× R
)
OUT
ESR
CC
CC
×
amplifier, R
, is greater than 10MΩ. The voltage-
OGMV
(1+ sC
× R
)(1+ sC
× R )
CC
OGMV
OUT L
amplifier transconductance, GMV = 0.125μA/mV. The
DC-DC converter transconductance is dependent upon
charge current-sense resistor RS2:
The poles and zeros of the voltage-loop transfer function
are listed from lowest frequency to highest frequency in
Table 2.
Near crossover, C
is much lower impedance than
CC
R
. Since C
is in parallel with R
C
domi-
OGMV
CC
OGMV, CC
BATT
nates the parallel impedance near crossover. Additionally,
is much higher impedance than C and dominates
GM
OUT
R
CC
CC
R
the series combination of R and C , so:
ESR
CC
CC
R
L
R
× (1+ sC
× R
)
OGMV
CC
CC
C
OUT
≅ R
CC
(1+ sC
× R
)
CC
OGMV
C
is also much lower impedance than R near
L
OUT
CC
crossover so the parallel impedance is mostly capaci-
tive and:
GMV
R
R
L
1
CC
≅
R
OGMV
(1+ sC
× R ) sC
L OUT
OUT
C
CC
VCTL
Figure 7. CC Loop Diagram
Table 2. CC Loop Poles and Zeros
NAME
EQUATION
DESCRIPTION
1
f
=
CCV Pole
Lowest frequency pole created by C and GMV’s finite output resistance.
CV
P _ CV
2πR
× C
CC
OGMV
Voltage-loop compensation zero. If this zero is at the same frequency or lower
1
than output pole f
, the loop-transfer function approximates a single-pole
P_OUT
f
=
Z _ CV
CCV Zero
2πR
× C
CC
response near the crossover frequency. Choose C to place this zero at
CV
CC
least one decade below crossover to ensure adequate phase margin.
Output pole formed with the effective load resistance R and the output
L
1
Output
Pole
f
=
capacitance C
. R influences the DC gain but does not affect the stability
L
OUT
P _OUT
2πR × C
L
OUT
of the system or the crossover frequency.
Output ESR Zero. This zero can keep the loop from crossing unity gain if
1
Output
Zero
f
is less than the desired crossover frequency; therefore, choose a
f
=
Z_OUT
Z _OUT
2πR
× C
OUT
ESR
capacitor with an ESR zero greater than the crossover frequency.
______________________________________________________________________________________ 17
1.2MHz Low-Cost,
High-Performance Chargers
If R
is small enough, its associated output zero has
Figure 8 shows the Bode plot of the voltage-loop-
frequency response using the values calculated above.
ESR
a negligible effect near crossover and the loop-transfer-
function can be simplified as follows:
MOSFET Drivers
The DHI and DLO outputs are optimized for driving
moderate-sized power MOSFETs. The MOSFET drive
capability is the same for both the low-side and high-
sides switches. This is consistent with the variable duty
factor that occurs in the notebook computer environ-
ment where the battery voltage changes over a wide
range. There must be a low-resistance, low-inductance
path from the DLO driver to the MOSFET gate to pre-
vent shoot-through. Otherwise, the sense circuitry in the
MAX17005/MAX17006 interpret the MOSFET gate as
“off” while there is still charge left on the gate. Use very
short, wide traces measuring 10 to 20 squares or fewer
(1.25mm to 2.5mm wide if the MOSFET is 25mm from
the device). Unlike the DLO output, the DHI output uses
a 50ns (typ) delay time to prevent the low-side MOSFET
from turning on until DHI is fully off. The same consider-
ations should be used for routing the DHI signal to the
high-side MOSFET.
R
CC
LTF = GM
×
G
MV
OUT
sC
OUT
Setting LTF = 1 to solve for the unity-gain frequency
yields:
R
CC
f
= GM
× G
×
CO _ CV
OUT
MV
2π × C
OUT
For stability, choose a crossover frequency lower than
1/10 the switching frequency (f . For example,
choose a crossover frequency of 50kHz and solve for
using the component values listed in Figure 1 to
OSC)
R
CC
yield R
= 3kΩ:
CC
2π × C
× f
OUT CO _ CV
R
=
≅ 3kΩ
CC
GMV × GM
OUT
GMV = 0.125μA/mV
GM = 5A/V
The high-side driver (DHI) swings from LX to 5V above
LX (BST) and has a typical impedance of 1.5Ω sourcing
and 0.8Ω sinking. The strong high-side MOSFET driver
eliminates most of the power dissipation due to switch-
ing losses. The low-side driver (DLO) swings from LDO
to ground and has a typical impedance of 3Ω sinking
and 3Ω sourcing. This helps prevent DLO from being
pulled up when the high-side switch turns on due to
capacitive coupling from the drain to the gate of the
low-side MOSFET. This places some restrictions on the
MOSFETs that can be used. Using a low-side
MOSFET with smaller gate-to-drain capacitance can
prevent these problems.
OUT
C
= 4.7μF
OUT
f
= 600kHz
OSC_CV
R = 0.2Ω
L
f
= 50kHz
CO_CV
To ensure that the compensation zero adequately can-
cels the output pole, select f
≤ f
:
Z_CV
P_OUT
≥ (R /R ) x C
L CC OUT
6/MAX7015
C
CC
C
≥ 300pF (assuming 2 cells and 2A maximum
CC
charge current).
Design Procedure
80
60
40
20
0
0
MOSFET Selection
Choose the n-channel MOSFETs according to the maxi-
mum required charge current. The MOSFETs must be
able to dissipate the resistive losses plus the switching
-45
-90
-135
losses at both V
and V
.
DCIN(MAX)
DCIN(MIN)
For the high-side MOSFET, the worst-case resistive
power losses occur at the maximum battery voltage
and minimum supply voltage:
V
BATT(MAX)
2
PD
(HighSide) =
×I
× R
COND
CHG DS(ON)
-20
MAG
PHASE
V
DCIN(MIN)
-40
0.1
1
10 100 1k
FREQUENCY (Hz)
10k 100k 1M
Figure 8. CC Loop Response
18 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
Generally, a low gate charge high-side MOSFET is pre-
ferred to minimize switching losses. However, the
required to stay within package power dissi-
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied. If the high-side MOSFET chosen
R
DS(ON)
pation often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction losses. High-side switching losses do not
usually become an issue until the input is greater than
approximately 15V. Calculating the power dissipation in
N1 due to switching losses is difficult since it must
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including a verifica-
tion using a thermocouple mounted on N1:
for adequate R
at low-battery voltages becomes
DS(ON)
hot when biased from V
another MOSFET with lower parasitic capacitance.
, consider choosing
DCIN(MAX)
For the low-side MOSFET (N2), the worst-case power
dissipation always occurs at maximum input voltage:
⎛
⎞
V
BATT(MIN)
2
PD
(LS) = 1−
×I
× R
⎜
⎟
COND
CHG DS(ON)
V
⎝
⎠
CSSP(MAX)
The following additional loss occurs in the low-side
MOSFET due to the body diode conduction losses:
PD
(LS) = 0.05 ×I
× 0.4V
BDY
PEAK
The total power low-side MOSFET dissipation is:
PD (LS) ≈ PD (LS) + PD (LS)
1
2
PD (HS) = × t
× V ×I × f
CSSP CHG SW
SW
TRANS
TOTAL
COND
BDY
These calculations provide an estimate and are not a
substitute for breadboard evaluation, preferably
including a verification using a thermocouple mounted
on the MOSFET.
where t
is the drivers transition time and can be
TRANS
calculated as follows:
⎛
⎞
1
1
t
=
+
× Q
(
+ Q
)
TRANS
GD GS
⎜
⎟
I
I
GSNK
⎝
⎠
Inductor Selection
The selection of the inductor has multiple trade-offs
between efficiency, transient response, size, and cost.
Small inductance is cheap and small, and has a better
transient response due to higher slew rate; however, the
efficiency is lower because of higher RMS current. High
inductance results in lower ripple so that the need of the
output capacitors for output voltage ripple goes low.
GSRC
I
and I
are the peak gate-drive source/sink
GSNK
GSRC
current (3Ω sourcing and 0.8Ω sinking, typically). The
MAX17005/MAX17006/MAX17015 control the switching
frequency as shown in the Typical Operating
Characteristics.
The following is the power dissipated due to high-side
n-channel MOSFET’s output capacitance (C
):
RSS
The MAX17005/MAX17006/MAX17015 combine all the
inductor trade-offs in an optimum way by controlling
switching frequency. High-frequency operation permits
the use of a smaller and cheaper inductor, and conse-
quently results in smaller output ripple and better tran-
sient response.
2
V
× C
× f
CSSP
RSS SW
PD
(HS) ≈
CRSS
2
The following high-side MOSFET’s loss is due to the
reverse-recovery charge of the low-side MOSFET’s
body diode:
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics. For
optimum efficiency, choose the inductance according
to the following equation:
Q
× V
× f
RR2
CSSP SW
2
PD
(HS) =
QRR
2
k × V
IN
Ignore PD
(HighSide) if a Schottky diode is used
QRR
L =
4 ×I
× LIR
MAX
parallel to a low-side MOSFET.
CHG
The total high-side MOSFET power dissipation is:
where k = 35ns/V.
PD
(HS) ≈ PD (HS) + PD (HS)
COND SW
TOTAL
+ PD
(HS) + PD
(HS)
CRSS
QRR
______________________________________________________________________________________ 19
1.2MHz Low-Cost,
High-Performance Chargers
For optimum size and inductor current ripple, choose
LIR = 0.4, which sets the ripple current to 40ꢀ the
Choose k
is a derating factor of 2 for typical 25V-
CAP-BIAS
rated ceramic capacitors.
MAX
charge current and results in a good balance between
inductor size and efficiency. Higher inductor values
decrease the ripple current. Smaller inductor values
save cost but require higher saturation current capabili-
ties and degrade efficiency.
For f = 800kHz, I
= 1A, and to get ΔV =
BATT
SW
RIPPLE
as 4.7μF.
70mV, choose C
OUT
If the internal resistance of battery is close to the ESR of
the output capacitor, the voltage ripple is shared with
the battery and is less than calculated.
Inductor L1 must have a saturation current rating of at
least the maximum charge current plus 1/2 the ripple
current (ΔIL):
Applications Information
Setting Input Current Limit
The input current limit should be set based on the cur-
rent capability of the AC adapter and the tolerance of
the input current limit. The upper limit of the input cur-
rent threshold should never exceed the adapter’s mini-
mum available output current. For example, if the
adapter’s output current rating is 5A 10ꢀ, the input
current limit should be selected so that its upper limit is
less than 5A × 0.9 = 4.5A. Since the input current-limit
accuracy of the MAX17005/MAX17006/MAX17015 is
3ꢀ, the typical value of the input current limit should
be set at 4.5A/1.03 ≈ 4.36A. The lower limit for input
current must also be considered. For chargers at the
low end of the spec, the input current limit for this
example could be 4.36A × 0.95 or approximately 4.14A.
I
= I
+ (1/2) ΔIL
SAT
CHG
The ripple current is determined by:
2
k × V
IN
ΔIL =
4L
Input Capacitor Selection
The input capacitor must meet the ripple current
requirement (I
) imposed by the switching currents.
RMS
Nontantalum chemistries (ceramic, aluminum, or
OS-CON) are preferred due to their resilience to power-
up and surge currents:
⎛
⎜
⎞
⎟
V
× V
− V
(
)
BATT
DCIN BATT
IRMS = ICHG ×
V
⎜
⎝
⎟
⎠
DCIN
Layout and Bypassing
Bypass DCIN with a 0.1μF ceramic to ground (Figure 1).
N1 and N2 protect the MAX17005/MAX17006/
MAX17015 when the DC power source input is reversed.
The input capacitors should be sized so that the tem-
perature rise due to ripple current in continuous con-
duction does not exceed approximately 10°C. The
maximum ripple current occurs at 50ꢀ duty factor or
Bypass V , CSSP, and LDO as shown in Figure 1.
AA
Good PCB layout is required to achieve specified noise
immunity, efficiency, and stable performance. The PCB
layout designer must be given explicit instructions—
preferably, a sketch showing the placement of the
power switching components and high current routing.
Refer to the PCB layout in the MAX17005/MAX17006/
MAX17015 evaluation kit for examples. A ground plane
is essential for optimum performance. In most applica-
tions, the circuit is located on a multilayer board, and
full use of the four or more copper layers is recom-
mended. Use the top layer for high-current connec-
tions, the bottom layer for quiet connections, and the
inner layers for an uninterrupted ground plane.
V
DCIN
= 2 x V
, which equates to 0.5 x I
. If the
BATT
CHG
6/MAX7015
application of interest does not achieve the maximum
value, size the input capacitors according to the worst-
case conditions.
Output Capacitor Selection
The output capacitor absorbs the inductor ripple cur-
rent and must tolerate the surge current delivered from
the battery when it is initially plugged into the charger.
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter
and to ensure the stability of the DC-to-DC converter
(see the Compensation section.) Beyond the stability
requirements, it is often sufficient to make sure that the
output capacitor’s ESR is much lower than the battery’s
ESR. Either tantalum or ceramic capacitors can be
used on the output. Ceramic devices are preferable
because of their good voltage ratings and resilience to
surge currents. Choose the output capacitor based on:
Use the following step-by-step guide:
1) Place the high-power connections first, with their
grounds adjacent:
a) Minimize the current-sense resistor trace lengths,
and ensure accurate current sensing with Kelvin
connections.
I
RIPPLE
C
=
× k
CAP−BIAS
b) Minimize ground trace lengths in the high-current
paths.
OUT
f
× 8 × ΔV
BATT
SW
20 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
c) Minimize other trace lengths in the high-current
capacitor). Important: the IC must be no further than
paths.
10mm from the current-sense resistors. Quiet con-
nections to V and CC should be returned to a sep-
AA
d) Use > 5mm wide traces in the high-current
paths.
arate ground (GND) island. There is very little current
flowing in these traces, so the ground island need not
be very large. When placed on an inner layer, a siz-
able ground island can help simplify the layout
because the low-current connections can be made
through vias. The ground pad on the backside of the
package should also be connected to this quiet
ground island.
e) Connect C to high-side MOSFET (10mm max
IN
length).
f) Minimize the LX node (MOSFETs, rectifier cath-
ode, inductor (15mm max length)). Keep LX on
one side of the PCB to reduce EMI radiation.
Ideally, surface-mount power components are flush
against one another with their ground terminals
almost touching. These high-current grounds are
then connected to each other with a wide, filled
zone of top-layer copper, so they do not go through
vias. The resulting top-layer subground plane is
connected to the normal inner-layer ground plane
at the paddle. Other high-current paths should also
be minimized, but focusing primarily on short
ground and current-sense connections eliminates
about 90ꢀ of all PCB layout problems.
3) Keep the gate drive traces (DHI and DLO) as short
as possible (L < 20mm), and route them away from
the current-sense lines and V . These traces
AA
should also be relatively wide (W > 1.25mm).
4) Place ceramic bypass capacitors close to the IC.
The bulk capacitors can be placed further away.
Place the current-sense input filter capacitors under
the part, connected directly to the GND pin.
5) Use a single-point star ground placed directly
below the part at the PGND pin. Connect the power
ground (ground plane) and the quiet ground island
at this location.
2) Place the IC and signal components. Keep the
main switching node (LX node) away from sensitive
analog components (current-sense traces and V
AA
______________________________________________________________________________________ 21
1.2MHz Low-Cost,
High-Performance Chargers
Minimal Operating Circuit
SYSTEM
ADAPTER
ADAPTER
DCIN
CSSP
CSSN
BST
BATT
DHI
LX
LDO
DLO
V
AA
PGND
CSIP
GND
IINP
MAX17005
MAX17006
MAX17015
BATTERY
CSIN
VCTL
ISET
BATT
CC
ACIN
ACOK
Chip Information
TRANSISTOR COUNT: 12,990
Pin Configuration
6/MAX7015
PROCESS: BiCMOS
TOP VIEW
15
14
13
12
11
ISET
10
9
LX 16
ACIN 17
CSSN
MAX17005
MAX17006
MAX17015
18
19
20
8
CSSP
ACOK
BATT
V
AA
CC
7
EXPOSED PADDLE
6
VCTL
1
2
3
4
5
THIN QFN
4mm x 4mm
22 ______________________________________________________________________________________
1.2MHz Low-Cost,
High-Performance Chargers
6/MAX7015
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
______________________________________________________________________________________ 23
1.2MHz Low-Cost,
High-Performance Chargers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
6/MAX7015
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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