MAX14890EATJ+T [MAXIM]
Line Receiver,;
| 型号： | MAX14890EATJ+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Line Receiver, 接口集成电路 |
| 文件： | 总30页 (文件大小：829K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
General Description
The MAX14890E incremental encoder receiver contains
four differential receivers and two single-ended receivers.
Benefits and Features
● High Flexibility Supports All Encoder Types
• Selectable RS-422/HTL/TTL/DI Receivers
• RS-422/TTL Switching Rates Up to 35Mbps
• HTL Switching Rates Up to 400kHz
The differential receivers can be operated in RS-422 or
differential high-threshold logic (HTL) modes and are
optionally configurable for single-ended TTL/HTL operation.
The MAX14890E features a wide common mode input
range of -20V to +20V in RS-422 mode.
• SPI or Pin-Controlled Operation
• SPI Interface Allows Per-Receiver Configuration
• 1.62V to 5.5V Logic Interface
● Integrated Fault Detection Reduces Down-Time
• Open-Wire and Short-Circuit Detection
The auxiliary IEC 61131-2 Type-1/Type-3 digital inputs
are designed for operation with switches or proximity
sensors and can be individually configured for TTL operation.
• Overvoltage and Undervoltage Fault Detection
● Integrated Protection Ensures Robust
Communication
All receiver input signals are fault protected to voltage shorts
in the ±40V range. Per channel fault detection provides
warning of irregular conditions such as small differential
signals, shorts, opens, overvoltages, and undervoltages.
• ±40V Fault Protection Range
• ±20V RS-422 Common Mode Range
• DI Glitch Filters
The MAX14890E features a pin-selectable SPI or parallel-
logic interface. SPI control provides detailed diagnostics
and individual configurations for receivers.
• ±25kV HBM ESD
• ±7kV Air-Gap per IEC 61000-4-2 ESD
• ±10kV Contact per IEC 61000-4-2 ESD
• -40°C to +125°C Operating Temperature Range
The MAX14890E is available in a 32-pin TQFN-EP (5mm
x 5mm) and operates over the -40°C to +125°C tempera-
ture range.
Applications
● Encoder Interfaces
● Motor Controllers
● Pulse Counters
Ordering Information appears at end of data sheet.
● Servo Control Commutation
Typical Operating Circuit
3.3V to 5V
5V
VCC
Input Receiver Modes
VL
ENCODER
MODE
RS-422
D-HTL
SE-HTL
TTL
RxA RxB RxZ RxY RxDI2 RxDI3
A
A
B
B
AO
RxA
RxB
RS-422 A
RS-422 B
RS-422 Z
120Ω
120Ω
5V
5V
5V
5V
√
√
√
√
√
√
√
√
√
√
√
√
√
√
AFAULT
BO
BFAULT
Z
ZO
ZFAULT
YO
RxZ
RxY
120Ω
Z
√
√
√
√
√
√
DIY
DI
ASIC
TTL ALARM
DO
YFAULT
LO2
DI2
DI3
PROXIMITY
SENSOR
RxD2
DO
LO3
PROXIMITY
SENSOR
RxD3
SNGL/CLK = 0
TTL/SDI = 1
DI/TTLY = 1
DI/TTL2 = 1
DI/TTL3 = 1
MAX14890
COUNTER/
MOTOR
CONTROLLER
ENCODER CIRCUIT WITH RS-422 SIGNALS AND TTL ALARM SIGNAL
19-7536; Rev 0; 3/15
MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Absolute Maximum Ratings
(All voltages referenced to GND)
Short-Circuit Duration (_O, _FAULT, LO2,
V
V
..........................................................................-0.3V to +6V
............................................................-0.3V to (V
D2FAULT/IRQ, LO3, D3FAULT/SDO to GND) .....Continuous
CC
+ 0.3V)
Continuous Power Dissipation (T = +70°C)
L
CC
L
A
AO, BO, ZO, YO, LO, LO2, LO3.................-0.3V to (V + 0.3V)
_FAULT, D2FAULT/IRQ...........................................-0.3V to +6V
D3FAULT/ SDO (SPI is High)......................-0.3V to (V + 0.3V)
D3FAULT/SDO (SPI is Low) ..................................-0.3V to +6V
TTL/SDI, SNGL/SCLK, HITH/CS, DI/TTLY,
DI/TTL2, DI/TTL3, SPI........................................-0.3V to +6V
A, A, B, B, Z, Z, DIY, Y, DI2, DI3............................-40V to +40V
Thin QFN (derate 19mW/°C above +70°C)...............1520mW
Operating Temperature Range......................... -40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (Soldering, 10s).................................+300°C
Soldering Temperature (Reflow)......................................+260°C
L
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
(Note 1)
Package Thermal Characteristics
Junction-to-Ambient Thermal Resistance (θ ) ..............36°C/W
Junction-to-Case Thermal Resistance (θ ).....................3°C/W
JC
JA
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC L
CC
L
CC
A
T
= +25°C.) (Notes 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
4.5
TYP
MAX
UNITS
POWER SUPPLY
Supply Voltage
V
5.5
14
V
mA
V
CC
Supply Current
I
Outputs not switching, no load
9
CC
Logic Supply Voltage
V
1.62
-200
5.5
L
RS-422 RECEIVERS (RxA, RxB, RxZ, RxY)
Differential Threshold Voltage
Differential Input Hysteresis
V
-20V ≤ V
-20V ≤ V
≤ +20V
≤ +20V
+200
+160
mV
mV
TH
CM
ΔV
230
+100
-170
TH
CM
V
V
= +10V
= -10V
IN
Single-Ended Input Current
I
V
= 0V or 5V
μA
mV
V
IN
CC
-270
+270
-460
+15
IN
V
V
-20V ≤ V
-20V ≤ V
Positive
Negative
≤ +20V, positive
≤ +20V, negative
+460
-270
+18
-15
Low Differential Voltage Fault
Threshold
TH_DFP
CM
TH_DFN
CM
V
V
Single-Ended Input Fault
Threshold
TH_SELP
-18
TH_SELN
DIFFERENTIAL HTL RECEIVERS (RxA, RxB, RxZ)
Differential Threshold Voltage
Differential Input Hysteresis
V
0V ≤ V
0V ≤ V
≤ +25V
-900
-270
+900
+460
mV
V
TH
CM
ΔV
≤ +25V
1
TH
CM
V
V
= +24V
= -10V
+280
-170
TH
Single-Ended Input Current
I
μA
IN
TH
Maxim Integrated
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Electrical Characteristics (continued)
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC L
CC
L
CC
A
T
A = +25°C.) (Notes 2, 3 )
PARAMETER
SYMBOL
CONDITIONS
≤ +24V, Positive
≤ +24V, Negative
MIN
+1.2
-2.0
TYP
MAX
+2.0
-1.2
UNITS
V
V
0V ≤ V
0V ≤ V
Low Differential Voltage Fault
Threshold
TH_DFP
CM
V
V
TH_DFN
CM
Single-Ended Input Fault
Threshold
V
Negative
-18
-15
TH_SEN
SINGLE-ENDED HTL RECEIVERS (RxA, RxB, RxZ)
HITH is low
8
40
40
6
Input Logic High Voltage
Input Logic Low Voltage
V
V
V
IH_SE
HITH is high
HITH is low
HITH is high
13
-40
-40
V
IL_SE
11
Input Hysteresis
ΔV
270
mV
μA
μA
V
ITH_SE
Input Current (A, B, Z)
I
I
V
V
= 0V or normally powered, V = 24V
IN
460
460
-15
_HTL
_HTL
CC
= 0V or normally powered, V = 24V
IN
Input Current (A, B, Z)
Fault Threshold Voltage
CC
V
-18
TH_HTLF
TTL RECEIVERS (RxA, RxB, RxZ, RxY, RxD2, RxD3)
V
Input High Voltage
Input Low Voltage
Input Hysteresis
TTL mode
2.0
-40
40
V
V
V
IH_TTL
V
TTL mode
TTL mode
0.8
IL_TTL
V
0.53
HY_TTL
Input Current (A, B, Z, DIY, DI2,
DI3)
I
I
TTL mode, V
= 0V or 5V, V = 5V
IN
85
_TTL
_TTL
CC
μA
Input Current (A, B, Z, Y)
TTL mode, V
Negative
= 0V or 5V, V = 5V
IN
85
-15
+18
CC
-18
Fault Threshold Voltage
V
V
TH_TTLF
Positive
+15
DIGITAL INPUT RECEIVERS (DI2, DI3, RxY, RxZ)
Input High Voltage
Input Low Voltage
Input Hysteresis
V
DI mode, HITH is high or low
DI mode, HITH is high or low
DI mode, HITH is high or low
8
40
V
V
V
IH_DI
V
-40
5.5
IL_DI
V
1.2
HY_DI
Maxim Integrated
│ 3
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Electrical Characteristics (continued)
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC
L
CC
A
CC L
T = +25°C.) (Notes 2, 3)
A
PARAMETER
Current Sink
SYMBOL
CONDITIONS
DI mode, 0V ≤ V ≤ 5V
MIN
0
TYP
MAX
2.6
UNITS
DI
I
mA
V
DI
DI mode, 8V ≤ V ≤ 40V
2
2.5
3.3
DI
Fault Threshold Voltage
V
DI mode
-18
-15
TH_DIF
LOGIC INTERFACE (AO, AFAULT, BO, BFAULT, ZO, ZFAULT, YO, YFAULT, LO2, D2FAULT/IRQ, LO3, D3FAULT/SDO, DI/
TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI, SNGL/CLK, HITH/CS)
DI/TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI,
SNGL/CLK, HITH/CS
2/3 x
V
L
Input High Voltage
Input Low Voltage
Input Current
V
V
V
IH
DI/TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI,
SNGL/CLK, HITH/CS
1/3 x
V
L
V
IL
DI/TTLY, DI/TTL2, DI/TTL3, SPI, TTL/SDI,
SNGL/CLK, HITH/CS
I
-1
+1
μA
IN
AO, BO, ZO, YO, LO2, LO3, AO, BO, ZO,
YO, LO2, LO3, D2FAULT/IRQ, D3FAULT/
V -
L
0.4V
Output High Voltage
Output Low Voltage
V
V
V
OH
SDO, I
= -3mA (Note 4)
OUT
AO, BO, ZO, YO, LO2, LO3, D3FAULT/
SDO, AFAULT, BFAULT, ZFAULT,
V
0.4
OL
YFAULT, D2FAULT/IRQ, I
= +3mA
OUT
PROTECTION
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
T
Temperature rising
+160
10
°C
°C
SHDN
T
HYST
Fault-Protected Input Voltage
Range (A, A, B, B, Z, Z, DIY, Y,
DI2, DI3)
V
IN_F
-40
+40
V
IEC 61000-4-2 Air-Gap Discharge to GND
IEC 61000-4-2 Contact Discharge to GND
Human body model
±7
±10
±25
±2
ESD Protection (A, A, B, B, Z, Z,
DIY, Y, DI2, DI3)
kV
kV
ESD Protection (all other pins)
Human body model
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC L
CC
L
CC
A
T = +25°C.) (Notes 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RECEIVER (RxA, RxB, RxZ) (Note 4)
RS-422 Maximum Data Rate
DR
t
RS-422 mode
RS-422 mode, C = 15pF, V = ±3V,
35
Mbps
ns
MAX422
25
25
RS-422 Receiver Propagation
Delay
DPLH_422
DPHL_422
L
ID
Figures 1, 2
t
RS-422 Receiver Propagation De-
t
RS-422 mode, C = 15pF, V = ±3V,
Figures 1, 2
HL-
SKEW_422
L
ID
0
0
1
5
8
ns
ns
lay Skew |t
- t
DPLH_422 DPHL_422|
RS-422 Receiver Channel-to-
Channel Skew
|t
RS-422 mode, C = 15pF, V = ±3V,
C-
SKEW_422
L
ID
|
Figures 1, 2
D-HTL mode
Differential HTL (D-HTL) Maximum
Differential Data Rate
DR
Mbps
ns
DHTL
t
t
100
100
D-HTL Receiver Propagation
Delay
D-HTL mode, C = 15pF, V = ±24V,
L ID
Figures 1, 2
DPLH_DHTL
DPHL_DHTL
D-HTL Differential Receiver
Propagation Delay Skew
t
D-HTL mode, C = 15pF, V = ±24V,
Figures 1, 2
HLSKEW_
DHTL
L
ID
0
20
8
ns
|t
- t
DPLH_DHTL DPHL_DHTL|
D-HTL Differential Receiver
Channel-to-Channel Skew
|t
CSKEW_
D-HTL mode, C = 15pF, V = ±24V,
L
ID
0
ns
|
Figures 1, 2
DHTL
Single-Ended (SE-HTL) Maximum
Switching Rate
SR
SE-HTL mode, HITH is high or low
400
kHz
SEHTL
t
DPLH_
0
0
100
100
SE-HTL Receiver Propagation
Delay
SEHTL
SE-HTL mode, HITH is high or low,
ns
ns
C = 15pF, 0V ≤ V ≤ +24V, Figures 1, 2
t
L
IN
DPHL_
SEHTL
SE-HTL Receiver Propagation
Delay Skew
SE-HTL mode,
HITH is low
HITH is high
0
0
28
20
t
HLSKEW_
SEHTL
C = 15pF,
L
|t
- t
|
0V ≤ V ≤ +24V
IN
DPLH_SEHTL DPHL_SEHTL
SE-HTL Receiver Channel-to-
Channel Skew
|t
SE-HTL mode, HITH is high or low,
CSKEW_
0
11
ns
kHz
ns
|
C = 15pF, 0V ≤ V ≤ +24V, Figures 1, 2
SEHTL
L
IN
TTL Maximum Switching Rate
TTL Receiver Propagation Delay
SR
TTL mode
400
TTL
t
t
100
100
TTL mode, C = 15pF, 0V ≤ V ≤ +5V,
DPLH_TTL
DPHL_TTL
L
IN
Figures 1, 2
TTL Receiver Propagation Delay
t
TTL mode, C = 15pF, 0V ≤ V ≤ +5V,
Figures 1, 2
HLSKEW_
TTL
L
IN
0
52
ns
Skew (t
- t
)
DPLH_TTL DPHL_TTL
Maxim Integrated
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics (continued)
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC
L
CC
A
CC L
T
= +25°C.) (Notes 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
TTL mode, C = 15pF, 0V ≤ V ≤ +5V,
MIN
TYP
MAX
UNITS
TTL Receiver Channel-to-Channel
Skew
|t
CSKEW_
L
IN
0
11
ns
|
Figures 1, 2
RxZ only, DI mode, SPI = high
RxZ only, DI mode, SPI = high, C = 15pF,
TTL
Digital Input (DI) Maximum
Switching Rate
SR
400
kHz
ns
DZ
t
t
300
300
DPLH_DZ
L
DI Propagation Delay
0V ≤ V ≤ +24V, Figures 1, 2
IN
DPHL_DZ
DI Receiver Propagation Delay
RxZ only, DI mode, SPI = high, C = 15pF,
L
t
0
28
80
ns
RSKEW_DZ
Skew |t
- t
|
0V ≤ V ≤ +24V, Figures 1, 2
DPLH_DZ DPHL_DZ
IN
DI Maximum Glitch Duration for
Glitch Rejection
t
GL
RxZ only, DI mode, SPI = high
RxZ only, DI mode, SPI = high
ns
ns
t
DI Admitted Pulse Duration
RECEIVER (RxY) (Note 5)
RS-422 Maximum Data Rate
PASS
300
35
DR
t
RS-422 mode
Mbps
ns
MAX422
25
25
RS-422 Receiver Propagation
Delay
RS-422 mode, C = 15pF, V = ±3V,
DPLH_422
DPHL_422
L
ID
Figures 1, 2
t
ns
RS-422 Receiver Propagation Delay
t
RS-422 mode, C = 15pF, V = ±3V,
Figures 1, 2
HL-
SKEW_422
L
ID
0
5
8
ns
Skew |t
- t
|
DPLH_422 DPHL_422
RS-422 Receiver Channel-to-
Channel Skew
|t
RS-422 mode, C = 15pF, V = ±3V,
C-
SKEW_422
L
ID
0
ns
kHz
ns
|
Figures 1, 2
TTL mode
TTL Maximum Switching Rate
TTL Receiver Propagation Delay
SR
400
TTL
t
t
100
100
TTL mode, C = 15pF, 0V ≤ V ≤ +5V,
DPLH_TTL
DPHL_TTL
L
IN
Figures 1, 2
TTL Receiver Propagation Delay
t
TTL mode, C = 15pF, 0V ≤ V ≤ +5V,
HLSKEW_
TTL
L
IN
0
52
ns
kHz
ns
Skew |t
t
|
Figures 1, 2
DI mode
DPLH_TTL - DPHL_TTL
Digital Input (DI) Maximum
Switching Rate
SR
400
DY
t
DPLH_DY
300
300
DI mode, C = 15pF, 0V ≤ V ≤ +24V,
L
IN
DI Propagation Delay
t
Figures 1, 2
DPHL_DY
Maxim Integrated
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics (continued)
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC
L
CC
A
CC L
T
= +25°C.) (Notes 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
DI mode, C = 15pF, 0V ≤ V ≤ +24V,
MIN
TYP
MAX
UNITS
DI Receiver Propagation Delay
Skew |t - t
L
IN
t
0
100
ns
RSKEW_DY
|
Figures 1, 2
DPLH_DY DPHL_DY
DI Maximum Glitch Duration for
Glitch Rejection
t
GL
DI/TTLY is high or low
DI/TTLY is high or low
80
ns
ns
t
DI Admitted Pulse Duration
PASS
300
20
RECEIVER (DI2, DI3) (Note 5)
Digital Input (DI) Maximum
Switching Rate
SR
DI mode
kHz
DI
t
t
5
5
DI mode, C = 15pF, 0V ≤ V ≤ +24V,
Figures 1, 2
DPLH_DI
L
IN
DI Propagation Delay
μs
DPHL_DI
DI Receiver Propagation Delay
t
DI mode, C = 15pF
60
ns
ns
RSKEW_DI
L
Skew (t
- t
)
DPLH_DI DPHL_DI
Maximum Glitch Duration for Glitch
Rejection
t
DI mode, DI/TTL_ is high or low
80
GL
Admitted Pulse Length
t
DI mode, DI/TTL_ is high or low
TTL mode
350
20
ns
PASS
TTL Maximum Switching Rate
SR
kHz
DI_TTL
t
t
5
5
TTL mode, C = 15pF, 0V ≤ V ≤ +5V,
Figures 1, 2
DPLH_DITTL
DPHL_DITTL
L
IN
TTL Receiver Propagation Delay
μs
TTL Receiver Propagation Delay
t
HLSKEW_
DITTL
TTL mode, C = 15pF, Figures 1, 2
80
ns
L
Skew (t
- t
)
DPLH_DITTL DPHL_DITTL
FAULT DETECTION (AFAULT, BFAULT, ZFAULT, D2FAULT/IRQ, D3FAULT/SDO) (Note 5)
FLTR = 0
18
1400
6
R
C
= 5kΩ,
= 15pF,
t
FAULT
DFLH
FLTR = 1
FLTR = 0
FLTR = 1
Differential Fault Propagation
Delay to _FAULT Output Active
FAULT
μs
RS-422 and DHTL
modes, Figures 1, 4
t
DFHL
1400
R
= 5kΩ, C
= 15pF, FLTR = 0,
Differential Slew Rate to Avoid
Fault Alarm Output
FAULT
FAULT
1
V/μs
RS-422 and D-HTL modes, Figures 1, 4
t
Single Ended Propagation Delay
to _FAULT Output Active
SEFLH
1.4
1.4
R
= 5kΩ, C = 15pF, all modes
FAULT
FAULT
ms
t
SEFHL
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Switching Characteristics (continued)
(V
= 5V±10%, V = 1.62V to V , T = -40°C to +125°C unless otherwise noted. Typical values are at V
= 5V, V = 3.3V,
CC
L
CC
A
CC L
T
= +25°C.) (Notes 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING (Figure 5)
SNGL/CLK Clock Period
SNGL/CLK Pulse-Width High
SNGL/CLK Pulse-Width Low
t
80
25
25
ns
ns
ns
CH+CL
t
CH
t
CL
HITH/CS Fall to SNGL/CLK Rise
Time
t
15
ns
CSS
TTL/SDI Hold Time
TTL/SDI Setup Time
t
15
15
ns
ns
DH
t
DS
C = 10pF, SNGL/
CLK falling-edge
to D3FAULT/SDO
stable.
L
V ≥ 1.62V
32
28
L
Output Data Propagation Delay
t
ns
ns
DO
V ≥ 3.3V
L
V = 1.62V
L
24
2
Rising
Falling
V = 3.3V
L
D3FAULT/SDO Rise and Fall
Times
t
FT
V = 1.62V
11
1
L
V = 3.3V
L
V =1.62V or 3.3V
10
5
L
HITH/CS Hold Time
t
ns
ns
CSH
V = 5.5V
L
V = 1.62V or 3.3V
10
L
HITH/CS Pulse-Width High
t
CSPW
V = 5.5V
L
5
Note 2: All devices are 100% production tested at T = +25°C. Specifications over temperature are guaranteed by design.
A
Note 3: Currents into the device are positive; all currents out the device are negative. All voltages are referenced to ground, unless
otherwise noted.
Note 4: In pin-control mode, D3FAULT/SDO is open-drain. In SPI mode, D3FAULT/SDO is a push-pull output.
Note 5: Capacitive load includes test probe and fixture capacitance.
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Test Circuits and Waveforms
VL
VL
RFAULT
RFAULT
_FAULT
_O
_FAULT
CFAULT
CFAULT
IN
VIN
IN
VID
Rx
Rx
_O
VIN
CL
CL
IN
VIN
DIFFERENTIAL
SINGLE-ENDED
Figure 1. Receiver Test Circuit
RISE/FALL TIMES ≤2ns
RISE/FALL TIMES ≤2ns
+3V to +24V
+5V to +24V
VID
0V
0V
VIN
_O
VIH
VIL
-3V to -24V
VL
0V
VL
VL
2
VL
2
VL
2
VL
2
_O
VOL
VOL
tPLH
tPHL
tPLH
tPHL
SINGLE ENDED
DIFFERENTIAL
Figure 2. Receiver Propagation Delay
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Test Circuits and Waveforms (continued)
+3V to +24V
VTH_DFP
VID
0V
VTH_DFN
-3V to -24V
VL
VL
2
VL
2
_FAULT
VOL
tDFLH
tDFHL
Figure 3. Fault Detection Timing
HITH/CS
tCH
tCSH
tCSS
tCL
SNGL/CLK
tDS
tDH
TTL/SDI
tDO
D3FAULT/SDO
Figure 4. SPI Timing Diagram
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Typical Operating Characteristics
(V
= 5V, V = 3.3V, T = +25°C, unless otherwise noted.)
A
CC
L
RS-422 RECEIVER DIFFERENTIAL
THRESHOLD VOLTAGE
vs. COMMON MODE VOLTAGE
D-HTL RECEIVER DIFFERENTIAL
THRESHOLD VOLTAGE
vs. COMMON MODE VOLTAGE
SUPPLY CURRENT
vs. DATA RATE
toc01
toc02
toc03
14
200
150
100
50
1000
800
600
12
10
8
400
RS-422 MODE
HIGH
LOW
200
D-HTL MODE
HIGH
0
0
LOW
-200
-400
-600
-800
-1000
-50
-100
-150
-200
RxA and RxB switching, all other
inputs are low
6
0.1
1
10
-20 -15 -10
-5
0
5
10
15
20
0
5
10
15
20
25
DATA RATE (Mbps)
COMMON MODE VOLTAGE (V)
COMMON MODE VOLTAGE (V)
D-HTL MODE PROPAGATION DELAY
vs. TEMPERATURE
SE-HTL MODE PROPAGATION DELAY
vs. TEMPERATURE
toc06
RS-422AND TTL MODE PROPAGATION
DELAY vs. TEMPERATURE
toc04
toc05
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
TTL, tPHL
TTL, tPLH
HITH = GND, tPLH
HITH = VL, tPLH
tPLH
RS-422, tPHL
tPHL
HITH = GND, tPHL
RS-422, tPLH
HITH = VL, tPHL
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
RxY/RxZ DI MODE PROPAGATION
DELAY vs. TEMPERATURE
DI2/DI3 DI MODE PROPAGATION
DELAY vs. TEMPERATURE
DI INPUT CURRENT
vs. INPUT VOLTAGE
toc07
toc08
toc09
300
250
200
150
100
50
3.0
2.5
2.0
1.5
1.0
0.5
0.0
40
30
tPLH
20
tPLH
10
tPHL
0
-10
-20
-30
-40
tPHL
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
DI INPUT CURRENT(mA)
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Typical Operating Characteristics (continued)
(V
= 5V, V = 3.3V, T = +25°C, unless otherwise noted.)
A
L
CC
RECEIVER OUTPUT VOLTAGE
LOW vs. SINK CURRENT
RECEIVER OUTPUT VOLTAGE
HIGH vs. SOURCE CURRENT
_FAULTOUTPUT VOLTAGE
toc12
vs. SINK CURRENT
toc10
toc11
0.40
6
5
4
3
2
1
0
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
_FAULT is asserted.
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
VL = 3V
VL = 5V
VL = 3V
VL = 5V
0
10 20 30 40 50 60 70 80 90 100
SINK CURRENT (mA)
-225
-175
-125
-75
-25
0
5
10
15
20
25
SOURCE CURRENT (mA)
SINK CURRENT (mA)
LOW DIFFERENTIAL
INPUT FAULT
RS-422 MODE COMMON-MODE
VOLTAGE FAULT (HIGH)
RS-422 MODE COMMON MODE
VOLTAGE FAULT (LOW)
toc13
toc15
toc14
GND
A
200mV/div
AO
5V/div
GND
AO
5V/div
GND
AFAULT
2V/div
AFAULT
5V/div
AFAULT
5V/div
100µs/div
2ms/div
2ms/div
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
Z
Z
DIY
Y
*EP
DI/TTL2
DI2
VCC
LO3
DI3
MAX14890E
LO2
GND
B
DI/TTL3
A
+
B
A
1
2
3
4
5
6
7
8
TQFN
5mm x 5mm
* Exposed Pad. Connect to GND.
Pin Description
PIN
NAME
FUNCTION
Noninverting RS-422/HTL/TTL Receiver Input A.
1
AO
Open-Drain Fault Output for Receiver A. AFAULT asserts low during a fault condition on receiver A
(RxA) . See the Detecting Faults section for more information.
2
3
AFAULT
Receiver D3 Open-Drain Fault Output/SPI Serial Data Out.
In pin mode (SPI is low), D3FAULT/SDO asserts low during a fault condition on the D3 receiver. See
the Detecting Faults section for more information.
In SPI mode (SPI is high), D3FAULT/SDO is the SPI serial data output and is in a push-pull configura-
tion. D3FAULT/SDO is high-impedance in SPI mode with HITH/CS is high.
D3FAULT/
SDO
Single-Ended HTL Threshold Select Input/SPI Chip Select.
In pin mode (SPI is low), HITH/CS sets the input thresholds for the single-ended HTL signals. In this
mode, drive HITH/CS high to enable the 12V (typ) thresholds or drive HITH/CS low to enable the 7V
(typ) thresholds.
4
5
6
HITH/CS
In SPI mode (SPI is high), HITH/CS is the SPI chip select input.
Single-Ended Receiver Input Select/SPI Clock Input.
In pin mode (SPI is low), SNGL/CLK selects the mode for the inputs of receivers A,B, and Z. In this
SNGL/CLK mode, drive SNGL/CLK high to enable the receivers for single-ended TTL or HTL operation. Drive
SNGL/CLK low for differential (RS-422 or DHTL) operation. See the Truth Tables for more information.
In SPI mode (SPI is high), SNGL/CLK is the SPI clock input.
TTL Mode Select Input/SPI Serial Data Input.
In pin mode (SPI is low), enables TTL operation for receivers A, B, and Z. In this mode, drive TTL/SDI
high to enable TTL or RS-422 operation. Drive TTL/SDI low to select DHTL or SEHTL operation for
those receivers.
TTL/SDI
In SPI mode (SPI is high), TTL/SDI is the serial data input.
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Pin Description (continued)
PIN
NAME
FUNCTION
Receiver D2 Open-Drain Fault Output/SPI IRQ Output.
D2FAULT/ In pin mode (SPI is low), D2FAULT/IRQ asserts low during a fault condition on the D2 receiver (RxD2).
7
IRQ
In SPI mode (SPI is high), D2FAULT/IRQ asserts low when a fault bit is set. See the Serial SPI Control
section for more information.
8
BO
B
Receiver B Output.
9
Non-Inverting RS-422/HTL/TTL Input for Receiver B.
Inverting Input for Receiver B. B is only used when differential mode is enabled.
Ground
10
11
12
13
B
GND
LO2
DI2
Receiver DI2 Output.
Digital/TTL Input for DI2 Receiver.
Digital Input/TTL Select Input for DI2 Receiver. See the Truth Tables for more information. DI/TTL2 has
no function in SPI mode (SPI is high).
14
DI/TTL2
15
16
17
Y
Inverting RS-422 Input for Receiver Y. Y is used only when differential mode is enabled.
Digital/TTL/Non-inverting RS-422 Input for Receiver Y.
Receiver Y Output.
DIY
YO
Digital Input/TTL/RS-422 Select Input for Receiver Y. See the Truth Tables for more information. DI/
TTLY has no function in SPI mode (SPI is high).
18
19
20
DI/TTLY
YFAULT
ZFAULT
BFAULT
Open-Drain Fault Output for Receiver Y. YFAULT asserts low during a fault condition on receiver Y.
See the Fault Conditions section for more information.
Open-Drain Fault Output for Receiver Z. ZFAULT asserts low during a fault condition on receiver Z.
See the Fault Conditions section for more information.
Open-Drain Fault Output for Receiver B. BFAULT asserts low during a fault condition on receiver B.
See the Fault Conditions section for more information.
21
22
23
V
Logic Interface Supply Input. V
must always be greater than or equal to V .
CC L
L
Serial/Parallel Select Input. Drive SPI low to enable pin-mode operation. Drive SPI high to enable SPI
mode operation.
SPI
24
25
26
ZO
Z
Receiver Z Output.
Non-Inverting RS-422/HTL/TTL Input for Receiver Z.
Inverting Input for Receiver Z. Z is only used when the receiver is configured for differential mode.
Z
Supply Input. Bypass V
to ground through a 0.1μF capacitor as close to the device as possible.
CC
27
V
CC
V
must always be greater than or equal to V .
L
CC
28
29
LO3
DI3
Receiver D3 Output.
Digital/TTL Input for the D3 Receiver.
Digital Input/TTL Select Input for the D3 Receiver. See the Truth Tables for more information. DI/TTL3
has no function in SPI mode (SPI is high).
30
DI/TTL3
31
32
-
A
A
Inverting Input for Receiver A. A is used only when differential mode is enabled.
Non-inverting RS-422/HTL/TTL Input for Receiver A.
EP
Exposed pad. Connect EP to ground. Not intended as the primary ground connection.
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Truth Tables
Table 1. RxA, RxB, RxZ and RxY Receiver Settings (Pin-Control Mode)
INPUTS
RECEIVER OPERATION
RxA, RxB, RxZ
SNGL/CLK
TTL/SDI
DI/TTLY
RxY
TTL
DI
L
L
L
L
L
H
L
D-HTL
D-HTL
RS-422
RS-422
SE-HTL
SE-HTL
TTL
L
H
H
L
RS-422
DI
L
H
L
H
H
H
H
TTL
DI
L
H
L
H
H
TTL
DI
H
TTL
Table 2. RxD2 Receiver Settings (Pin-
Control Mode)
Table 3. RxD3 Receiver Input Settings
(Pin-Control Mode)
RxD2 MODE OF
OPERATION
RxD3 MODE OF
OPERATION
DI/TTL2
DI/TTL3
L
TTL
DI
L
TTL
DI
H
H
Table 4. DI Mode Receiver Logic (RxY, RxD2, RxD3)
DIY, DI2, DI3
-40V < V ≤ -18V
YO, LO2, LO3
_FAULT
L
L
IN
-18V < V < -15V
L
Indeterminate
IN
-15V < V < +6V
L
Indeterminate
H
H
H
H
IN
+6V < V < +8V
IN
+8V ≤ V < +40V
IN
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 5. Single-Ended TTL Mode Receiver Logic
INPUT
(A, B, Z, DIY, DI2, DI3)
OUTPUT
(AO, BO ZO, YO, LO2, LO3 )
_FAULT
FAULT CONDITION
-40V < V < -18V
L
L
Low Input Fault
Indeterminate
No Fault
IN
-18V < V < -15V
L
Indeterminate
IN
-15V < V < +0.8V
L
H
IN
+0.8V < V < +2.0V
Indeterminate
H
No Fault
IN
+2.0V ≤ V < +15V
H
H
H
H
No Fault
IN
+15V ≤ V < +18V
Indeterminate
L
Indeterminate
High Input Fault
IN
+18V ≤ V < +40V
IN
Table 6. SE-HTL Mode Receiver Logic (RxA, RxB, RxZ)
INPUT VOLTAGE
(A, B, Z)
OUTPUT STATE
(AO, BO, ZO)
HITH
_FAULT
FAULT CONDITION
L
L
-40V < V < -18V
L
L
Low Input Fault
Indeterminate
No Fault
IN
-18V < V < -15V
L
Indeterminate
IN
L
-15V < V < +6V
L
H
IN
L
+6V < V < +8V
Indeterminate
H
No Fault
IN
L
+8V ≤ V < +40V
H
H
No Fault
IN
H
H
H
H
H
-40V < V < -18V
L
L
Low Input Fault
Indeterminate
No Fault
IN
-18V < V < -15V
L
Indeterminate
IN
-15V < V < +11V
L
Indeterminate
H
H
H
H
IN
+11V < V < +13V
No Fault
IN
+13V ≤ V < +40V
No Fault
IN
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 7. D-HTL Mode Receiver Logic (RxA, RxB, RxZ)
SINGLE-ENDED INPUT
DIFFERENTIAL
INPUT VOLTAGE
OUTPUT STATE
(AO, BO, ZO)
VOLTAGE
(A, A, B, B, Z, Z)
_FAULT
FAULT CONDITION
V
> +2V
H
H
No Fault
Indeterminate
ID
+1.2V < V < +2V
H
Indeterminate
ID
-10V < V
SE
-0.9V ≤ V ≤ +0.9V
Indeterminate
L
Low Differential Input Voltage Fault
Indeterminate
ID
-2V ≤ V ≤ -1.2V
L
Indeterminate
ID
V
≤ -2V
L
H
No Fault
ID
X
X
-18V < V < -15V
VALID*
VALID*
Indeterminate
L
Single-Ended Voltage Fault
Single-Ended Voltage Fault
SE
-40V < V < -18V
SE
X = Don’t care
*Receiver operates normally, although thresholds may deviate from limits in Electrical Characteristics Table
Table 8. RS-422 Mode Receiver Logic (RxA, RxB, RxZ, RxY)
OUTPUT
SINGLE-ENDED
INPUT VOLTAGE
(A, A, B, B, Z, Z, Y, Y)
DIFFERENTIAL INPUT
STATE
(AO, BO,
ZO, YO)
_FAULT
FAULT CONDITION
VOLTAGE
V
> +0.45V
H
H
No Fault
Indeterminate
ID
+0.27V < V < +0.45V +0.45V
H
Indeterminate
ID
-20V ≤ V ≤ +20V
SE
-0.2V ≤ V ≤ +0.2V
Indeterminate
L
Low Differential Input Voltage Fault
Indeterminate
ID
-0.45V ≤ V ≤ -0.27V
L
L
Indeterminate
ID
V
≤ -0.45V
H
L
No Fault
ID
X
-40V < V < -18V
VALID*
Single-Ended Voltage Fault
SE
Single-Ended Indeterminate
Voltage
X
-18V < V < -15V
VALID*
Indeterminate
SE
Single-Ended Indeterminate
Voltage
X
X
+15V < V < +18V
VALID*
VALID*
Indeterminate
L
SE
+18V < V < +40V
Single-Ended Voltage Fault
SE
X = Don’t care
*Receiver operates normally, although thresholds may deviate from limits in Electrical Characteristics Table
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
In pin-control mode, drive the TTL/SDI input low and the
SNGL/CLK input high to enable SE-HTL mode on the
RxA, RxB, and RxZ receivers.
Detailed Description
The MAX14890E is an incremental encoder receiver
containing four differential receivers and two single-ended
receivers. All four differential receivers support RS-422
and TTL operation. Three of these differential receivers
can be configured for differential and single-ended HTL
operation. In RS-422 mode, these receivers feature a
wide common mode input range of -20V to +20V making
it resilient to common mode noise.
In SPI mode, each of the RxA, RxB, and RxZ receivers
can be individually enabled for SE-HTL functionality. See
the Serial SPI Control section for more information.
Differential HTL (D-HTL) Operation
The RxA, RxB, and RxZ receivers can be configured
for D-HTL operation. Input signals up to ±40V can be
accepted in D-HTL mode.
The auxiliary IEC 61131-2 Type-1/Type-3 24V digital
inputs allow connection of proximity sensors. The digital
inputs can be individually configured for TTL operation.
In pin-control mode, set the SNGL/CLK and TTL/SDI
inputs low to enable D-HTL functionality for the RxA, RxB,
and RxZ receivers. See the Truth Tables section for more
information.
All receiver input signals are fault protected to voltage
shorts in the ±40V range. Per channel fault detection pro-
vides warning of irregular conditions, like small differential
signals, shorts, opens, over- and undervoltages.
In SPI mode, each of the RxA, RxB, and RxZ receivers
can be individually enabled for D-HTL functionality. See
the Serial SPI Control section for more information.
SPI or Pin-Control Mode Selection
The MAX14890E provides a selectable SPI or pin inter-
face to set the input thresholds and functionality of the
receivers. Drive SPI high to use the SPI interface. Drive
SPI low to use the pin interface.
RS-422 Operation
The RxA, RxB, RxZ, and RxY receivers can be configured
for RS-422 operation. These receivers include a wide
common-mode input range (-20V to +20V) in this mode.
SPI mode allows for higher flexibility by allowing individual
receiver configuration. See the Serial SPI Control section
for more information.
In pin-control mode, set the SNGL/CLK input low and the
TTL/SDI input high to enable RS-422 functionality for the
RxA, RxB, RxZ, and RxY receivers. See the Truth Tables
section for more information.
TTL Operation
All 6 of the receivers can be configured for single-ended TTL
operation. Complimentary/unused inputs can be left uncon-
nected in all single-ended modes like TTL, DI, and SE-HTL.
In SPI mode, each receiver can be individually enabled
for RS-422 functionality. See the Serial SPI Control sec-
tion for more information.
In pin-control mode, drive the TTL/SDI and SNGL/CLK
inputs high to enable TTL operation on the RxA, RxB, and
RxZ receivers. To enable TTL operation on RxY receiver, set
DI/TTLY low. To enable TTL operation on the RxD2 or RxD3
receivers, drive the DI/TTL2 or DI/TTL3 inputs low. See the
Truth Tables section for more information.
Equivalent Input Circuit
In RS-422, TTL, SE-HTL, and D-HTL modes, the inputs
pins have the equivalent circuit shown in Figure 5. When
the RxA, RxB, RxZ, and/or RxY inputs are configured for
TTL mode and are open/not connected, the input is pulled
up to 2.64V (typ), resulting in a logic high on the receiver
output.
RxD2 and RxD3 have high impedance inputs in TTL
mode (Figure 6). Leaving DI2 or DI3 unconnected in this
mode will result in an unknown logic state on the receiver
output .
In SPI mode, each receiver can be enabled for TTL opera-
tion individually. Set the associated _SNGL and _TTL bits
to enable TTL mode for each receiver. See the Serial SPI
Control section for more information.
Single-Ended HTL Operation (SE-HTL)
Detecting Faults
The RxA, RxB, and RxZ receivers can be configured for
single-ended HTL operation. Complimentary/unused inputs
can be left unconnected in all single-ended modes (TTL, DI,
and SE-HTL).
Signal integrity from the encoder is essential for reliable
system operation. Degraded signals could cause prob-
lems ranging from simple miscounts to loss of position.
The MAX14890E detects common RS-422/HTL/TTL/DI
faults. These faults include low differential input signals,
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
open-wire, short-circuits and input voltages that are outside
normal operating voltage ranges (below -18V and above
+18V). See the Truth Tables for more information.
Detecting Small Differential Signals
A
A
In RS-422 and differential HTL (D-HTL) modes, the
receivers detect small DC and AC signals. Small DC sig-
nals can occur due to open wires or shorts, both of which
are explained in the following sections. Small differential
AC signals can result due to cable attenuation of long or
inadequate cables, or due to poor wiring.
NORMAL OPERATION
SHORT CIRCUIT A TO A
Detecting Short Circuit and Open-Circuit Faults
(RS-422 and D-HTL Operation)
Figure 7. Short Circuit Detection
The MAX14890E receivers detect short circuits on the
inputs in RS-422 and D-HTL modes. When the A and A
inputs are shorted together, the differential input voltage is
0V, generating a low differential input voltage fault (Figure 7).
Open-circuit detection is similar to detecting a short-circuit
condition and relies on the differential termination resistor
across the receiver inputs. When an input is open, the
termination resistor pulls the non-inverting and inverting
inputs to the same voltage, generating a fault condition.
The _FAULT output asserts when either a short-circuit or
open-circuit conditions is detected.
Thermal Shutdown
The MAX14890E enters thermal shutdown when the chip
temperature rises to above 160°C (typ). Receiver outputs
are undefined and the _FAULT outputs are off when the
device is in thermal shutdown.
Serial SPI Control
SPI Interface
The MAX14890E can be configured and monitored through
an SPI interface. The SPI interface allows for greater flex-
ibility for independent receiver mode configuration.
MAX14890E
2.64V
72.5kΩ
Drive the SPI input high to enable SPI functionality. The
AFAULT, BFAULT, ZFAULT, YFAULT and receiver out-
puts (AO, BO, ZO, YO, LO2 and LO3) are operational in
SPI mode. All configuration bits are 0 (default) when SPI
is pulled high, setting RxA, RxB, and RxZ in D-HTL mode,
RxY in RS-422 mode, and RxD2 and RxD3 in TTL mode.
After SPI is pulled high, all D3FAULT/SDO data is 0s
during the first SPI cycle.
IN
IN = A, A, B, B, Z, Z, DIY, Y
Figure 5. Equivalent Input Circuit for TTL, RS-422, SE-HTL and
D-HTL Modes (RxA, RxB, RxZ, RxY)
The MAX14890E samples the TTL/SDI input on the rising
edge of the SNGL/CLK signal, while D3FAULT/SDO is
generated on the falling edge of the SNGL/CLK.
MAX14890E
The HITH/CS SPI chip select input signal features a glitch
filter that improves robustness against EMI, requiring a
longer setup time.
1.65V
3.17MΩ
The MAX14890E must receive at least 16 clock pulses
on SNGL/CLK between the HITH/CS falling edge and the
HITH/CS rising edge (SPI command transfer). If less than
16 pulses are received, the device ignores the TTL/SDI
data received. If more than 16 pulses are received, only
the last 16 bits of data before HITH/CS rises are utilized.
Figure 8 shows a standard SPI cycle.
IN
IN = DI2, DI3
Figure 6. Equivalent Input Circuit for RxD2 and RxD3 in TTL
Mode
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
HITH/CS
SNGL/CLK
TTL/SDI
X
CMD2 CMD1 CMD0 DI[12] DI[11] DI[10] DI[9]
DI[8]
DI[7]
DI[6]
DI[5]
DI[4] DI[3]
DI[2]
DI[1]
DI[0]
DO[15]
DO[14] DO[13] DO[12] DO[11] DO[10] DO[9] DO[8] DO[7] DO[6] DO[5] DO[4] DO[3] DO[2] DO[1] DO[0]
D3FAULT/SDO
Figure 8. Standard SPI Cycle
The 16 bits of D3FAULT/SDO data generated by the
MAX14890E depend on the previously received SPI
command. If more than 16 SNGL/CLK cycles are present
during an SPI cycle, D3FAULT/SDO will output the data
received on TTL/SDI with a 16 bit latency, allowing for
daisy-chain transfers.
TTL/SDI, SNGL/CLK, and DI. See Tables 11-14 for more
information.
The HITH bit enables/disables the single-ended HTL
thresholds for all receivers set in HTL mode.
See the Fault Filtering section for more information on the
FLTR bit.
Register Functionality
The detailed fault readback consists of 16 D3FAULT/
SDO bits. The ADFLT, BDFLT, ZDFLT, YDFLT bits are set
when a differential fault error occurs for each receiver.
The AFLT, AFLT, BFLT, BFLT, ZFLT, ZFLT, YFLT, DIYFLT,
D2LFLT, D2HFLT, D3LFLT, D3HFLT bits are set when
a single-ended voltage fault occurs for each input. See
Table 15.
Three command bits (CMD[2:0]) and 13 mode selection
bits control the individual receiver input thresholds and
output behavior on the MAX14890E in SPI mode. Table
10 shows the functionality of the CMD[2:0] bits.
Change Configuration with Detailed Fault Readback
Command (CMD[2:0] = 101)
Write 101 to bits CMD[2:0] to enable configuring the indi-
vidual receivers through the SPI interface (Figure 9). Bit
settings are equivalent to the hardware inputs, HITH/CS,
Table 10. SPI Command Bit Settings
CHANGES
CONFIGURATION?
CMD2
CMD1
CMD0
FUNCTION
Change configuration. New configuration is set by bits DI[13:0]. Read
detailed fault status is the next SPI cycle.
See the Change Configuration with Detailed Fault Readback Command
section for more information.
1
0
1
YES
Read current fault output and receiver outputs in next SPI cycle.
See the Fault and Receiver Status Command section for more
information.
0
1
1
1
0
1
NO
Read current configuration in next SPI cycle. Do not change
configuration.
See the Readback Current Receiver Command section for more
information.
NO
NO
Read detailed fault status in next SPI cycle. Do not change configuration.
See the Detailed Fault Readback section for more information.
000, 001, 011, 100,110
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
SPI COMMAND CYCLE
HITH/CS
SNGL/CLK
HITH
X
TTL/SDI
X
1
0
1
ATTL ASNGL BTTL BSNGL ZTTL ZSNGL ZDI
YTTL YSNGL D2DI D3DI FLTR
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D3FAULT/SDO
SPI FOLLOW-ON CYCLE
HITH/CS
SNGL/CLK
X
TTL/SDI
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
BFLT
AFLT
AFLT
ADFLT
BFLT
BDFLT
ZFLT
ZFLT
ZDFLT
YFLT
DIYFLT YDFLT D2LFLT D2HFLT D3LFLT D3HFLT
D3FAULT/SDO
X = Unknown/Don’t care
Figure 9. Change Configuration with Detailed Fault Readback SPI Command
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
_FAULT bits are set when a differential or single-ended
fault occurs on a receiver. See the Fault Diagnostics
section for more information.
Fault and Receiver Status Command
(CMD[2:0] = 010)
Write 010 to bits CMD[2:0] to read the fault and receiver
output status (Figure 10). The fault and receiver status
is latched at the high-to-low transition on HITH/CS of the
following SPI cycle and is output on that SPI cycle. The
SPI COMMAND CYCLE
HITH/CS
SNGL/CLK
X
X
TTL/SDI
X
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D3FAULT/SDO
SPI FOLLOW-ON CYCLE
HITH/CS
SNGL/CLK
X
0
TTL/SDI
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
AFAULT
0
1
0
BFAULT ZFAULT YFAULT D2FAULT D3FAULT
AO
BO
ZO
YO
LO2
LO3
D3FAULT/SDO
X = Don’t care
Figure 10. Current Fault and Receiver Status Readback SPI Command
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
and the receiver’s _FAULT output assert 1ms (typ) after
the fault is detected.
Readback Current Receiver Command
(CMD[2:0] = 111)
Write 111 to bits CMD[2:0] to read the current receiver
configuration (Figure 11). See Table 11 thru Table 14 for
more information.
The 1ms filter is always active for single-ended faults, but
can be enabled or disabled for differential faults. Set the
global configuration filter bit, FLTR, to 1 to enable the fault
filter for differential (_DFLT) faults.
Fault Filtering
In SPI mode, the interrupt output (D3FAULT/IRQ) asserts
when a fault is detected on any receiver. D3FAULT/IRQ
Set FLTR = 0 to disable the filter. D3FAULT/IRQ and
_FAULT assert 10μs (typ) after the fault is detected when
the filter is disabled.
SPI COMMAND CYCLE
HITH/CS
SNGL/CLK
X
X
TTL/SDI
X
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D3FAULT/SDO
SPI FOLLOW-ON CYCLE
HITH/CS
SNGL/CLK
X
TTL/SDI
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ATTL
1
1
1
HITH
ASNGL
BTTL
BSNGL
ZTTL
ZSNGL
ZDI
YTTL
YSNGL
D2DI
D3DI
FLTR
D3FAULT/SDO
X = Don’t care
Figure 11. Receiver Configuration Readback SPI Command
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Fault Diagnostics
Table 11. SPI Mode RxA, RxB Selection Bits
In SPI mode, the interrupt output (D3FAULT/IRQ) and
associated _FAULT output asserts when a fault is detect-
ed on any receiver. _FAULT deasserts when the fault is
removed, but D3FAULT/IRQ remains latched until the
fault status is read through the SPI interface.
RxA, RxB RECEIVER
_SNGL
_TTL
OPERATION
0
0
1
1
0
1
0
1
D-HTL
RS-422
SE-HTL
TTL
If the fault is not cleared, D3FAULT/IRQ deasserts after
the SPI read command, but the associated fault bit and
_FAULT output remain asserted.
Applications Information
Table 12. SPI Mode RxZ Selection Bits
Cable Termination
RxZ RECEIVER
Transmission line termination is required for RS-422,
HTL, and TTL high-speed signals on long cables. For
RS-422 and TTL signal levels, 120Ω termination is com-
monly used to match the characteristic impedance of the
cable. For HTL signals, 270Ω/100pF AC-termination with
a series RC can be applied to reduce power dissipation.
ZTTL
ZSNGL
ZDI
OPERATION
0
0
1
1
X
0
1
0
1
X
0
0
0
0
1
D-HTL
SE-HTL
RS-422
TTL
Figure 12 shows a sample circuit of a termination scheme
to suit all of these operating modes. The 270Ω termination
can be permanently left in for all operating modes. For
high-speed RS-422 and TTL signals, the cable should
be terminated by its characteristic impedance to reduce
reflections. This can be done by switching in the parallel
resistor in these modes using a beyond-the-rails switch
like the MAX14777.
DI
X = Don’t care
Table 13. SPI Mode RxY Selection Bits
YTTL
YSNGL
RxY RECEIVER OPERATION
0
0
1
1
0
1
0
1
RS-422
DI
RS-422
TTL
IN
Table 14. SPI Mode RxD2, RxD3 Selection
Bits
216Ω
OUT
RECEIVER
270Ω
RxD2, RxD3 RECEIVER
MAX14777
D_DI
OPERATION
IN
0
1
TTL
DI
Figure 12. Sample Termination Scheme for HTL, RS-422, and
TTL modes
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Table 15. Detailed Fault Readback Bit Status
BIT
NAME
DESCRIPTION
0 = No fault asserted.
1 = Single-ended fault on A detected by the RxA receiver.
15
AFLT
0 = No fault asserted.
1 = Single-ended fault on A detected by the RxA receiver.
14
13
12
11
10
9
AFLT
ADFLT
BFLT
0 = No fault asserted.
1 = Differential fault detected on RxA.
0 = No fault asserted.
1 = Single-ended fault on B detected by the RxB receiver.
0 = No fault asserted.
1 = Single-ended fault on B detected by the RxB receiver.
BFLT
0 = No fault asserted.
1 = Differential fault detected on RxB.
BDFLT
ZFLT
0 = No fault asserted.
1 = Single-ended fault on Z detected by the RxZ receiver.
0 = No fault asserted.
1 = Single-ended fault on Z detected by the RxZ receiver.
8
ZFLT
0 = No fault asserted.
1 = Differential fault detected on RxZ.
7
ZDFLT
YFLT
0 = No fault asserted.
1 = Single-ended fault on Y detected by the RxY receiver.
6
0 = No fault asserted.
1 = Single-ended fault on DIY detected by the RxY receiver.
5
DIYFLT
YDFLT
D2LFLT
D2HFLT
D3LFLT
D3HFLT
0 = No fault asserted.
1 = Differential fault detected on RxY.
4
0 = No fault asserted.
1 = Single-ended low-voltage fault on DI2 detected by the RxD2 receiver.
3
0 = No fault asserted.
2
1 = Single-ended high-voltage fault on DI2 detected by the RxD2 receiver. Only in TTL mode.
0 = No fault asserted.
1 = Single-ended low-voltage fault on DI3 detected by the RxD3 receiver.
1
0 = No fault asserted.
0
1 = Single-ended high-voltage fault on DI3 detected by the RxD3 receiver. Only in TTL mode.
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
3.3V to 5V
5V
VCC
VL
ENCODER
A
A
B
B
270Ω
270Ω
AO
RxA
RxB
D-HTL A
D-HTL B
100pF
100pF
5V
5V
5V
5V
AFAULT
BO
BFAULT
Z
270Ω
ZO
ZFAULT
YO
RxZ
RxY
D-HTL Z
100pF
Z
DIY
ASIC
DI FAULT
Y
YFAULT
LO2
DI2
PROXIMITY
SENSOR
RxD2
LO3
DI3
PROXIMITY
SENSOR
RxD3
SNGL/CLK = 0
TTL/SDI = 0
DI/TTLY = 1
DI/TTL2 = 1
DI/TTL3 = 1
MAX14890
COUNTER/
MOTOR
CONTROLLER
Figure 13. Encoder Circuit with Differential HTL (D-HTL) Signals and DI Alarm Signal
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
3.3V to 5V
5V
VCC
ENCODER
VL
A
A
B
B
270Ω
270Ω
AO
RxA
RxB
SE-HTL A
SE-HTL B
100pF
100pF
5V
5V
5V
5V
AFAULT
BO
BFAULT
Z
270Ω
ZO
ZFAULT
YO
RxZ
RxY
SE_HTL Z
DI FAULT
100pF
Z
DIY
ASIC
Y
YFAULT
LO2
DO
DI2
PROXIMITY
SENSOR
RxD2
DO
DI3
LO3
PROXIMITY
SENSOR
RxD3
SNGL/CLK = 1
TTL/SDI = 0
DI/TTLY = 1
DI/TTL2 = 1
DI/TTL3 = 1
MAX14890
MOTOR
CONTROLLER
Figure 14. Encoder Circuit with Single-Ended HTL (SE-HTL) Signals and DI Alarm Signal
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
3.3V to 5V
5V
VCC
ENCODER
VL
A
A
B
B
AO
RxA
RxB
TTL A
TTL B
120Ω
120Ω
5V
5V
5V
5V
AFAULT
BO
BFAULT
Z
ZO
ZFAULT
YO
RxZ
RxY
120Ω
120Ω
TTL Z
Z
DIY
ASIC
TTL ALARM
Y
YFAULT
LO2
TTL
DI2
PROXIMITY
SENSOR
RxD2
TTL
DI3
LO3
PROXIMITY
SENSOR
RxD3
SNGL/CLK = 1
TTL/SDI = 1
DI/TTLY = 0
DI/TTL2 = 0
DI/TTL3 = 0
MAX14890
MOTOR
CONTROLLER
Figure 15. Encoder Circuit with TTL Signals and DI Alarm Signal
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Functional Diagram
VCC
VL
SPI
HITH/CS
TTL/SDI
CONFIG/
MONITOR
MAX14890E
SNGL/CLK
D2FAULT/IRQ
D3FAULT/SDO
A
A
B
B
AO
RxA
RxB
AFAULT
BO
BFAULT
Z
Z
ZO
2.5mA
2.5mA
RxZ
RxY
ZFAULT
DI/TTLY
YO
DIY
Y
YFAULT
DI/TTL2
LO2
DI2
DI3
RxD2
RxD3
2.5mA
2.5mA
DI/TTL3
LO3
GND
Ordering Information
Chip Information
PROCESS: BiCMOS
PART
TEMP RANGE
PIN PACKAGE
MAX14890EATJ+
MAX14890EATJ+T
-40°C to +125°C 32 TQFN-EP
-40°C to +125°C 32 TQFN-EP
Package Information
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
*EP = Exposed pad.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
32 TQFN-EP
T3255+6
21-0140
90-0603
Maxim Integrated
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MAX14890E
Incremental Encoder Interface for RS-422,
HTL, and TTL with Digital Inputs
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
0
3/15
Initial release
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
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