RH101A [Linear]

Operational Amplifier;
RH101A
型号: RH101A
厂家: Linear    Linear
描述:

Operational Amplifier

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中文:  中文翻译
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DICE/DWF SPECIFICATION  
RH101A  
Operational Amplifier  
5
DIE CROSS REFERENCE  
LTC Finished  
Part Number  
Order DICE CANDIDATE  
Part Number Below  
6
7
RH101A  
RH101A  
RH101A DICE  
RH101A DWF  
8
PAD FUNCTION  
4
1. BAL/COMP  
2. –IN  
3. +IN  
4. V–  
1
3
2
5. BAL  
6. OUT  
7. V+  
80 × 59 mils  
8. COMP  
Backside (substrate) is an alloyed gold layer. May be connected to V or  
no connection.  
W
DICE ELECTRICAL TEST LI ITS  
TA = 25°C. VS = ±20V unless otherwise noted.  
T = 25°C  
A
MIN  
SYMBOL  
PARAMETER  
CONDITIONS  
MAX  
UNITS  
Pre-Irradiation (Note 1)  
V
Input Offset Voltage  
R 50k  
2
mV  
nA  
OS  
S
I
I
Input Offset Current  
10  
75  
OS  
Input Bias Current  
V
= 0V  
CM  
nA  
B
A
Large Signal Voltage Gain  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
Input Voltage Range  
V = ±15V, V  
= ±10V, R 2k  
50  
80  
V/mV  
dB  
VOL  
S
OUT  
L
CMRR  
PSRR  
R 50k  
S
R 50k  
S
80  
dB  
V = ±20V  
S
±15  
V
V
Output Voltage Swing  
V = ±15V, R 10k  
±12  
±10  
V
V
OUT  
S
L
V = ±15V, R 2k  
S
L
I
Supply Current  
V = ±20V  
S
3
mA  
S
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
1
DICE/DWF SPECIFICATION  
RH101A  
W
DICE ELECTRICAL TEST LI ITS  
TA = 25°C. VS = ±20V unless otherwise noted.  
10Krad(SI) 20Krad(SI) 50Krad(SI) 100Krad(SI) 200Krad(SI)  
SYMBOL PARAMETER  
Post-Irradiation (Note 4)  
CONDITIONS  
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS  
V
Input Offset Voltage  
Input Offset Current  
Input Bias Current  
R 50k  
2
2
2
2
3
mV  
nA  
nA  
dB  
OS  
S
I
I
10  
75  
10  
75  
10  
10  
20  
OS  
100  
200  
400  
B
CMRR  
Common Mode  
Rejection Ratio  
V
V
= ±15V, R 50k  
80  
80  
50  
80  
80  
50  
80  
80  
50  
80  
80  
50  
80  
80  
25  
CM  
CM  
S
PSRR  
Power Supply  
Rejection Ratio  
= ±5V to ±20V,  
dB  
R 50k  
S
A
V
Large Signal Voltage Gain  
R = ±2k, V = ±10V,  
V/mV  
VOL  
OUT  
L
O
V = ±15V  
S
Maximumm Output  
Voltage Swing  
V = ±15V, R 10k  
±12  
±10  
±12  
±10  
±12  
±10  
±12  
±10  
±12  
±10  
V
V
S
L
V = ±15V, R 2k  
S
L
I
Supply Current  
V = ±20V  
S
3
3
3
3
3
mA  
S
Note 1: Unless otherwise noted, all measurements are made with unity  
Note 3: Refer to LTC standard product data sheet for all other applicable  
information.  
Note 4: The post-irradiation table is for lot qualification based on sample  
gain compensation (C1 = 30pF); these specifications apply for ±5V V ≤  
S
20V.  
Note 2: For supply voltages less than ±15V, the maximum input voltage is  
equal to the supply voltage.  
lot assembly and testing only. Contact LTC marketing for more detail.  
Wafer level testing is performed per the indicated specifications for dice. Considerable differences in performance can often be observed for dice versus  
packaged units due to the influences of packaging and assembly on certain devices and/or parameters. Please consult factory for more information on  
dice performance and lot qualifications via lot sampling test procedures.  
Dice data sheet subject to change. Please consult factory for current revision in production.  
I.D.No. 66-13-0101  
LT/LT 0203 PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
2
© LINEAR TECHNOLOGY CORPORATION 2003  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  

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