LTM4616_12 [Linear]
Dual 8A per Channel Low VIN DC/DC μModule Regulator; 每通道低输入电压DC / DCμModule稳压器双路8A型号: | LTM4616_12 |
厂家: | Linear |
描述: | Dual 8A per Channel Low VIN DC/DC μModule Regulator |
文件: | 总30页 (文件大小:483K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTM4616
Dual 8A per Channel Low
V DC/DC µModule Regulator
IN
Features
Description
The LTM®4616 is a complete dual 2-phase 8A per channel
switch mode DC/DC power regulator system in a 15mm
n
Complete Dual DC/DC Regulator System
n
Input Voltage Range: 2.7V to 5.5V
Dual 8A Outputs, or Single 16A Output with a 0.6V
to 5V Range
n
× 15mm surface mount LGA or BGA package. Included
in the package are the switching controller, power FETs,
inductor and all support components. Operating from an
inputvoltagerangeof2.7Vto5.5V,theLTM4616supports
two outputs within a voltage range of 0.6V to 5V, each set
by a single external resistor. This high efficiency design
delivers up to 8A continuous current (10A peak) for each
output. Only bulk input and output capacitors are needed,
depending on ripple requirement. The part can also be
configured for a 2-phase single output at up to 16A.
n
n
n
n
n
n
n
n
n
n
n
Output Voltage Tracking and Margining
1.75ꢀ Total DC Output Error (–55°C to 125°C)
Current Mode Control/Fast Transient Response
Power Good Tracking and Margining
Overcurrent/Thermal Shutdown Protection
Onboard Frequency Synchronization
Spread Spectrum Frequency Modulation
Multiphase Operation
Selectable Burst Mode® Operation
Thelowprofilepackageenablesutilizationofunusedspace
on the back side of PC boards for high density point-of-
load regulation.
Output Overvoltage Protection
RoHS Compliant with Pb-Free Finish,
Gold Finish LGA (e4) or SAC 305 BGA (e1)
Small Surface Mount Footprint, Low Profile
(15mm × 15mm × 2.82mm) LGA and
(15mm × 15mm × 3.42mm) BGA Packages
n
Fault protection features include overvoltage protection,
overcurrent protection and thermal shutdown. The power
module is offered in space saving and thermally enhanced
15mm × 15mm × 2.82mm LGA and 15mm × 15mm ×
3.42mm BGA packages. The LTM4616 is RoHS compliant
with Pb-free finish.
applications
n
Telecom, Networking and Industrial Equipment
Different Combinations of Input and Output
n
Storage and ATCA, PCI Express Cards
Number of Inputs
Number of Outputs
I
(MAX)
n
OUT
Battery Operated Equipment
2
2
1
1
2
1
2
1
8A, 8A
L, LT, LTC, LTM, Linear Technology, the Linear logo, Burst Mode, µModule and PolyPhase
are registered trademarks and LTpowerCAD is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6724174.
16A
8A, 8A
16A
typical application
Efficiency vs Load Current
Dual Output DC/DC µModule® Regulator
95
90
85
80
75
5V 3.3V
IN
OUT
V
5V
IN1
V
OUT1
3.3V/8A
V
V
IN1
OUT1
FB1
5V 2.5V
IN
OUT
100µF
10µF
LTM4616
2.21k
3.09k
I
THM1
V
3.3V TO 5V
10µF
IN2
V
OUT2
2.5V/8A
V
V
IN2
OUT2
FB2
100µF
I
THM2
GND1
GND2
70
0
4616 TA01a
2
4
6
8
LOAD CURRENT (A)
4616 TA01b
4616fd
1
LTM4616
absolute MaxiMuM ratings
(Note 1)
V
, SV , V , SV ................................ –0.3V to 6V
V
, V
, SW1, SW2............................ –0.3V to V
IN1
IN1 IN2
IN2
OUT1 OUT2 IN
Internal Operating Temperature Range (Note 2)
CLKOUT1, CLKOUT2 .................................... –0.3V to 2V
PGOOD1, PLLLPF1, CLKIN1, PHMODE1,
E- and I-Grades..................................–40°C to 125°C
MP-Grade .......................................... –55°C to 125°C
Junction Temperature ........................................... 125°C
Storage Temperature Range .................. –55°C to 125°C
MODE1, PGOOD2, PLLLPF2, CLKIN2,
PHMODE2, MODE2..................................... –0.3V to V
IN
I
, I
, RUN1, FB1, TRACK1, MGN1,
TH2 THM2
TH1 THM1
BSEL1, I , I
, RUN2, FB2, TRACK2,
MGN2, BSEL2............................................. –0.3V to V
IN
pin conFiguration
TOP VIEW
TOP VIEW
SGND2 CLKOUT2
SGND2 CLKOUT2
I
I
RUN2
TH2
RUN2
TH2
V
V
V
V
OUT2
IN2
IN2
OUT2
M
L
M
L
SV
TRACK2
SV
IN2
TRACK2
IN2
PLLLPF2
I
PLLLPF2
I
THM2
THM2
K
J
K
J
FB2
FB2
GND2
GND2
SW2
SW2
H
G
F
H
G
F
MODE2
MODE2
CLKIN2
PHMODE2
MGN2
CLKIN2
PHMODE2
MGN2
PGOOD2
BSEL2
BSEL2
PGOOD2
RUN1
RUN1
I
TH1
I
SGND1
TH1
SV
IN1
SGND1
CLKOUT1
SV
IN1
CLKOUT1
E
E
TRACK1
OUT1
TRACK1
PLLLPF1
V
I
PLLLPF1
V
I
THM1
THM1
V
D
C
B
A
V
D
C
B
A
OUT1
IN1
IN1
SW1
FB1
SW1
FB1
GND1
PGOOD1
MGN1
GND1
PGOOD1
MGN1
BSEL1
BSEL1
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
CLKIN1 MODE1 PHMODE1
BGA PACKAGE
144-LEAD (15mm × 15mm × 3.42mm)
CLKIN1 MODE1 PHMODE1
LGA PACKAGE
144-LEAD (15mm × 15mm × 2.82mm)
T
= 125°C, θ = 10.5°C/W, θ
= 2°C/W, θ
= 16°C/W, WEIGHT = 2.0g
T
= 125°C, θ = 10.5°C/W, θ
= 2°C/W, θ
= 16°C/W, WEIGHT = 1.8g
JMAX
JA
JCbottom
JCtop
JMAX
JA
JCbottom
JCtop
θ
DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
θ
JA
DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
JA
orDer inForMation
LEAD FREE FINISH
LTM4616EV#PBF
LTM4616IV#PBF
LTM4616MPV#PBF
LTM4616EY#PBF
LTM4616IY#PBF
LTM4616MPY#PBF
TRAY
PART MARKING*
LTM4616V
LTM4616V
LTM4616V
LTM4616Y
LTM4616Y
LTM4616Y
PACKAGE DESCRIPTION
TEMPERATURE RANGE (NOTE 2)
LTM4616EV#PBF
LTM4616IV#PBF
LTM4616MPV#PBF
LTM4616EY#PBF
LTM4616IY#PBF
LTM4616MPY#PBF
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
144-Lead (15mm × 15mm × 2.82mm) LGA
144-Lead (15mm × 15mm × 2.82mm) LGA
144-Lead (15mm × 15mm × 2.82mm) LGA
144-Lead (15mm × 15mm × 3.42mm) BGA
144-Lead (15mm × 15mm × 3.42mm) BGA
144-Lead (15mm × 15mm × 3.42mm) BGA
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
4616fd
2
LTM4616
electrical characteristics The l denotes the specifications which apply over the specified internal
operating temperature range (Note 2). TA = 25°C, VIN = 5V unless otherwise noted. Per the typical application in Figure 18. Specified
as each channel (Note 3).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
V
Input DC Voltage
2.7
5.5
V
IN1(DC), IN2(DC)
V
, V
Output Voltage, Total Variation
with Line and Load
C
V
= 10µF × 1, C
= 100µF Ceramic,
FB
OUT1(DC) OUT2(DC)
IN
OUT
100µF POSCAP, R = 6.65k, MODE = 0V
1.472
1.464
1.49
1.49
1.508
1.516
V
V
= 2.7V to 5.5V,
IN
l
I
= I
to I
(Note 4)
OUT
OUT(DC)MIN
OUT(DC)MAX
Input Specifications
V
V
,
Undervoltage Lockout Threshold SV Rising
2.05
1.85
2.2
2.0
2.35
2.15
V
V
IN1(UVLO)
IN2(UVLO)
IN
SV Falling
IN
I
Input Supply Bias Current
V
IN
V
IN
V
IN
= 3.3V, V
= 3.3V, V
= 3.3V, V
= 1.5V, No Switching, MODE = V
IN
= 1.5V, No Switching, MODE = 0V
= 1.5V, Switching Continuous
400
1.15
55
µA
mA
mA
Q(VIN1, VIN2)
OUT
OUT
OUT
V
V
V
= 5V, V
= 5V, V
= 5V, V
= 1.5V, No Switching, MODE = V
IN
= 1.5V, No Switching, MODE = 0V
= 1.5V, Switching Continuous
450
1.3
75
µA
mA
mA
IN
IN
IN
OUT
OUT
OUT
Shutdown, RUN = 0, V = 5V
1
µA
IN
I
Input Supply Current
V
IN
V
IN
= 3.3V, V
= 1.5V, I = 8A
OUT
4.5
2.93
A
A
S(VIN1, VIN2)
OUT
= 5V, V
= 1.5V, I
= 8A
OUT
OUT
Output Specifications
I
I
Output Continuous Current Range V
(Note 4)
= 1.5V
OUT1(DC), OUT2(DC)
OUT
V
= 3.3V, 5.5V
0
0
8
5
A
A
IN
IN
V
= 2.7V
l
Line Regulation Accuracy
Load Regulation Accuracy
V
= 1.5V, V from 2.7V to 5.5V, I
= 0A
0.1
0.25
%/V
ΔV
ΔV
/V
OUT
IN
OUT
OUT1(LINE) OUT1
/V
OUT2(LINE) OUT2
V
OUT
= 1.5V (Note 4)
ΔV
ΔV
/V
/V
OUT1(LOAD) OUT1
OUT2(LOAD) OUT2
l
l
V
V
= 3.3V, 5.5V, I
= 0A to 8A
LOAD
0.3
0.3
0.5
0.5
%
%
IN
IN
= 2.7V, I
= 0A to 5A
LOAD
V
, V
Output Ripple Voltage
I
= 0A, C
= 1.5V
= 100µF X5R Ceramic, V = 5V,
OUT IN
OUT1(AC) OUT2(AC)
OUT
OUT
V
10
mV
P-P
f
f
f
Switching Frequency
SYNC Capture Range
Turn-On Overshoot
I
= 8A, V = 5V, V = 1.5V
OUT
1.25
0.75
1.5
1.75
2.25
MHz
MHz
S1, S2
OUT
IN
f
SYNC1, SYNC2
C
= 100µF, V
= 3.3V
= 1.5V, I
= 0A
OUT
ΔV
ΔV
OUT
OUT
OUT1(START),
OUT2(START)
V
10
10
mV
mV
IN
IN
V
= 5V
t
t
Turn-On Time
C
= 100µF, V
= 1.5V, V = 5V,
IN
START1, START2
OUT
OUT
OUT
I
= 1A Resistive Load, Track = V
100
20
µs
IN
Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,
mV
ΔV
ΔV
OUT1(LS),
OUT2(LS)
C
V
= 100µF Ceramic x2, 470µF POSCAP,
OUT
IN
= 5V, V
= 1.5V
OUT
t
t
Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load, V = 5V,
OUT
10
µs
SETTLE1, SETTLE2
IN
V
= 1.5V, C
= 100µF
OUT
I
I
Output Current Limit
C
= 100µF
OUT1(PK), OUT2(PK)
OUT
V
= 2.7V, V
= 3.3V, V
= 1.5V
= 1.5V
8
11
13
A
A
A
IN
IN
IN
OUT
OUT
V
V
= 5V, V
= 1.5V
OUT
4616fd
3
LTM4616
electrical characteristics The l denotes the specifications which apply over the specified internal
operating temperature range (Note 2). TA = 25°C, VIN = 5V unless otherwise noted. Per the typical application in Figure 18. Specified
as each channel (Note 3).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Control Section
FB1, FB2
Voltage at FB Pin
I
= 0A, V
= 1.5V, V = 2.7V to 5.5V
0.590
0.587
0.596
0.596
0.602
0.606
V
V
OUT
OUT
IN
l
SS Delay
Internal Soft-Start Delay
90
µs
I
, I
0.2
µA
FB1 FB2
V
V
RUN Pin On/Off Threshold
RUN Rising
RUN Falling
1.4
1.3
1.55
1.4
1.7
1.5
V
V
RUN1, RUN2
TRACK1, TRACK2
Tracking Threshold (Rising)
Tracking Threshold (Falling)
Tracking Disable Threshold
RUN = V
0.57
0.18
IN
V
V
V
IN
RUN = 0V
V
– 0.5
R
R
Resistor Between V
and FB
OUT
9.95
10
10.05
kΩ
FBHI1, FBHI2
Pins
PGOOD Range
10
%
ΔV
PGOOD1,
ΔV
PGOOD2
%Margining
Output Voltage Margining
Percentage
MGN = V , BSEL = 0V
4
9
14
–4
–9
–14
5
6
%
%
%
%
%
%
IN
MGN = V , BSEL = V
10
15
11
IN
IN
MGN = V , BSEL = Float
16
–6
–11
–16
IN
MGN = 0V, BSEL = 0V
–5
–10
–15
MGN = 0V, BSEL = V
IN
MGN = 0V, BSEL = Float
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
controls. The LTM4616I is guaranteed to meet specifications over the
–40°C to 125°C internal operating temperature range. The LTM4616MP
is guaranteed and tested over the –55°C to 125°C internal operating
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 2: The LTM4616 is tested under pulsed load conditions, such that
T ≈ T . The LTM4616E is guaranteed to meet performance specifications
J
A
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
Note 3: Two channels are tested separately and the same testing
conditions are applied to each channel.
Note 4: See Output Current Derating curves for different V , V
and T .
A
IN OUT
Specified as Each Channel
typical perForMance characteristics
Efficiency vs Load Current
Efficiency vs Load Current
Efficiency vs Load Current
100
95
90
85
80
75
70
100
95
100
95
CONTINUOUS MODE
CONTINUOUS MODE
CONTINUOUS MODE
90
85
90
85
80
75
70
80
75
70
5V 1.2V
IN
OUT
OUT
OUT
OUT
OUT
3.3V 1.2V
IN
OUT
OUT
OUT
OUT
5V 1.5V
IN
2.7V 1.0V
3.3V 1.5V
IN
IN
OUT
OUT
OUT
5V 1.8V
IN
2.7V 1.5V
IN
3.3V 1.8V
IN
3.3V 2.5V
IN
5V 2.5V
IN
2.7V 1.8V
IN
5V 3.3V
IN
0
2
3
4
5
6
7
0
2
4
6
8
1
0
2
4
6
8
LOAD CURRENT (A)
LOAD CURRENT
LOAD CURRENT
4616 G03
4616 G02
4616 G01
4616fd
4
LTM4616
typical perForMance characteristics Specified as Each Channel
Burst Mode Efficiency with
5V Input
VIN to VOUT Step-Down Ratio
VIN to VOUT Step-Down Ratio
100
90
80
70
60
50
40
4.0
3.5
3.0
2.5
4.0
3.5
3.0
2.5
2.0
1.5
2.0
1.5
1.0
0.5
0
1.0
0.5
0
V
V
V
= 1.5V
= 2.5V
= 3.3V
V
V
V
= 1.8V
= 2.5V
= 3.3V
I
V
V
= 8A
OUT
OUT
OUT
OUT
OUT
OUT
I
V
V
= 6A
V
V
V
= 1.8V
= 2.5V
= 3.3V
OUT
OUT
OUT
OUT
OUT
= 1.2V
= 1.5V
= 1.2V
= 1.5V
OUT
OUT
OUT
OUT
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
LOAD CURRENT (A)
4
2
3
4
5
6
2
5
6
3
V
(V)
V
(V)
IN
IN
4616 G05
4616 G06
4616 G04
Supply Current vs VIN
Load Transient Response
Load Transient Response
1.6
1.4
1.2
1
I
I
LOAD
1A/DIV
LOAD
1A/DIV
V
= 1.2V PULSE-SKIPPING MODE
O
0A
0A
V
V
OUT
OUT
0.8
0.6
0.4
0.2
0
50mV/DIV
50mV/DIV
V
= 1.2V Burst Mode OPERATION
O
4616 G08
4616 G09
V
V
= 5V
20µs/DIV
V
V
= 5V
20µs/DIV
IN
OUT
IN
OUT
= 3.3V
= 2.5V
2A/µs STEP
= 2 × 100µF X5R, 470µF 4V POSCAP
2A/µs STEP
= 2 × 100µF X5R, 470µF 4V POSCAP
C
C
OUT
OUT
2.5
3
3.5
4
4.5
5
5.5
INPUT VOLTAGE (V)
4616 G07
Load Transient Response
Load Transient Response
Load Transient Response
I
I
I
LOAD
LOAD
LOAD
1A/DIV
1A/DIV
1A/DIV
0A
0A
0A
V
V
V
OUT
OUT
OUT
50mV/DIV
50mV/DIV
50mV/DIV
4616 G10
4616 G11
4616 G12
V
V
= 5V
20µs/DIV
V
V
= 5V
20µs/DIV
V
V
= 5V
20µs/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.8V
= 1.5V
= 1.2V
2.5A/µs STEP
= 2 × 100µF X5R, 470µF 4V POSCAP
2.5A/µs STEP
= 2 × 100µF X5R, 470µF 4V POSCAP
2.5A/µs STEP
= 2 × 100µF X5R, 470µF POSCAP
C
C
C
OUT
OUT
OUT
4616fd
5
LTM4616
typical perForMance characteristics Specified as Each Channel
Start-Up
VFB vs Temperature
Load Regulation vs Current
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
602
600
598
596
594
592
590
V
OUT
0.5V/DIV
V
V
= 5.5V
= 3.3V
IN
IN
V
IN
2V/DIV
V
= 2.7V
IN
4616 G13
V
V
C
= 5V
50µs/DIV
IN
FC MODE
= 1.5V
OUT
OUT
V
V
= 3.3V
IN
OUT
= 100µF NO LOAD AND 8A LOAD
= 1.5V
(DEFAULT 100µs SOFT-START)
–25
0
50
–50
75 100 125
25
0
2
4
6
8
LOAD CURRENT (A)
TEMPERATURE (°C)
4616 G14
4616 G15
Short-Circuit Protection
(2.5V Short, No Load)
Short-Circuit Protection
(2.5V Short, 4A Load)
2.5V Output Current
3.0
2.5
V
IN
5V/DIV
5V/DIV
2V/DIV
2V/DIV
V
V
IN
OUT
V
OUT
2.0
1.5
I
LOAD
OUT
5A/DIV
5A/DIV
I
OUT
1.0
0.5
0
4616 G17
4616 G18
V
V
= 5V
50µs/DIV
V
V
= 5V
50µs/DIV
IN
OUT
IN
OUT
= 2.5V
= 2.5V
0
5
10
15
20
OUTPUT CURRENT (A)
4616 G16
4616fd
6
LTM4616
pin Functions
IN1 IN2
PLLLPF1 and PLLLPF2 (E6 and L6): Phase-Locked Loop
Lowpass Filter for Each Channel. An internal lowpass filter
is tied to this pin. In spread spectrum mode, placing a
capacitor here to SGND controls the slew rate from one
frequencytothenext. Alternatively, floatingthispinallows
V
, V , (BANK1 and BANK2); (F1-F4, E1-E4, C1-C2,
D1-D2) and (J1-J2, K1-K2, L1-L4, M1-M4): Power Input
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between V pins and GND pins.
IN
normalrunningfrequencyat1.5MHz,tyingthispintoSV
IN
V , V
OUT1 OUT2
(BANK3 and BANK6); (D9-D12, E9-E12,
forces the part to run at 1.33 times its normal frequency
(2MHz), tying it to ground forces the frequency to run at
0.67 times its normal frequency (1MHz).
F9-F12) and (K9-K12, L9-L12, M9-M12): Power Output
Pins. Apply output load between these pins and GND
pins. Recommend placing output decoupling capacitance
directly between these pins and GND pins. See Table 1.
PHMODE1 and PHMODE2 (A9 and G9): Phase Selector
Input for Each Channel. This pin determines the phase
relationship between the internal oscillator and CLKOUT.
Tie it high for 2-phase operation, tie it low for 3-phase
GND1 and GND2 (BANK2 and BANK5); (A1-A5, A12, B1-
B5, B7-B12, C3-C12, D3-D7) and (G1-G5, G12, H1-H5,
H7-H12, J3-J12, K3-K7): Power Ground Pins for Both
Input and Output Returns.
operation, and float or tie it to V /2 for 4-phase operation.
IN
MGN1 and MGN2 (A10 and G10): Voltage Margining
Pin for Each Channel. Increases or decreases the output
voltage by the amount specified by the BSEL pin. To
disable margining, tie the MGN pin to a voltage divider
SV andSV (E5andL5):SignalInputVoltageforEach
IN1
IN2
Channel. This pin is internally connected to V through
IN
a lowpass filter.
with 50k resistors from V to ground (see Figure 5).
SGND1 and SGND2 (F5 and M5): Signal Ground Pin for
Each Channel. Return ground path for all analog and low
power circuitry. Tie a single connection to the output
capacitor GND in the application. See layout guidelines
in Figure 17.
IN
For margining, connect a voltage divider from V to GND
IN
with the center point connected to the MGN pinfor the spe-
cific channel. Each resistor should be close to 50k. Margin
Highiswithin0.3VofV , andMarginLowiswithin0.3Vof
IN
GND. See the Applications Information section and Figure
18 for margining control. The specified tri-state drivers are
capable of the high and low requirements for margining.
MODE1 and MODE2 (A8 and G8): Mode Select Input for
Each Channel. Tying this pin high enables Burst Mode
operation. Tying this pin low enables forced continuous
operation. Floating this pin or tying it to V /2 enables
pulse-skipping operation.
BSEL1 and BSEL2 (A6 and G6): Margining Bit Select Pin
for Each Channel. Tying BSEL low selects 5% margin
value, tying it high selects 10% margin value. Floating it
IN
CLKIN1 and CLKIN2 (A7 and G7): External Synchroniza-
tion Input to Phase Detector for Each Channel. This pin
is internally terminated to SGND with a 50k resistor. The
phase-locked loop will force the internal top power PMOS
turn on to be synchronized with the rising edge of the
or tying it to V /2 selects 15% margin value.
IN
TRACK1andTRACK2(E8andL8):OutputVoltageTracking
PinforEachChannel. Voltagetrackingisenabledwhenthe
TRACK voltage is below 0.57V. If tracking is not desired,
then connect the TRACK pin to SV . If TRACK is not tied
CLKIN signal. Connect this pin to SV to enable spread
IN
IN
to SV , then the TRACK pin’s voltage needs to be below
spectrum modulation. During external synchronization,
IN
0.18V before the chip shuts down even though RUN is
make sure the PLLLPF pin is not tied to V or GND.
IN
4616fd
7
LTM4616
pin Functions
already low. Do not float this pin. A resistor and capacitor
can be applied to the TRACK pin to increase the soft-start
time of the regulator. TRACK1 and TRACK2 can be tied
together for parallel operation and tracking. See the Ap-
plications Information section.
SGND for single phase operation on each channel. For
PolyPhase operation, tie the master’s I to SGND while
THM
connecting all of the I
pins together at the master.
THM
PGOOD1 and PGOOD2 (A11 and G11): Output Voltage
Power Good Indicator for Each Channel. Open-drain logic
output that is pulled to ground when the output voltage
is not within 10% of the regulation point. Power good
is disabled during margining.
FB1 and FB2 (D8 and K8): The Negative Input of the Error
AmplifierforEachChannel.Internally,thispinisconnected
to V
with a 10k precision resistor. Different output
OUT
voltages can be programmed with an additional resistor
between FB and GND pins. In PolyPhase® operation, tying
the FB pins together allows for parallel operation. See the
Applications Information section for details.
RUN1 and RUN2 (F6 and M6): Run Control Pin. A voltage
above 1.7V will turn on the module.
SW1 and SW2 (B6 and H6): Switching Node of Each
Channel That is Used for Testing Purposes. This can be
connected to an electronically open circuit copper pad on
the board for improved thermal performance.
I
and I (F8 and M8): Current Control Threshold and
TH2
TH1
ErrorAmplifierCompensationPointforEachChannel. The
current comparator threshold increases with this control
voltage. Tie together in parallel operation.
CLKOUT1 and CLKOUT2 (F7 and M7): Output Clock
Signal for PolyPhase Operation. The phase of CLKOUT is
determined by the state of the PHMODE pin.
I
TH
andI
(E7andL7):NegativeInputtotheInternal
THM1
THM2
I
Differential Amplifier for Each Channel. Tie this pin to
4616fd
8
LTM4616
siMpliFieD block DiagraM
SV
IN1
V
INTERNAL
FILTER
IN1
3V TO 5.5V
+
TRACK1
10µF
10µF
10µF
C
IN1
PGND1
MGN1
BSEL1
V
OUT1
M1
M2
SW1
PGOOD1
MODE1
0.22µH
V
1.5V
8A
OUT1
POWER
CONTROL
RUN1
CLKIN1
+
CLKOUT1
PHMODE1
10µF
C
OUT1
I
PGND1
TH1
INTERNAL
COMP
50k
10k
PLLLPF1
FB1
INTERNAL
FILTER
R
SET1
6.65k
I
THM1
PGND1
SGND1
SV
IN2
V
INTERNAL
FILTER
IN2
3V TO 5.5V
+
+
TRACK2
10µF
10µF
10µF
C
IN2
PGND2
MGN2
BSEL2
V
OUT2
M3
M4
SW2
PGOOD2
MODE2
0.22µH
V
1.2V
8A
OUT2
POWER
CONTROL
RUN2
CLKIN2
CLKOUT2
PHMODE2
10µF
C
OUT2
I
PGND2
TH2
INTERNAL
COMP
50k
10k
PLLLPF2
FB2
INTERNAL
FILTER
R
SET2
10k
I
THM2
PGND2
SGND2
4616 BD
Figure 1. Simplified LTM4616 Block Diagram
4616fd
9
LTM4616
siMpliFieD block DiagraM
Table 1. Decoupling Requirements. TA = 25°C, Block Diagram Configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
C
External Input Capacitor Requirement
IN1
IN2
(V = 2.7V to 5.5V, V
= 1.5V)
= 2.5V)
I
I
= 8A
= 8A
22
22
µF
µF
IN1
OUT1
OUT2
OUT1
OUT2
(V = 2.7V to 5.5V, V
IN2
C
C
External Output Capacitor Requirement
OUT1
OUT2
(V = 2.7V to 5.5V, V
= 1.5V)
= 2.5V)
I
I
= 8A
= 8A
100
100
µF
µF
IN1
OUT1
OUT2
OUT1
OUT2
(V = 2.7V to 5.5V, V
IN2
operation
Pulling the RUN pins below 1.3V forces the regulators
into a shutdown state, by turning off both MOSFETs. The
TRACK pin is used for programming the output voltage
ramp and voltage tracking during start-up. See the Ap-
plications Information section.
The LTM4616 is a dual-output standalone nonisolated
switching mode DC/DC power supply. It can provide two
8A outputs with few external input and output capacitors.
This module provides precisely regulated output voltages
programmable via external resistors from 0.6V to 5V
DC
DC
over 2.7V to 5.5V input voltages. The typical application
The LTM4616 is internally compensated to be stable over
all operating conditions. Table 3 provides a guideline
for input and output capacitances for several operating
conditions. LTpowerCAD™ design tool is available for fine
tuning transient and stability perfromance. The FB pin is
used to program the output voltage with a single external
resistor to ground.
schematic is shown in Figure 18.
The LTM4616 has integrated constant frequency current
mode regulators and built-in power MOSFET devices with
fast switching speed. The typical switching frequency is
1.5MHz. For switching noise sensitive applications, it can
be externally synchronized from 0.75MHz to 2.25MHz.
Even spread spectrum switching can be implemented in
the design to reduce noise.
Multiphase operation can be easily employed with the
synchronization and phase mode controls. The LTM4616
hasclockinandclockoutforpolyphasingmultipledevices
or frequency synchronization.
With current mode control and internal feedback loop
compensation, the LTM4616 module has sufficient stabil-
ity margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors.
High efficiency at light loads can be accomplished with
selectableBurstModeoperationusingtheMODEpin.These
light load features will accommodate battery operation.
Efficiency graphs are provided for light load operation in
the Typical Performance Characteristics section.
Currentmodecontrolprovidescycle-by-cyclefastcurrent
limit and thermal shutdown in an overcurrent condition.
Internal overvoltage and undervoltage comparators pull
the open-drain PGOOD output low if the output feedback
voltage exits a 10% window around the regulation point.
The power good pins are disabled during margining.
Output voltage margining is supported, and can be pro-
gramedfrom 5%to 15%usingtheMGNandBSELpins.
4616fd
10
LTM4616
applications inForMation
The typical LTM4616 application circuit is shown in
Figure 18. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 3 for specific external capacitor
requirements for a particular application.
ceramic capacitors are included inside the module. Ad-
ditional input capacitors are only needed if a large load
step is required up to the 4A level. A 47µF to 100µF
surface mount aluminum electrolytic bulk capacitor can
be used for more input bulk capacitance. This bulk input
capacitor is only needed if the input source impedance is
compromisedbylonginductiveleads,tracesornotenough
source capacitance. If low impedance power planes are
used, then this 47µF capacitor is not needed.
V to V
Step-Down Ratios
IN
OUT
There are restrictions in the maximum V to V
step-
IN
OUT
down ratio that can be achieved for a given input voltage.
Each output of the LTM4616 is capable of 100% duty
For a buck converter, the switching duty-cycle can be
estimated as:
cycle, but the V to V
minimum drop out is still shown
IN
OUT
as a function of its load current. For a 5V input voltage,
VOUT
both outputs can deliver 8A for any output voltage. For a
3.3V input, all outputs can deliver 8A, except 2.5V
D =
V
and
IN
OUT
above which is limited to 6A. All outputs derived from a
2.7V input voltage are limited to 5A.
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
Output Voltage Programming
IOUT(MAX)
ICIN(RMS)
=
• D • 1– D
(
)
Each PWM controller has an internal 0.596V reference
voltage. As shown in the Block Diagram, a 10k internal
η%
In the above equation, η% is the estimated efficiency of
the power module so the RMS input current at the worst
case for 8A maximum current is about 4A. The input bulk
capacitor can be a switcher-rated aluminum electrolytic
capacitororpolymercapacitor.Eachinternal10µFceramic
input capacitor is typically rated for 2 amps of RMS ripple
current.
feedback resistor connects V
and FB pins together.
OUT
The output voltage will default to 0.596V with no feed-
back resistor. Adding a resistor R from FB pin to GND
FB
programs the output voltage:
10k + RFB
VOUT = 0.596V •
RFB
Table 2. FB Resistor vs Various Output Voltages
Output Capacitors
V
0.596V
Open
1.2V
10k
1.5V
1.8V
2.5V
3.3V
OUT
The LTM4616 is designed for low output voltage ripple
R
6.65k
4.87k
3.09k
2.21k
FB
noise. The bulk output capacitors defined as C
are
OUT
chosen with low enough effective series resistance (ESR)
For parallel operation of N number of outputs, the below
to meet the output voltage ripple and transient require-
equation can be used to solve for R . Tie the FB pins
FB
ments. C
can be a low ESR tantalum capacitor, low
together for each paralleled output with a single resistor
OUT
ESR polymer capacitor or ceramic capacitor. The typical
outputcapacitancerangeisfrom47µFto220µF.Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spikesisdesired.Table3showsamatrixofdifferentoutput
voltages and output capacitors to minimize the voltage
droop and overshoot during a 3A/µs transient. The table
optimizes total equivalent ESR and total bulk capacitance
tooptimizethetransientperformance.Stabilitycriteriaare
to ground as determined by:
10k / N
R
=
FB
V
OUT
− 1
0.596
Input Capacitors
The LTM4616 module should be connected to a low AC
impedance DC source. For each regulator, three 10µF
considered in the Table 3 matrix. LTpowerCAD is available
4616fd
11
LTM4616
applications inForMation
Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step
TYPICAL MEASURED VALUES
C
VENDORS
VALUE
PART NUMBER
C
VENDORS
OUT2
VALUE
PART NUMBER
4TPE470M
OUT1
TDK
22µF, 6.3V
22µF, 16V
100µF, 6.3V
100µF, 6.3V
C3216X7S0J226M
GRM31CR61C226K
C4532X5R0J107MZ
GRM32ER60J107M
Sanyo POSCAP
470µF, 4V
Murata
TDK
C
(BULK) VENDORS VALUE
PART NUMBER
10CE100FH
IN
SUNCON
100µF, 10V
Murata
V
C
C
C
C
V
(V)
DROOP PEAK-TO- PEAK
RECOVERY
TIME (µs)
LOAD STEP
R
FB
OUT
IN
IN
OUT1
OUT2
IN
(V)
1.0
1.0
1.0
1.0
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
2.5
3.3
3.3
(CERAMIC) (BULK)* (CERAMIC)
(BULK)
I
C1
C3
(mV)
20
30
30
25
20
20
30
30
32
25
22
25
30
25
42
25
35
25
35
35
35
32
50
32
65
40
DEVIATION (mV)
(A/µs)
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
(kΩ)
14.7
14.7
14.7
14.7
10
TH
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF × 2
100µF × 2
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 1
22µF × 1
100µF × 2
22µF × 1
100µF × 1
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 1
22µF × 1
100µF × 1
22µF × 1
100µF × 1
22µF × 1
470µF
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
5
40
60
60
50
40
41
60
60
64
50
42
50
60
50
80
50
70
50
70
20
40
65
100
65
135
87
40
25
25
25
25
25
20
25
20
25
25
25
25
25
25
30
30
30
30
30
30
40
30
40
30
40
5
2.7
2.7
5
470µF
470µF
470µF
470µF
470µF
470µF
470µF
470µF
470µF
470µF
470µF
470µF
5
10
2.7
2.7
5
10
10
6.65
6.65
6.65
6.65
6.65
6.65
4.87
4.87
4.87
4.87
4.87
4.87
3.09
3.09
3.09
3.09
2.21
2.21
5
3.3
3.3
2.7
2.7
5
5
3.3
3.3
2.7
2.7
5
5
3.3
3.3
5
5
*Bulk capacitance is optional if V has very low input impedance.
IN
forthosewhowishtoperformadditionalstabilityanalysis.
Multiphase operation will reduce effective output ripple as
a function of the number of phases. Application Note 77
discusses this noise reduction versus output ripple cur-
rent cancellation, but the output capacitance will be more
afunctionofstabilityandtransientresponse.LTpowerCAD
also calculates the output ripple reduction as the number
of phases increases.
Burst Mode Operation
The LTM4616 is capable of Burst Mode operation on each
regulator in which the power MOSFETs operate intermit-
tentlybasedonloaddemand,thussavingquiescentcurrent.
For applications where maximizing the efficiency at very
light loads is a high priority, Burst Mode operation should
be applied. To enable Burst Mode operation, simply tie the
MODEpintoV .Duringthisoperation,thepeakcurrentof
IN
the inductor is set to approximately 20% of the maximum
4616fd
12
LTM4616
applications inForMation
peak current value in normal operation even though the
voltage is in control of the current comparator threshold
throughout,andthetopMOSFETalwaysturnsonwitheach
oscillatorpulse.Duringstart-up,forcedcontinuousmodeis
disabled and inductor current is prevented from reversing
until the LTM4616’s output voltage is in regulation. Each
regulator can be configured for forced continuous mode.
voltage at the I pin indicates a lower value. The voltage
TH
at the I pin drops when the inductor’s average current
TH
is greater than the load requirement. As the I voltage
TH
drops below 0.2V, the BURST comparator trips, causing
the internal sleep line to go high and turn off both power
MOSFETs.
Multiphase Operation
In Burst Mode operation, the internal circuitry is partially
turned off, reducing the quiescent current to about 450µA
for each output. The load current is now being supplied
fromtheoutputcapacitors.Whentheoutputvoltagedrops,
For output loads that demand more than 8A of current,
two outputs in LTM4616 or even multiple LTM4616s can
be cascaded to run out-of-phase to provide more output
currentwithoutincreasinginputandoutputvoltageripple.
The CLKIN pin allows the LTC4616 to synchronize to an
external clock (between 0.75MHz and 2.25MHz) and the
internal phase-locked loop allows the LTM4616 to lock
onto CLKIN’s phase as well. The CLKOUT signal can be
connected to the CLKIN pin of the following LTM4616
stage to line up both the frequency and the phase of the
causingI toriseabove0.25V,theinternalsleeplinegoes
TH
low,andtheLTM4616resumesnormaloperation.Thenext
oscillator cycle will turn on the top power MOSFET and the
switching cycle repeats. Each regulator can be configured
for BurstMode operation.
Pulse-Skipping Mode Operation
entire system. Tying the PHMODE pin to SV , SGND or
IN
Inapplicationswherelowoutputrippleandhighefficiency
atintermediatecurrentsaredesired, pulse-skippingmode
should be used. Pulse-skipping operation allows the
LTM4616toskipcyclesatlowoutputloads,thusincreasing
efficiency by reducing switching loss. Floating the MODE
SV /2 (floating) generates a phase difference (between
IN
CLKIN and CLKOUT) of 180°, 120° or 90° respectively,
which corresponds to a 2-phase, 3-phase or 4-phase
operation. For a 6-phase example in Figure 2, the 2nd
stage that is 120° out-of-phase from the 1st stage can
generate a 240° (PHMODE = 0) CLKOUT signal for the 3rd
stage, which then can generate a CLKOUT signal that’s
pin or tying it to V /2 enables pulse-skipping operation.
IN
Thisallowsdiscontinuousconductionmode(DCM)opera-
tion down to near the limit defined by the chip’s minimum
on-time (about 100ns). Below this output current level,
the converter will begin to skip cycles in order to main-
tain output regulation. Increasing the output load current
slightly, above the minimum required for discontinuous
conduction mode, allows constant frequency PWM. Each
regulator can be configured for pulse-skipping mode.
420°, or 60° (PHMODE = SV ) for the 4th stage. With
IN
the 60° CLKIN input, the next two stages can shift 120°
(PHMODE = 0) for each to generate a 300° signal for the
6th stage. Finally, the signal with a 60° phase shift on the
6thstage(PHMODEisfloating)goesbacktothe1ststage.
Figure 3 shows the configuration for 12-phase operation.
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output
capacitors. The RMS input ripple current is reduced by,
and the effective ripple frequency is multiplied by, the
number of phases used (assuming that the input voltage
isgreaterthanthenumberofphasesusedtimestheoutput
voltage). The output ripple amplitude is also reduced by
the number of phases used.
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
outputrippleisdesired,forcedcontinuousoperationshould
be used. Forced continuous operation can be enabled by
tying the MODE pin to GND. In this mode, inductor cur-
rent is allowed to reverse during low output loads, the I
TH
4616fd
13
LTM4616
applications inForMation
(420)
60
0
120
240
180
300
+120
+120
+180
+120
+120
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 1
PHMODE
PHASE 3
S
VIN
PHMODE
PHASE 5
PHMODE
PHASE 2
PHMODE
PHASE 4
PHMODE
PHASE 6
4616 F02
Figure 2. 6-Phase Operation
(420)
60
0
120
240
180
300
+120
+120
+180
+120
+120
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 1
PHMODE
PHASE 5
S
VIN
PHMODE
PHASE 9
PHMODE
PHASE 3
PHMODE
PHASE 7
PHMODE
PHASE 11
V
OUT1
LTC6908-2
OUT2
IN
(510)
150
(390)
30
90
210
330
270
+120
+120
+180
+120
+120
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
CLKIN CLKOUT
PHMODE
PHASE 4
PHMODE
PHASE 8
S
VIN
PHMODE
PHASE 12
PHMODE
PHASE 6
PHMODE
PHASE 10
PHMODE
PHASE 2
4616 F03
Figure 3. 12-Phase Operation
The LTM4616 device is an inherently current mode con-
trolleddevice, soparallelmoduleswillhaveverygoodcur-
rent sharing. This will balance the thermals on the design.
in Figure 17. Figure 19 shows a schematic of the parallel
design.TheFBpinsoftheparallelmodulearetiedtogether.
Input RMS Ripple Current Cancellation
Tie the I pins of each LTM4616 together to share the
TH
current. Current sharing is inherently guaranteed by the
current mode operation of the LTM4616’s DC/DC regula-
tors. Moreover, the accuracy of current sharing between
the two outputs is approximately 15%. To reduce ground
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current can-
cellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reductionasafunctionofthenumberofinterleavedphases.
Figure 4 shows this graph.
potential noise, tie the I
pins of all LTM4616s together
THM
and then connect to the SGND of the master at the point it
connectstotheoutputcapacitorGND.Seelayoutguideline
4616fd
14
LTM4616
applications inForMation
0.60
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY FACTOR (V /V
)
O
IN
4616 F04
Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Channels (Phases)
Spread Spectrum Operation
between 70% and 130% of the nominal frequency. This
has the benefit of spreading the switching noise over a
rangeoffrequencies,thussignificantlyreducingthepeak
noise. Spread spectrum operation is disabled if CLKIN is
tied to ground or if it’s driven by an external frequency
synchronization signal. A capacitor value of 0.01µF to
0.1µFbeplacedfromthePLLLPFpintogroundtocontrol
the slew rate of the spread spectrum frequency change.
To ensure proper start-up, add a control ramp on the
Switching regulators can be particularly troublesome
where electromagnetic interference (EMI) is concerned.
Switching regulators operate on a cycle-by-cycle basis to
transfer power to an output. In most cases, the frequency
ofoperationisfixedbasedontheoutputload.Thismethod
of conversion creates large components of noise at the
frequency of operation (fundamental) and multiples of the
operating frequency (harmonics).
TRACK pin with a resistor, R , from TRACK to SV and
SR
IN
a capacitor, C , from TRACK to ground:
SR
To reduce this noise, the LTM4616 can run in spread
spectrum operation by tying the CLKIN pin to SV .
In spread spectrum operation, the LTM4616’s internal
oscillator is designed to produce a clock pulse whose
period is random on a cycle-by-cycle basis but fixed
IN
1
RSR
≥
0.592
– In 1–
•500 •C
SR
V
IN
4616fd
15
LTM4616
applications inForMation
CLKIN1
V
4V TO 5.5V
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
IN
MASTER
3.3V/7A
V
V
OUT1
IN1
SV
FB1
IN1
R
V
IN
RUN
10µF
FB1
RUN1
I
TH1
2.21k
100µF
PLLLPF1
MODE1
I
THM1
50k
50k
R
SR
PGOOD1
BSEL1
MGN1
PHMODE1
TRACK1
LTM4616
SLAVE
1.5V/8A
V
V
IN2
OUT2
FB2
C
SR
SV
IN2
R
RUN
10µF
FB2
RUN2
I
TH2
6.65k
100µF
100µF
PLLLPF2
MODE2
PHMODE2
TRACK2
I
MASTER
3.3V
THM2
PGOOD2
PGOOD
BSEL
R
BSEL2
MGN2
TB
10k
R
TA
SW2
SGND1
GND1
SGND2
GND2
6.65k
4616 F05
FOR TRACK1:
1. TIE TO VIN TO DISABLE TRACK WITH DEFAULT 100µs SOFT START
2. APPLY A CONTROL RAMP WITH R AND C TIED TO V WITH t = –(ln(1–0.596/V ) • R • C ))
SR
SR
IN
IN
SR
SR
3. APPLY AN EXTERNAL TRACKING RAMP DIRECTLY
Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking
Output Voltage Tracking
down with the same resistor values used to set the slave’s
output, then the slave will coincident track with the master
untilitreachesitsfinalvalue.Themasterwillcontinuetoits
final value from the slave’s regulation point. Voltage track-
Output voltage tracking can be programmed externally
using the TRACK pin. The output can be tracked up and
downwithanotherregulator.Themasterregulator’soutput
is divided down with an external resistor divider that is the
sameastheslaveregulator’sfeedbackdividertoimplement
coincident tracking. The LTM4616 uses an accurate 10k
resistor internally for the top feedback resistor. Figure 5
shows an example of coincident tracking:
ing is disabled when V
is more than 0.596V. R in
TRACK
TA
Figure 5 will be equal to R for coincident tracking.
FB
Thetrackpinofthemastercanbecontrolledbyanexternal
ramp or by R and C in Figure 5 referenced to V .
SR
SR
IN
The RC ramp time can be programmed using equation:
⎛
⎜
⎝
⎞
⎛
⎞
⎛
⎞
10k
RTA
0.596V
Slave = 1+
• VTRACK
t = – ln 1–
•RSR • CSR
⎟
⎜
⎟
⎜
⎟
⎠
V
⎝
⎠
⎝
⎠
IN
V
V
is the track ramp applied to the slave’s track pin.
has a control range of 0V to 0.596V, or the internal
Ratiometric tracking can be achieved by a few simple
calculations and the slew rate value applied to the mas-
ter’s track pin. As mentioned above, the TRACK pin has
TRACK
TRACK
reference voltage. When the master’s output is divided
4616fd
16
LTM4616
applications inForMation
a control range from 0V to 0.596V. The master’s TRACK
pin slew rate is directly equal to the master’s output slew
rate in Volts/Time:
Forapplicationsthatdonotrequiretrackingorsequencing,
simply tie the TRACK pin to SV to let RUN control the
IN
turn on/off. Connecting TRACK to SV also enables the
IN
~100µs of internal soft-start during start-up.
MR
• 10k = RTB
SR
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a 10% window around the regulation point. As shown
in Figure 20, the sequencing function can be realized in a
dualoutputapplicationbycontrollingtheRUNpinsandthe
PGOOD signals from each other. The 1.5V output begins
its soft starting after the PGOOD signal of 3.3V output
becomes high, and 3.3V output starts its shutdown after
the PGOOD signal of 1.5V output becomes low. This can
be applied to systems that require voltage sequencing
between the core and sub-power supplies.
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus R
TB
is equal to 10k. R is derived from equation:
TA
0.596V
RTA
=
VTRACK
V
V
FB
FB
+
–
10k RFB
RTB
where V is the feedback voltage reference of the regula-
FB
tor and V
is 0.596V. Since R is equal to the 10k
TRACK
TB
top feedback resistor of the slave regulator in coincident
tracking, then R is equal to R with V = V
.
TA
FB2
FB
TRACK
Stability Compensation
Therefore R = 10k and R = 6.65k in Figure 5. Figure 6
shows the output voltage for coincident tracking.
TB
TA
The module has already been internally compensated
for all output voltages. Table 2 is provided for most ap-
plication requirements. LTpowerCAD is available for fine
adjustments to the control loop.
MASTER OUTPUT
SLAVE OUTPUT
Output Margining
For a convenient system stress test on the LTM4616’s
output, the user can program each output to 5%, 10%
or 15% of its normal operational voltage. Margining
can be disabled by connecting the MGN pin to a voltage
divider as shown in Figure 5. When the MGN pin is <0.3V,
it forces negative margining, in which the output voltage
TIME
4616 F06
is below the regulation point. When MGN is >V – 0.3V,
IN
Figure 6. Output Voltage Coincident Tracking
the output voltage is forced above the regulation point.
The MGN pin with a voltage divider is driven with a small
tri-stategateasshowninFigure18forthreemarginstates,
(High, Low, andNoMargin). Theamountofoutputvoltage
margining is determined by the BSEL pin. When BSEL is
low, it’s 5%. When BSEL is high, it’s 10%. When BSEL is
floating, it’s 15%. When margining is active, the internal
output overvoltage and undervoltage comparators are
disabled and PGOOD remains high.
Inratiometrictracking, adifferentslewratemaybedesired
for the slave regulator. R can be solved for when SR
TB
is slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
For example: MR = 3.3V/ms and SR = 1.5V/ms. Then
R
TB
= 22.1k. Solve for R to equal to 4.87k.
TA
4616fd
17
LTM4616
applications inForMation
Thermal Considerations and Output Current Derating
moduletemperaturerisecanbeallowed.Asanexample,in
Figure 10 the load current is derated to 10A at ~ 80°C and
the power loss for the 5V to 1.2V at 10A output is ~3.2W.
If the 80°C ambient temperature is subtracted from the
115°C maximum junction temperature, then difference of
35°Cdividedby3.2Wequalsa10.9°C/W. Table4specifies
a 10.5°C/W value which is very close. Table 4 and Table 5
provide equivalent thermal resistances for 1.2V and 3.3V
outputs, with and without airflow and heat sinking. The
printed circuit board is a 1.6mm thick four layer board
with two ounce copper for the two outer layers and one
ouncecopperforthetwoinnerlayers.ThePCBdimensions
are 95mm × 76mm. The BGA heat sinks are listed below
Table 5. At load currents on each channel from 3A to 8A
(6A to16A in parallel on the derating curves), the thermal
resistance values in Tables 4 and 5 are fairly accurate. As
the load currents go below the 3A level on each channel
thethermalresistancestartstoincreaseduetothereduced
power loss on the board. The approximate thermal resis-
tance values for these lower currents is 15°C/W.
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to16 for calculating an approximate θ thermal
JA
resistance for the LTM4616 with various heat sinking and
airflow conditions. Both LTM4616 outputs are placed in
parallel for a total output current of 16A, and the power
loss curves are plotted for specific output voltages up to
16A. The derating curves are plotted with each output at
8A combined for a total of 16A. The output voltages are
1.2V, 2.5Vand3.3V. Thesearechosentoincludethelower
and higher output voltage ranges for correlating the ther-
mal resistance. Thermal models are derived from several
temperature measurements in a controlled temperature
chamber along with thermal modeling analysis. The junc-
tiontemperaturesaremonitoredwhileambienttemperature
increases with and without airflow. The junctions are
maintained at ~115°C while lowering output current or
power with increasing ambient temperature. The 115°C
value is chosen to allow for 10°C of margin relative to the
maximumtemperatureof125°C.Thedecreasedoutputcur-
rentwilldecreasetheinternalmodulelossasambienttem-
perature is increased. The power loss curves in Figures 7
and 8 show this amount of power loss as a function of
load current that is specified with both channels in paral-
lel. The monitored junction temperature of 115°C minus
the ambient operating temperature specifies how much
Safety Considerations
The LTM4616 modules do not provide isolation from V
IN
to V . There is no internal fuse. If required, a slow blow
OUT
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic
failure. The device does support thermal shutdown and
overcurrent protection.
8
7
6
5
4
3
2
8
7
6
5
4
3
2
1
1
5V 1.2V
3.3V 1.2V
IN
OUT
OUT
IN
OUT
OUT
5V 3.3V
IN
3.3V 2.5V
IN
0
0
8
0
4
12
16
8
0
4
12
16
LOAD CURRENT (A)
LOAD CURRENT (A)
4616 F08
4616 F07
Figure 7. 1.2V, 2.5V Power Loss
Figure 8. 1.2V, 3.3V Power Loss
4616fd
18
LTM4616
applications inForMation
16
14
12
10
8
16
14
12
10
8
16
14
12
10
8
400 LFM
400 LFM
400 LFM
0 LFM
200 LFM
0 LFM
0 LFM
200 LFM
6
6
200 LFM
6
4
4
4
2
2
2
0
0
0
55
70
85
55
70
85
25
40
100
115
25
115
60
70
80
40
100
40
50
90 100 110
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4616 F09
4616 F11
4616 F10
Figure 9. 5VIN to 3.3VOUT
with No Heat Sink
Figure 10. 5VIN to 1.2VOUT
with No Heat Sink
Figure 11. 5VIN to 3.3VOUT
with BGA Heat Sink
16
14
12
10
8
16
14
12
10
8
16
14
12
10
8
400 LFM
400 LFM
0 LFM
400 LFM
0 LFM
0 LFM
200 LFM
200 LFM
6
6
6
200 LFM
4
4
4
2
2
2
0
0
0
60
80
40
100
120
50
70
90
30
110
60
70
80
40
50
90 100 110
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4616 F13
4616 F14
4616 F12
Figure 12. 5VIN to 1.2VOUT
with BGA Heat Sink
Figure 13. 3.3VIN to 1.2VOUT
with No Heat Sink
Figure 14. 3.3VIN to 2.5VOUT
with No Heat Sink
16
14
12
10
16
14
12
10
8
400 LFM
400 LFM
0 LFM
0 LFM
8
6
4
2
0
200 LFM
6
200 LFM
4
2
0
50 60 70 80 90 100 110
AMBIENT TEMPERATURE (°C)
40
120
50
70
90
30
110
AMBIENT TEMPERATURE (°C)
4616 F15
4616 F16
Figure 15. 3.3VIN 1.2VOUT
with BGA Heat Sink
Figure 16. 3.3VIN 2.5VOUT
with BGA Heat Sink
4616fd
19
LTM4616
applications inForMation
Table 4. 1.2V Output
DERATING CURVE
Figures 10, 13
Figures 10, 13
Figures 10, 13
Figures 12, 15
Figures 12, 15
Figures 12, 15
V
(V)
POWER LOSS CURVE
Figures 7, 8
AIR FLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
IN
3.3, 5
3.3, 5
3.3, 5
3.3, 5
3.3, 5
3.3, 5
0
10.5
8.0
7.0
9.5
6.3
5.2
Figures 7, 8
200
400
0
None
Figures 7, 8
None
Figures 7, 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
Figures 7, 8
200
400
Figures 7, 8
Table 5. 3.3V Output
DERATING CURVE
Figure 9
V
(V)
POWER LOSS CURVE
Figure 8
AIR FLOW (LFM)
HEAT SINK
None
θ
(°C/W)
IN
JA
5
0
10.5
8.0
7.0
9.8
7.0
5.5
Figure 9
5
5
5
5
5
Figure 8
200
400
0
None
Figure 9
Figure 8
None
Figure 11
Figure 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
Figure 11
Figure 8
200
400
Figure 11
Figure 8
HEAT SINK MANUFACTURER
AAVID Thermalloy
PART NUMBER
WEBSITE
375424B00034G
www.aavidthermalloy.com
www.coolinnovations.com
Cool Innovations
4-050503P to 4-050508P
4616fd
20
LTM4616
applications inForMation
Layout Checklist/Example
•ꢀ To minimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
The high integration of LTM4616 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout con-
siderations are still necessary.
•ꢀ Do not put vias directly on the pads, unless they are
capped or plated over.
•ꢀ Use large PCB copper areas for high current paths,
•ꢀ Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to GND underneath the unit.
including V , V , GND1 and GND2, V and
IN1
IN2
OUT1
V
. It helps to minimize the PCB conduction loss
and thermal stress.
OUT2
•ꢀ For parallel modules, tie the I , FB and I
pins to-
THM
TH
•ꢀ Place high frequency ceramic input and output capaci-
gether. Use an internal layer to closely connect these
tors next to the V , GND and V
pins to minimize
pins together. All of the I pins connect to the SGND
ofthemasterregulator,thenthemasterSGNDconnects
IN
OUT
THM
high frequency noise.
to GND.
•ꢀ Place a dedicated power ground layer underneath the
unit.
Figure17givesagoodexampleoftherecommendedlayout.
V
V
OUT1
IN1
VIA TO GND
EACH CHANNEL
CONTROL1
M
L
C
OUT2
V
OUT1
C
IN1
V
IN1
K
J
H
G
F
GND1
GND1
CONTROL1 & 2
C
OUT2
E
V
OUT2
V
IN2
C
IN2
D
C
B
A
GND2
GND2
1
2
3
4
5
6
7
8
9
10
11
12
4616 F17
GND2
CONTROL2
LTM4616 TOP VIEW
GND2
Figure 17. Recommended PCB Layout
(LGA and BGA PCB Layouts Are Identical with the Exception of Circle Pads for BGA. See Package Description.)
4616fd
21
LTM4616
applications inForMation
CLKIN1
V
3V TO 5.5V
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
IN1
V
OUT1
V
V
IN1
OUT1
1.8V/8A
100µF
SV
FB1
IN1
10µF
4.87k
RUN1
I
TH1
PLLLPF1
MODE1
I
THM1
V
IN
PGOOD1
BSEL1
MGN1
A2
PGOOD
BSEL
+
R4
V
PHMODE1
TRACK1
–
+
50k
OUT
I
I
OE
IN
LTM4616
V
3V TO 5.5V
IN2
V
OUT2
V
V
IN2
OUT2
FB2
1.5V/8A
GND
R3
50k
SV
IN2
10µF
5 PIN SC70 PACKAGE
6.65k
100µF
×2
RUN2
I
TH2
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
V
IN
PGOOD2
BSEL2
MGN2
A1
PGOOD
BSEL
+
V
R2
50k
–
+
OUT
I
I
OE
IN
SW2
SGND1
GND1
SGND2
GND2
R1
50k
4616 F18
GND
5 PIN SC70 PACKAGE
BSEL: HIGH = 10%
FLOAT = 15%
LOW = 5%
A1, A2 PERICOM PI74ST1G126CEX
TOSHIBA TC7SZ126AFE
OE
IN
OUT
MGN MARGIN VALUE
H
H
L
H
L
X
H
L
Z
H
L
+ Value of BSEL Selection
– Value of BSEL Selection
VIN/2 No Margin
Figure 18. Typical 3V to 5.5VIN, to 1.8V, 1.5V Outputs
4616fd
22
LTM4616
applications inForMation
V
3V TO 5.5V
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
IN
V
OUT
V
V
IN1
OUT1
1.5V/16A
10µF
SV
FB1
IN1
100µF
RUN
ENABLE
RUN1
I
3.32k
TH1
PLLLPF1
MODE1
I
THM1
PGOOD1
BSEL1
MGN1
PHMODE1
TRACK1
LTM4616
V
V
IN2
OUT2
FB2
10µF
SV
IN2
100µF
100µF
RUN2
I
TH2
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
V
IN
PGOOD2
BSEL2
MGN2
50k
50k
SW2
SGND1
GND1
SGND2
GND2
4616 F19
Figure 19. LTM4616 Two Outputs Parallel, 1.5V at 16A Design
CLKIN
V
5V
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
IN
V
OUT1
V
V
OUT1
IN1
3.3V/7A
22µF
SHDNB
SV
FB1
IN1
V
IN
2.21k
RUN1
I
TH1
100µF
PLLLPF1
MODE1
I
THM1
50k
50k
100k
PGOOD1
BSEL1
MGN1
100k
SV
PHMODE1
TRACK1
PGOOD2
IN1
LTM4616
V
OUT2
V
V
IN2
OUT2
FB2
1.5V/8A
SV
IN2
100µF
RUN2
I
TH2
6.65k
100µF
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
100k
PGOOD2
BSEL2
MGN2
SHDNB
3.3V
1.5V
100k
PGOOD1
SV
IN2
SW2
SGND1
GND1
SGND2
GND2
4616 F20
Figure 20. LTM4616 Output Sequencing Application
4616fd
23
LTM4616
applications inForMation
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
V
V
IN
OUT
V
V
IN1
OUT1
3V TO 5.5V
1.2V AT 32A
+
C1
470µF
6.3V
10µF
6.3V
SV
FB1
IN1
2.47k
RUN1
I
TH1
PLLLPF1
MODE1
I
THM1
PGOOD1
BSEL1
MGN1
SANYO POSCAP
10mΩ
PHMODE1
TRACK1
TRACK INPUT
OR V
IN
LTM4616
V
V
IN2
OUT2
FB2
+
C2
470µF
6.3V
10µF
6.3V
SV
IN2
RUN2
I
TH2
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
PGOOD2
BSEL2
MGN2
SW2
SGND1
GND1
SGND2
GND2
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
V
V
OUT1
IN1
+
C3
470µF
6.3V
10µF
6.3V
SV
FB1
IN1
RUN1
I
TH1
PLLLPF1
MODE1
I
THM1
PGOOD1
BSEL1
MGN1
PHMODE1
TRACK1
LTM4616
V
V
IN2
OUT2
FB2
+
+
C5
22µF
6.3V
C4
22µF
6.3V
10µF
6.3V
SV
IN2
RUN2
I
TH2
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
PGOOD2
BSEL2
MGN2
V
IN
3V TO 5.5V
A1
+
R1
SW2
SGND1
GND1
SGND2
GND2
V
–
+
50k
4616 F21
I
I
OE
IN
OUT
R2
50k
GND
BSEL: HIGH = 10%
A1, A2 PERICOM PI74ST1G126CEX
TOSHIBA TC7SZ126AFE
6 PIN SC70 PACKAGE
FLOAT = 15%
LOW = 5%
OPTIONAL MARGINING CIRCUIT,
IF NOT USED TIE THE MGN PINS
TO A VOLTAGE EQUAL TO HALF
OE
IN
OUT
MGN MARGIN VALUE
OF THE RESPECTIVE V
IN
H
H
L
H
L
X
H
L
Z
H
L
+ Value of BSEL Selection
– Value of BSEL Selection
VIN/2 No Margin
Figure 21. Four Phase in Parallel, 1.2V at 32A
4616fd
24
LTM4616
applications inForMation
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
V
V
OUT1
IN
V
V
IN1
OUT1
3.3V/7A
100µF
4V TO 5.5V
10µF
RUN
ENABLE
SV
FB1
IN1
RUN1
I
2.21k
TH1
PLLLPF1
MODE1
I
THM1
V
IN
PGOOD1
BSEL1
MGN1
PHMODE1
TRACK1
50k
50k
LTM4616
V
OUT2
V
V
IN2
OUT2
2.5V/8A
100µF
SV
IN2
FB2
10µF
RUN2
I
3.16k
TH2
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
3.3V
10k
PGOOD2
BSEL2
MGN2
SW2
SGND1
GND1
SGND2
GND2
3.16k
SW1
CLKIN1 CLKOUT1 CLKIN2 CLKOUT2
V
OUT3
V
V
IN1
OUT1
1.8V/8A
100µF
SV
FB1
IN1
10µF
RUN1
I
4.99k
100µF
TH1
PLLLPF1
MODE1
I
THM1
3.3V
PGOOD1
BSEL1
MGN1
10k
PHMODE1
TRACK1
LTM4616
V
OUT4
4.99k
V
V
IN2
OUT2
FB2
1.5V/8A
100µF
SV
IN2
10µF
6.65k
RUN2
I
TH2
100µF
PLLLPF2
MODE2
PHMODE2
TRACK2
I
THM2
3.3V
PGOOD2
BSEL2
MGN2
10k
SW2
SGND1
GND1
SGND2
GND2
6.65k
4616 F22
Figure 22. 4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Tracking
4616fd
25
LTM4616
package Description
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
A1 GND1
A2 GND1
A3 GND1
A4 GND1
A5 GND1
A6 BSEL1
A7 CLKIN1
A8 MODE1
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
B1 GND1
B2 GND1
B3 GND1
B4 GND1
B5 GND1
B6 SW1
B7 GND1
B8 GND1
C1
C2
V
V
D1
D2
V
V
E1
E2
E3
E4
V
V
V
V
F1
F2
F3
F4
V
V
V
V
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
C3 GND1
C4 GND1
C5 GND1
C6 GND1
C7 GND1
C8 GND1
C9 GND1
C10 GND1
C11 GND1
C12 GND1
D3 GND1
D4 GND1
D5 GND1
D6 GND1
D7 GND1
D8 FB1
E5 SV
F5 SGND1
E6 PLLLPF1 F6 RUN1
E7 F7 CLKOUT1
F8
IN1
I
THM1
E8 TRACK1
E9 VOUT1
E10 VOUT1
E11 VOUT1
E12 VOUT1
I
TH1
A9 PHMODE1 B9 GND1
D9 VOUT1
D10 VOUT1
D11 VOUT1
D12 VOUT1
F9 VOUT1
F10 VOUT1
F11 VOUT1
F12 VOUT1
A10 MGN1
A11 PGOOD1
A12 GND1
B10 GND1
B11 GND1
B12 GND1
PIN NAME
G1 GND2
G2 GND2
G3 GND2
G4 GND2
G5 GND2
G6 BSEL2
G7 CLKIN2
G8 MODE2
PIN NAME
H1 GND2
H2 GND2
H3 GND2
H4 GND2
H5 GND2
H6 SW2
PIN NAME
PIN NAME
PIN NAME
PIN NAME
J1
J2
V
V
K1
K2
V
V
L1
L2
L3
L4
V
V
V
V
M1
M2
M3
M4
V
V
V
V
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
J3 GND2
J4 GND2
J5 GND2
J6 GND2
J7 GND2
J8 GND2
J9 GND2
J10 GND2
J11 GND2
J12 GND2
K3 GND2
K4 GND2
K5 GND2
K6 GND2
K7 GND2
K8 FB2
L5 SV
M5 SGND2
L6 PLLLPF2 M6 RUN2
L7 M7 CLKOUT2
M8
IN2
H7 GND2
H8 GND2
I
THM2
L8 TRACK2
L9 VOUT2
L10 VOUT2
L11 VOUT2
L12 VOUT2
I
TH2
G9 PHMODE2 H9 GND2
K9 VOUT2
K10 VOUT2
K11 VOUT2
K12 VOUT2
M9 VOUT2
M10 VOUT2
M11 VOUT2
M12 VOUT2
G10 MGN2
G11 PGOOD2
G12 GND2
H10 GND2
H11 GND2
H12 GND2
4616fd
26
LTM4616
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Z
b b b
Z
6 . 9 8 5 0
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
6 . 9 8 5 0
a a a
Z
4616fd
27
LTM4616
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
/ / b b b
Z
6 . 9 8 5 0
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
6 . 9 8 5 0
a a a
Z
4616fd
28
LTM4616
revision history (Revision history begins at Rev C)
REV
DATE
DESCRIPTION
PAGE NUMBER
C
2/11
Updated Features
1
Updated Pin Configuration
2
Updated Electrical Characteristics
Replaced graphs G05 and G06
2, 3, 4
5
Updated graph G18
6
Updated Pin Functions
7
Updated Simplified Block Diagram
Updated Operation section
8
9
Text updated in Applications Information section
Updated figures 3, 5, 17, 18, 19, 20, 21, 22
Updated Package Description table
Added Package Photo and updated Related Parts
Added BGA package option and MP temperature grade
Added BGA package option, MP temperature grade, thermal resistance, and device weight
Updated Note 2
10 through 20
13 through 24
25
28
1
D
3/12
2
4
Clarified Load Transient Response conditions
Updated recommended heat sinks Table
Corrected MGN Pin usage
5
20
24
30
Added package photo
4616fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
29
LTM4616
package photo
relateD parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC6908-2
Resistor Set Oscillator with Spread Spectrum
Modulation
Two Outputs 0°/90°, TSOT-23 and 2mm × 3mm DFN Packages
LTM4600
10A DC/DC µModule Regulator
Basic 10A DC/DC µModule Regulator, LGA Package
LTM4600HVMP
Military Plastic 10A DC/DC µModule Regulator
Guaranteed Operation from –55°C to 125°C Ambient, LGA Package
LTM4601/
LTM4601A
12A DC/DC µModule Regulator with PLL, Output
Tracking/Margining and Remote Sensing
Synchronizable, PolyPhase Operation, LTM4601-1/LTM4601A-1 Version Has
No Remote Sensing, LGA Package
LTM4602
LTM4603
6A DC/DC µModule Regulator
Pin Compatible with the LTM4600, LGA Package
6A DC/DC µModule Regulator with PLL and Output Synchronizable, PolyPhase Operation, LTM4603-1 Version Has No Remote
Tracking/Margining and Remote Sensing
Sensing, Pin Compatible with the LTM4601, LGA Package
LTM4604A
LTM4608A
Low V 4A DC/DC µModule Regulator
2.375V ≤ V ≤ 5.5V, 0.8V ≤ V
≤ 5V, 9mm × 15mm × 2.32mm LGA Package
OUT
IN
IN
Low V 8A DC/DC µModule Regulator
2.7V ≤ V ≤ 5.5V; 0.6V ≤ V
≤ 5V; 9mm × 15mm × 2.82mm LGA Package
IN
IN
OUT
LTM8022/LTM8023 36V , 1A and 2A DC/DC µModule Regulator
Pin Compatible; 4.5V ≤ V ≤ 36V; 9mm × 11.25mm × 2.82mm LGA Package
IN
IN
4616fd
LT 0312 REV D • PRINTED IN USA
30 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
l
l
LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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