LTC4088EDE_技术文档

LTC4088

High Efﬁciency Battery

Charger/USB Power Manager

U

DESCRIPTIO

FEATURES

The LTC^®4088 is a high efﬁciency USB PowerPath^TM

controller and Li-Ion/Polymer battery charger. It includes

a synchronous switching input regulator, a full-featured

batterychargerandanidealdiode.Designedspeciﬁcallyfor

USBapplications,theLTC4088’sswitchingregulatorauto-

matically limits its input current to either 100mA, 500mA

or 1A for wall-powered applications via logic control.

■

Switching Regulator Makes Optimal Use of Limited

Power Available from USB Port to Charge Battery

and Power Application

180mΩ Internal Ideal Diode Plus Optional External

■

Ideal Diode Controller Seamlessly Provides Low

Loss Power Path When Input Power is Limited or

Unavailable

■

Full Featured Li-Ion/Polymer Battery Charger

The switching input stage provides power to V

where

OUT

■

V

BUS

Operating Range: 4.25V to 5.5V (7V Absolute

power sharing between the application circuit and the

battery charger is managed. Unlike linear PowerPath

controllers, the LTC4088’s switching input stage can use

nearly all of the 0.5W or 2.5W available from the USB port

with minimal power dissipation. This feature allows the

LTC4088 to provide more power to the application and

eases thermal issues in space-constrained applications.

Maximum—Transient)

■

1.2A Maximum Input Current Limit

1.5A Maximum Charge Current with Thermal Limiting

Bat-Track^TMAdaptive Output Control

Slew Control Reduces Switching EMI

Low Proﬁle (0.75mm) 14-Lead 4mm × 3mm DFN

Package

An ideal diode ensures that system power is available

from the battery when the input current limit is reached

or if the USB or wall supply is removed.

U

APPLICATIO S

■

Media Players

The LTC4088 is available in the low proﬁle 14-Lead 4mm

× 3mm × 0.75mm DFN surface mount package.

, LTC and LT are registered trademarks of Linear Technology Corporation.

PowerPath and Bat-Track are trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents, including 6522118

■

Digital Cameras

■

GPS

PDAs

Smart Phones

■

U

TYPICAL APPLICATIO

Switching Regulator Efﬁciency to

System Load (P /P

)

High Efﬁciency Battery Charger/USB Power Manager

OUT BUS

100

90

80

70

60

50

40

30

20

10

0

WALL

USB

3.3µH

SYSTEM

LOAD

V

D0

D1

D2

CHRG

LDO3V3

SW

V

OUT

BUS

BAT = 4.2V

10µF

GATE

BAT

BAT = 3.3V

LTC4088

10µF

3.3V

CLPROG

PROG C/X GND NTC

V

I

= 5V

BUS

BAT

1µF

+

= 0mA

8.2Ω

Li-Ion

2.94k

499Ω

0.1µF

10x MODE

4088 TA01a

0.01

0.1

(A)

1

I

OUT

4088 TA01b

4088f

1

LTC4088

W W U W

U

W

U

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

TOP VIEW

V

(Transient) t < 1ms, Duty Cycle < 1%.. –0.3V to 7V

(Static), BAT, CHRG, NTC, D0,

BUS

NTC

CLPROG

LDO3V3

D2

1

2

3

4

5

6

7

14 D1

13 D0

12 SW

D1, D2.......................................................... –0.3V to 6V

I

....................................................................3mA

CLPROG

PROG C/X

LDO3V3

CHRG

OUT

SW

BAT

15

11

10

9

V

BUS

OUT

, I ................................................................2mA

C/X

...................................................................30mA

PROG

CHRG

BAT

......................................................................75mA

8

GATE

.............................................................................2A

DE PACKAGE

14-LEAD (4mm × 3mm) PLASTIC DFN

= 125°C, θ = 37°C/W

JA

EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB

..............................................................................2A

.............................................................................2A

T

JMAX

Maximum Operating Junction Temperature .......... 125°C

Operating Temperature Range ................. –40°C to 85°C

Storage Temperature Range................... –65°C to 125°C

ORDER PART NUMBER

LTC4088EDE

DE PART MARKING

4088

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS ^The

●

denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T = 25°C. V

= 5V, BAT = 3.8V, R

= 2.94k, unless otherwise noted.

CLPROG

A

BUS

CONDITIONS

SYMBOL

PARAMETER

MIN

TYP

MAX

UNITS

Input Power Supply

●

V

Input Supply Voltage

Total Input Current

4.35

5.5

V

BUS

●

I

1x Mode

5x Mode

10x Mode

Low Power Suspend Mode

High Power Suspend Mode

92

445

815

0.32

1.6

97

100

500

1000

0.50

2.5

mA

BUS(LIM)

470

877

0.39

2.05

I

(Note 4)

Input Quiescent Current

1x Mode

6

mA

BUSQ

5x Mode

14

10x Mode

Low Power Suspend Mode

High Power Suspend Mode

14

0.038

h

(Note 4) Ratio of Measured V

Current to

BUS

1x Mode

224

1133

2140

11.3

59.4

mA/mA

CLPROG

CLPROG Program Current

5x Mode

10x Mode

Low Power Suspend Mode

High Power Suspend Mode

I

V

Current Available Before

OUT

1x Mode, BAT = 3.3V

135

672

1251

0.4

mA

OUT

Discharging Battery

5x Mode, BAT = 3.3V

10x Mode, BAT = 3.3V

Low Power Suspend Mode

High Power Suspend Mode

0.26

1.6

0.41

2.46

2.04

V

CLPROG Servo Voltage in Current Limit 1x, 5x, 10x Modes

Suspend Modes

1.188

100

V

mV

CLPROG

4088f

2

LTC4088

ELECTRICAL CHARACTERISTICS ^The

●

denotes the speciﬁcations which apply over the full operating

= 5V, BAT = 3.8V, R = 2.94k, unless otherwise noted.

temperature range, otherwise speciﬁcations are at T = 25°C. V

A

BUS

CLPROG

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Undervoltage Lockout

Rising Threshold

Falling Threshold

4.30

4.00

4.35

V

UVLO

DUVLO

OUT

BUS

3.95

V

to BAT Differential Undervoltage

Rising Threshold

Falling Threshold

200

50

mV

BUS

Lockout

V

Voltage

1x, 5x, 10x Modes, 0V < BAT ≤ 4.2V,

3.5

BAT + 0.3

4.7

V

OUT

I

= 0mA, Battery Charger Off

OUT

USB Suspend Modes, I

= 250µA

4.5

1.8

4.6

4.7

2.7

V

MHz

Ω

OUT

f

Switching Frequency

2.25

0.18

0.30

OSC

R

PMOS On Resistance

NMOS On Resistance

Peak Inductor Current Clamp

PMOS

NMOS

PEAK

Ω

I

1x, 5x Modes

10x Mode

2

3

A

Ω

R

Suspend LDO Output Resistance

15

SUSP

Battery Charger

V

BAT Regulated Output Voltage

Constant-Current Mode Charge Current

Battery Drain Current

4.179

4.165

4.200

4.221

4.235

V

FLOAT

0°C ≤ T ≤ 85°C

A

I

R

PROG

R

PROG

= 1k

= 5k

980

192

1030

206

1080

220

mA

CHG

V

> V , PowerPath Switching

UVLO

3.5

5

µA

BAT

BUS

Regulator On, Battery Charger Off,

I

= 0µA

OUT

V

= 0V, I

= 0µA (Ideal Diode Mode)

OUT

23

35

µA

V

BUS

V

PROG Pin Servo Voltage

1.000

0.100

PROG

PROG Pin Servo Voltage in Trickle

Charge

BAT < V

V

PROG,TRKL

TRKL

h

Ratio of I to PROG Pin Current

1031

2.85

135

–100

4.0

mA/mA

V

PROG

BAT

V

Trickle Charge Threshold Voltage

Trickle Charge Hystersis Voltage

Recharge Battery Threshold Voltage

Safety Timer Termination Period

Bad Battery Termination Time

BAT Rising

2.7

3.0

TRKL

ΔV

mV

TRKL

RECHRG

TERM

V

Threshold Voltage Relative to V

–80

3.2

0.4

85

–120

4.8

mV

FLOAT

t

I

Timer Starts when V = V

Hour

BAT

FLOAT

BAT < V

0.5

0.6

BADBAT

C/X

TRKL

Battery Charge Current at Programmed

End of Charge Indication

R

C/X

R

C/X

= 1k

= 5k

100

20

115

mA

V

C/X Threshold Voltage

100

1031

65

mV

mA/mA

mV

C/X

h

Battery Charge Current Ratio to C/X

CHRG Pin Output Low Voltage

CHRG Pin Input Current

C/X

V

I

= 5mA

100

1

CHRG

I

BAT = 4.5V, V

= 5V

0

µA

CHRG

Ω

R

Battery Charger Power FET

I

= 200mA

BAT

0.18

ON_CHG

On-Resistance (Between V

and BAT)

OUT

T

LIM

Junction Temperature in Constant

Temperature Mode

110

°C

4088f

3

LTC4088

ELECTRICAL CHARACTERISTICS ^The

●

denotes the speciﬁcations which apply over the full operating

= 5V, BAT = 3.8V, R = 2.94k, unless otherwise noted.

temperature range, otherwise speciﬁcations are at T = 25°C. V

A

BUS

CLPROG

SYMBOL

NTC

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Cold Temperature Fault Threshold

Voltage

Rising Threshold

Hysteresis

75.0

33.4

0.7

76.5

1.5

78.0

36.4

2.7

%V

COLD

HOT

DIS

BUS

Hot Temperature Fault Threshold

Voltage

Falling Threshold

Hysteresis

34.9

1.5

%V

BUS

NTC Disable Threshold Voltage

Falling Threshold

Hysteresis

1.7

50

%V

BUS

mV

I

NTC Leakage Current

V

NTC

= V = 5V

BUS

–50

50

nA

NTC

Ideal Diode

V

FWD

Forward Voltage Detection

I

= 10mA

= 0V, I

15

2

mV

OUT

BUS

V

= 10mA

OUT

Ω

R

Internal Diode On Resistance, Dropout

Diode Current Limit

I

= 200mA

0.18

DROPOUT

OUT

I

2

A

MAX

Always On 3.3V Supply

V

Regulated Output Voltage

0mA < I

< 25mA

3.1

3.3

25

3.4

0.4

V

Ω

LDO3V3

R

Open-Loop Output Resistance

Closed-Loop Output Resistance

OL3V3

CL3V3

3.6

Logic (D0, D1, D2)

V

Input Low Voltage

V

IL

IH

Input High Voltage

1.2

I

Static Pull-Down Current

V

= 1V

2

µA

PD

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC4088E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 3: The LTC4088E includes overtemperature protection that is

intended to protect the device during momentary overload conditions.

Junction temperature will exceed 125°C when overtemperature protection

is active. Continuous operation above the speciﬁed maximum operating

junction temperature may impair device reliability.

Note 4: Total input current is the sum of quiescent current, I

, and

BUSQ

measured current given by V

/R

• (h

+ 1)

CLPROG CLPROG

CLPROG

4088f

4

LTC4088

U W

T = 25°C unless otherwise noted.

TYPICAL PERFOR A CE CHARACTERISTICS

A

Ideal Diode Resistance

vs Battery Voltage

Output Voltage vs Output Current

(Battery Charger Disabled)

Ideal Diode V-I Characteristics

1.0

0.8

0.6

0.4

0.2

0

0.25

0.20

0.15

0.10

0.05

0

4.50

4.25

4.00

3.75

3.50

3.25

V

= 5V

INTERNAL IDEAL DIODE

WITH SUPPLEMENTAL

EXTERNAL VISHAY

Si2333 PMOS

BUS

V

= 4V

BAT

5x MODE

INTERNAL IDEAL

DIODE

INTERNAL IDEAL

DIODE ONLY

V

= 3.4V

BAT

INTERNAL IDEAL DIODE

WITH SUPPLEMENTAL

EXTERNAL VISHAY

Si2333 PMOS

V

= 0V

= 5V

BUS

0

0.04

0.08

0.12

0.16

0.20

2.7

3.0

3.3

3.6

3.9

4.2

0

200

400

600

800

1000

FORWARD VOLTAGE (V)

BATTERY VOLTAGE (V)

OUTPUT CURRENT (mA)

4088 G01

4088 G02

4088 G03

USB Limited Battery Charge

Current vs Battery Voltage

USB Limited Battery Charge

Current vs Battery Voltage

Battery Drain Current

vs Battery Voltage

150

125

700

600

25

20

15

10

5

I

= 0µA

OUT

V

= 0V

BUS

V

R

= 5V

BUS

500

400

300

200

100

0

V

R

= 5V

BUS

= 1k

PROG

CLPROG

100

75

= 1k

PROG

CLPROG

= 2.94k

50

25

0

V

= 5V

BUS

(SUSPEND MODE)

1x USB SETTING,

BATTERY CHARGER SET FOR 1A

5x USB SETTING,

BATTERY CHARGER SET FOR 1A

0

3.0

3.3

3.6

4.2

2.7 3.0 3.3 3.6

BATTERY VOLTAGE (V)

3.9

4.2

2.7

3.9

2.7

3.0

3.3

3.6

3.9

4.2

BATTERY VOLTAGE (V)

4088 G04

4088 G05

4088 G06

Battery Charging Efﬁciency vs

PowerPath Switching Regulator

Efﬁciency vs Output Current

V

Current vs V

Voltage

Battery Voltage with No External

BUS

(Suspend)

Load (P /P

)

BAT BUS

100

90

80

70

60

50

40

90

88

86

84

82

80

50

40

30

20

10

0

V

= 3.8V

BAT

I

= 0mA

R

OUT

= 2.94k

OUT

CLPROG

PROG

5x, 10x MODE

= 1k

1x MODE

I

= 0mA

5x CHARGING

EFFICIENCY

1x CHARGING

EFFICIENCY

0.01

0.1

OUTPUT CURRENT (A)

1

2.7

3.0

3.3

3.6

3.9

4.2

1

2

3

4

5

6

BATTERY VOLTAGE (V)

V

VOLTAGE (V)

BUS

4088 G07

⁴⁰⁸⁸4^G00⁹88f

4088 G08

5

LTC4088

U W

T = 25°C unless otherwise noted.

A

TYPICAL PERFOR A CE CHARACTERISTICS

Output Voltage vs Output Current

in Suspend

V

Current vs Output Current in

3.3V LDO Output Voltage

BUS

Suspend

vs Load Current, V

= 0V

BUS

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

3.4

3.2

3.0

2.8

2.6

V

= 3.5V

V

R

= 5V

= 3.3V

BAT

V

BAT

= 3.9V, 4.2V

BUS

BAT

V

= 3.4V

BAT

5x MODE

V

= 3.6V

BAT

= 2.94k

CLPROG

5x MODE

1x MODE

V

= 3V

BAT

V

= 3.1V

BAT

V

R

= 5V

BUS

BAT

1x MODE

1.5

V

= 3.2V

= 3.3V

BAT

= 2.94k

CLPROG

V

= 3.3V

BAT

0

0.5

1

1.5

2

2.5

0

0.5

1

2

2.5

0

5

10

15

20

25

OUTPUT CURRENT (mA)

OUTPUT LOAD CURRENT (mA)

LOAD CURRENT (mA)

4088 G10

4088 G11

4088 G12

Battery Charge Current vs

Temperature

Battery Charger Float Voltage vs

Temperature

Low-Battery (Instant-On) Output

Voltage vs Temperature

4.21

4.20

4.19

4.18

4.17

3.68

600

500

400

300

200

100

0

V

= 2.7V

BAT

OUT

I

= 100mA

5x MODE

3.66

3.64

3.62

3.60

THERMAL REGULATION

60 80

20 40

TEMPERATURE (°C)

–40

–15

35

TEMPERATURE (°C)

60

–40 –20

0

100 120

10

85

–40

–15

10

35

60

85

TEMPERATURE (°C)

4088 G13

4088 G14

4088 G15

Oscillator Frequency vs

Temperature

V

Quiescent Current vs

Quiescent Current in Suspend vs

Temperature

BUS

Temperature

2.35

2.30

2.25

2.20

2.15

2.10

15

12

9

46

V

I

= 5V

= 0µA

V

I

= 5V

BUS

OUT

BUS

OUT

5x MODE

= 0mA

44

SUSP HI

42

40

38

36

34

1x MODE

6

3

–40

–15

10

35

60

85

–40

–15

10

35

60

85

–40

–15

10

35

60

85

TEMPERATURE (°C)

4088 G16

4088 G17

4088 G18

4088f

6

LTC4088

U W

TYPICAL PERFOR A CE CHARACTERISTICS

T = 25°C unless otherwise noted.

A

CHRG Pin Current vs Voltage

(Pull-Down State)

3.3V LDO Transient Response

(5mA to 15mA)

Suspend LDO Transient Response

(500µA to 1mA)

100

80

60

40

20

0

V

= 5V

= 3.8V

BUS

BAT

I

LDO3V3

OUT

5mA/DIV

500 A/DIV

0mA

V

OUT

V

LDO3V3

20mV/DIV

AC COUPLED

4088 G20

4088 G21

V

= 3.8V

20µs/DIV

500 s/DIV

BAT

0

1

2

3

4

5

CHRG PIN VOLTAGE (V)

4088 G19

U

PI FU CTIO S

NTC (Pin 1): Input to the NTC Thermistor Monitoring

Circuits. The NTC pin connects to a negative temperature

coefﬁcient thermistor which is typically co-packaged with

the battery pack to determine if the battery is too hot or

too cold to charge. If the battery’s temperature is out of

range, chargingispauseduntilthebatterytemperaturere-

enters the valid range. A low drift bias resistor is required

LDO3V3 (Pin 3): LDO Output. The LDO3V3 pin provides

a regulated, always-on 3.3V supply voltage. This pin gets

its power from V . It may be used for light loads such

OUT

as a real-time clock or housekeeping microprocessor. A

1µF capacitor is required from LDO3V3 to ground if it will

be called upon to deliver current. If the LDO3V3 output is

not used it should be disabled by connecting it to V

.

OUT

from V

to NTC and a thermistor is required from NTC

BUS

D2 (Pin 4): Mode Select Input Pin. D2, in combination

with the D0 pin and D1 pin, controls the current limit and

battery charger functions of the LTC4088 (see Table 1).

This pin is pulled low by a weak current sink.

to ground. If the NTC function is not desired, the NTC pin

should be grounded.

CLPROG (Pin 2): USB Current Limit Program and Monitor

Pin. A 1% resistor from CLPROG to ground determines

C/X(Pin5):EndofChargeIndicationProgramPin.Thispin

is used to program the current level at which a completed

charge cycle is indicated by the CHRG pin.

the upper limit of the current drawn from the V

pin.

BUS

, is sent

A precise fraction of the input current, h

CLPROG

to the CLPROG pin when the high side switch is on. The

switching regulator delivers power until the CLPROG

pin reaches 1.188V. Therefore, the current drawn from

PROG (Pin 6): Charge Current Program and Charge Cur-

rent Monitor Pin. Connecting a 1% resistor from PROG

to ground programs the charge current. If sufﬁcient input

powerisavailableinconstant-currentmode,thispinservos

to 1V. The voltage on this pin always represents the actual

charge current by using the following formula:

V

will be limited to an amount given by h

and

BUS

R

CLPROG

available,

. There are several ratios for h

CLPROG

two of which correspond to the 500mA and 100mA USB

speciﬁcations. A multilayer ceramic averaging capacitor

is also required at CLPROG for ﬁltering.

V_PROG

R_PROG

I_BAT

=

•1031

4088f

7

LTC4088

U

PI FU CTIO S

BAT to V

ensures that V

is powered even if the load

CHRG (Pin 7): Open-Drain Charge Status Output. The

CHRG pin indicates the status of the battery charger. Four

possible states are represented by CHRG: charging, not

charging (or ﬂoat charge current less than programmed

endofchargeindicationcurrent),unresponsivebatteryand

battery temperature out of range. CHRG is modulated at

35kHz and switches between a low and a high duty cycle

foreasyrecognitionbyeitherhumansormicroprocessors.

CHRG requires a pull-up resistor and/or LED to provide

indication.

OUT

exceeds the allotted power from V

or if the V

power

BUS

source is removed. V

impedance multilayer ceramic capacitor.

should be bypassed with a low

OUT

V

(Pin 11): Input voltage for the switching PowerPath

BUS

controller. V

will usually be connected to the USB port

BUS

of a computer or a DC output wall adapter. V

should

BUS

be bypassed with a low impedance multilayer ceramic

capacitor.

SW (Pin 12): The SW pin delivers power from V

to

BUS

GATE (Pin 8): Ideal Diode Ampliﬁer Output. This pin con-

trols the gate of an optional external P-channel MOSFET

transistorusedtosupplementtheinternalidealdiode. The

source of the P-channel MOSFET should be connected to

V

via the step-down switching regulator. An inductor

OUT

should be connected from SW to V . See the Applica-

OUT

tions Information section for a discussion of inductance

value and current rating.

V

and the drain should be connected to BAT.

OUT

D0 (Pin 13): Mode Select Input Pin. D0, in combination

with the D1 pin and the D2 pin, controls the current limit

andbatterychargerfunctionsoftheLTC4088(seeTable 1).

This pin is pulled low by a weak current sink.

BAT (Pin 9): Single Cell Li-Ion Battery Pin. Depending on

availablepowerandload,aLi-IonbatteryonBATwilleither

deliver system power to V

through the ideal diode or

OUT

be charged from the battery charger.

D1 (Pin 14): Mode Select Input Pin. D1, in combination

with the D0 pin and the D2 pin, controls the current limit

andbatterychargerfunctionsoftheLTC4088(seeTable 1).

This pin is pulled low by a weak current sink.

V

(Pin 10): Output voltage of the switching Power-

OUT

Path controller and input voltage of the battery charger.

The majority of the portable product should be powered

from V . The LTC4088 will partition the available power

OUT

Exposed Pad (Pin 15): GND. Must be soldered to the

PCB to provide a low electrical and thermal impedance

connection to ground.

between the external load on V

and the internal battery

OUT

charger. Priority is given to the external load and any extra

power is used to charge the battery. An ideal diode from

4088f

8

LTC4088

W

BLOCK DIAGRA

4088f

9

LTC4088

U

OPERATIO

Introduction

Input Current Limited Step Down Switching Regulator

The power delivered from V to V is controlled

by a 2.25MHz constant frequency step-down switching

regulator. To meet the USB maximum load speciﬁcation,

the switching regulator contains a measurement and

control system that ensures that the average input cur-

rent remains below the level programmed at CLPROG.

The LTC4088 includes a PowerPath controller, battery

charger, internal ideal diode, optional external ideal diode

controller, SUSPEND LDO and an always-on 3.3V LDO.

DesignedspeciﬁcallyforUSBapplications,thePowerPath

controller incorporates a precision average input current

limited step-down switching regulator to make maximum

use of the allowable USB power. Because power is con-

BUS

OUT

V

drives the combination of the external load and the

OUT

served, the LTC4088 allows the load current on V

to

battery charger.

OUT

exceed the current drawn by the USB port without exceed-

ing the USB load speciﬁcations.

If the combined load does not cause the switching power

supply to reach the programmed input current limit, V

OUT

Theswitchingregulatorandbatterychargercommunicate

to ensure that the average input current never exceeds the

USB speciﬁcations.

will track approximately 0.3V above the battery voltage.

By keeping the voltage across the battery charger at this

low level, power lost to the battery charger is minimized.

Figure 1 shows the power path components.

The ideal diodes from BAT to V

guarantee that ample

even if there is insuf-

OUT

power is always available to V

ﬁcient or absent power at V

Ifthecombinedexternalloadplusbatterychargecurrentis

largeenoughtocausetheswitchingpowersupplytoreach

the programmed input current limit, the battery charger

will reduce its charge current by precisely the amount

necessary to enable the external load to be satisﬁed. Even

if the battery charge current is programmed to exceed the

allowable USB current, the USB speciﬁcation for average

input current will not be violated; the battery charger will

reduce its current as needed. Furthermore, if the load cur-

.

BUS

To prevent battery drain when a device is connected to a

suspended USB port, an LDO from V to V provides

BUS

OUT

either low power or high power suspend current to the

application.

Finally,an“alwayson”LDOprovidesaregulated3.3Vfrom

V

. This LDO will be on at all times and can be used to

OUT

supply up to 25mA to a system microprocessor.

rent at V

exceeds the programmed power from V

,

OUT

BUS

SYSTEM LOAD

3.5V TO

(BAT + 0.3V)

TO USB

OR WALL

ADAPTER

V

BUS

SW

OUT

11

12

10

I

/N

SWITCH

V

PWM AND

GATE DRIVE

IDEAL

DIODE

OPTIONAL

EXTERNAL

IDEAL DIODE

PMOS

+

–

GATE

BAT

CONSTANT CURRENT

CONSTANT VOLTAGE

BATTERY CHARGER

OV

8

9

–

+

15mV

–

+

–

+

0.3V

CLPROG

1.188V

2

+

–

3.6V

AVERAGE INPUT

CURRENT LIMIT

CONTROLLER

AVERAGE OUTPUT

VOLTAGE LIMIT

CONTROLLER

+

SINGLE CELL

Li-Ion

4088 F01

Figure 1

4088f

10

LTC4088

U

OPERATIO

load current will be drawn from the battery via the ideal

diodes even when the battery charger is enabled.

Table 1. Controlled Input Current Limit

CHARGER

D0

D1

D2

STATUS

I

BUS(LIM)

The current at CLPROG is a precise fraction of the V

BUS

0

On

100mA (1x)

current. When a programming resistor and an averaging

capacitorareconnectedfromCLPROGtoGND,thevoltage

on CLPROG represents the average input current of the

switching regulator. As the input current approaches the

programmed limit, CLPROG reaches 1.188V and power

delivered by the switching regulator is held constant.

Several ratios of current are available which can be set

to correspond to USB low and high power modes with a

single programming resistor.

0

1

Off

0

1

0

On

500mA (5x)

0

1

Off

500mA (5x)

1

0

On

1A (10x)

1

0

1

Off

1A (10x)

1

0

Off

500µA (Susp Low)

2.5mA (Susp High)

1

Off

the voltage at BAT. However, if the voltage at BAT is below

3.3V,andtheloadrequirementdoesnotcausetheswitching

The input current limit is programmed by various com-

binations of the D0, D1 and D2 pins as shown in Table 1.

The switching input regulator can also be deactivated

(USB Suspend).

regulator to exceed its current limit, V

will regulate at a

OUT

ﬁxed 3.6V as shown in Figure 2. This will allow a portable

producttorunimmediatelywhenpowerisappliedwithout

waiting for the battery to charge.

TheaverageinputcurrentwillbelimitedbytheCLPROGpro-

grammingresistoraccordingtothefollowingexpression:

If the load does exceed the current limit at V , V

will

BUS OUT

range between the no-load voltage and slighly below the

V_CLPROG

R_CLPROG

batteryvoltage,indicatedbytheshadedregionofFigure 2.

I_VBUS=I_BUSQ

+

• h

(

+1

)

CLPROG

Ifthereisnobatterypresentwhenthishappens, V

collapse to ground.

may

OUT

where I

CLPROG

is the quiescent current of the LTC4088,

BUSQ

The voltage regulation loop compensation is controlled by

V

is the CLPROG servo voltage in current limit,

is the value of the programming resistor and

the capacitance on V . An MLCC capacitor of 10µF is

OUT

R

CLPROG

required for loop stability. Additional capacitance beyond

h

is the ratio of the measured current at V

to

CLPROG

BUS

this value will improve transient response.

the sample current delivered to CLPROG. Refer to the

Electrical Characteristics table for values of h

,

CLPROG

4.5

4.2

3.9

V

and I

. Given worst-case circuit tolerances,

CLPROG

BUSQ

the USB speciﬁcation for the average input current of 1x

or 5x mode will not be violated, provided that R

2.94k or greater.

is

CLPROG

NO LOAD

3.6

300mV

Table 1 shows the available settings for the D0, D1 and

D2 pins.

3.3

3.0

2.7

2.4

Notice that when D0 is high and D1 is low, the switching

regulator is set to a higher current limit for increased

charging and power availability at V . These modes

OUT

3.6

4.2

2.4

2.7

3.0

3.3

3.9

will typically be used when there is line power available

BAT (V)

from a wall adapter.

4088 F02

While not in current limit, the switching regulator’s Bat-

Figure 2. V

vs BAT

OUT

Track feature will set V

to approximately 300mV above

OUT

4088f

11

LTC4088

U

OPERATIO

Ideal Diode from BAT to V

connected to BAT. Capable of driving a 1nF load, the GATE

pin can control an external P-channel MOSFET transistor

OUT

The LTC4088 has an internal ideal diode as well as a

controller for an optional external ideal diode. Both the

internal and the external ideal diodes are always on and

having an on-resistance of 30mΩ or lower. When V

is

BUS

unavailable,theforwardvoltageoftheidealdiodeampliﬁer

will be reduced from 15mV to nearly zero.

will respond quickly whenever V

drops below BAT.

OUT

If the load current increases beyond the power allowed

fromtheswitchingregulator,additionalpowerwillbepulled

fromthebatteryviatheidealdiodes.Furthermore,ifpower

Suspend LDO

The LTC4088 provides a small amount of power to V in

SUSPEND mode by including an LDO from V

OUT

to V

.

BUS

OUT

to V

(USB or wall power) is removed, then all of the

BUS

ThisLDOwillpreventthebatteryfromrunningdownwhen

the portable product has access to a suspended USB port.

Regulating at 4.6V, this LDO only becomes active when

the switching converter is disabled. To remain compliant

with the USB speciﬁcation, the input to the LDO is current

limited so that it will not exceed the low power or high

application power will be provided by the battery via the

ideal diodes. The ideal diodes will be fast enough to keep

V

from drooping with only the storage capacitance

OUT

required for the switching regulator. The internal ideal

diode consists of a precision ampliﬁer that activates a

large on-chip MOSFET transistor whenever the voltage at

power suspend speciﬁcation. If the load on V

exceeds

OUT

V

is approximately 15mV (V ) below the voltage at

FWD

OUT

the suspend current limit, the additional current will come

BAT. Within the ampliﬁer’s linear range, the small-signal

resistance of the ideal diode will be quite low, keeping

the forward drop near 15mV. At higher current levels, the

MOSFET will be in full conduction. The on-resistance in

this case is approximately 180mΩ. If this is sufﬁcient for

the application, then no external components are neces-

sary. However, if more conductance is needed, an external

P-channel MOSFET transistor can be added from BAT to

from the battery via the ideal diodes. The suspend LDO

sends a scaled copy of the V

current to the CLPROG

BUS

pin,whichwillservotoapproximately100mVinthismode.

Thus, the high power and low power suspend settings are

related to the levels programmed by the same resistor for

1x and 5x modes.

3.3V Always-On Supply

V

. The GATE pin of the LTC4088 drives the gate of the

OUT

The LTC4088 includes an ultralow quiescent current low

dropoutregulatorthatisalwayspowered. ThisLDOcanbe

usedtoprovidepowertoasystempushbuttoncontrolleror

standby microcontroller. Designed to deliver up to 25mA,

the always-on LDO requires a 1µF MLCC bypass capacitor

for compensation. The LDO is powered from V , and

therefore will enter dropout at loads less than 25mA as

P-channel MOSFET transistor for automatic ideal diode

control. The source of the external P-channel MOSFET

should be connected to V

and the drain should be

OUT

2200

VISHAY Si2333

OPTIONAL EXTERNAL

IDEAL DIODE

2000

1800

1600

1400

1200

1000

800

OUT

V

falls near 3.3V. If the LDO3V3 output is not used, it

OUT

should be disabled by connecting it to V

.

OUT

LTC4088

IDEAL DIODE

V

BUS

Undervoltage Lockout (UVLO)

600

ON

SEMICONDUCTOR

MBRM120LT3

AninternalundervoltagelockoutcircuitmonitorsV and

BUS

400

keepstheswitchingregulatoroffuntilV

risesabovethe

BUS

200

risingUVLOthreshold(4.3V).IfV

fallsbelowthefalling

V

= 5V

BUS

0

UVLO threshold (4V), system power at V

will be drawn

0

120

180 240 300 360 420 480

60

OUT

FORWARD VOLTAGE (mV) (BAT – V

)

OUT

from the battery via the ideal diodes. The voltage at V

BUS

4088 F03

must also be higher than the voltage at BAT by approxi-

Figure 3. Ideal Diode V-I Characteristics

mately170mVfortheswitchingregulatortooperate.

4088f

12

LTC4088

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OPERATIO

Battery Charger

V

(typically 4.1V). In the event that the safety timer

RECHRG

is running when the battery voltage falls below V

, it

RECHRG

The LTC4088 includes a constant-current/constant-volt-

age battery charger with automatic recharge, automatic

termination by safety timer, low voltage trickle charging,

bad cell detection and thermistor sensor input for out of

temperature charge pausing.

will reset back to zero. To prevent brief excursions below

fromresettingthesafetytimer,thebatteryvoltage

V

RECHRG

must be below V

for more than 1.5ms. The charge

RECHRG

cycle and safety timer will also restart if the V

UVLO

BUS

cycles low and then high (e.g., V

is removed and then

BUS

When a battery charge cycle begins, the battery charger

ﬁrst determines if the battery is deeply discharged. If the

batteryvoltageisbelowV

replaced) or if the charger is momentarily disabled using

the D2 pin.

,typically2.85V,anautomatic

TRKL

trickle charge feature sets the battery charge current to

10% of the programmed value. If the low voltage persists

for more than 1/2 hour, the battery charger automatically

terminates and indicates, via the CHRG pin, that the bat-

tery was unresponsive.

Charge Current

The charge current is programmed using a single resistor

from PROG to ground. 1/1031th of the battery charge cur-

rent is delivered to PROG, which will attempt to servo to

1.000V. Thus, the battery charge current will try to reach

1031 times the current in the PROG pin. The program

resistor and the charge current are calculated using the

following equations:

OncethebatteryvoltageisaboveV ,thechargerbegins

TRKL

charginginfullpowerconstant-currentmode. Thecurrent

delivered to the battery will try to reach 1031V/R

.

PROG

Depending on available input power and external load

conditions, the battery charger may or may not be able to

charge at the full programmed rate. The external load will

always be prioritized over the battery charge current. The

USB current limit programming will always be observed

and only additional power will be available to charge the

battery. When system loads are light, battery charge cur-

rent will be maximized.

1031V

I_CHG

1031V

R_PROG

=

, I_CHG=

Ineithertheconstant-currentorconstant-voltagecharging

modes, the voltage at the PROG pin will be proportional

to the actual charge current delivered to the battery. The

chargecurrentcanbedeterminedatanytimebymonitoring

the PROG pin voltage and using the following equation:

Charge Termination

V_PROG

R_PROG

I_BAT

=

•1031

The battery charger has a built-in safety timer. Once the

voltage on the battery reaches the pre-programmed ﬂoat

voltage of 4.200V, the charger will regulate the battery

voltagethereandthechargecurrentwilldecreasenaturally.

Once the charger detects that the battery has reached

4.200V, the 4-hour safety timer is started. After the safety

timer expires, charging of the battery will discontinue and

no more current will be delivered.

In many cases, the actual battery charge current, I , will

BAT

belowerthantheprogrammedcurrent,I ,duetolimited

CHG

input power available and prioritization to the system load

drawn from V

.

OUT

Charge Status Indication

Automatic Recharge

The CHRG pin indicates the status of the battery charger.

FourpossiblestatesarerepresentedbyCHRGwhichinclude

charging, not charging (or ﬂoat charge current less than

programmedendofchargeindicationcurrent),unrespon-

sive battery and battery temperature out of range.

Once the battery charger terminates, it will remain off

drawing only microamperes of current from the battery.

If the portable product remains in this state long enough,

the battery will eventually self discharge. To ensure that

the battery is always topped off, a charge cycle will au-

tomatically begin when the battery voltage falls below

The signal at the CHRG pin can be easily recognized

as one of the above four states by either a human or a

4088f

13

LTC4088

U

OPERATIO

If a battery is found to be unresponsive to charging (i.e.,

its voltage remains below 2.85V for 1/2 hour), the CHRG

pingivesthebatteryfaultindication.Forthisfault,ahuman

would easily recognize the frantic 6.1Hz “fast” blink of the

LEDwhileamicroprocessorwouldbeabletodecodeeither

the 12.5% or 87.5% duty cycles as a bad cell fault.

microprocessor. An open-drain output, the CHRG pin can

drive an indicator LED through a current limiting resis-

tor for human interfacing or simply a pull-up resistor for

microprocessor interfacing.

To make the CHRG pin easily recognized by both humans

and microprocessors, the pin is either a DC signal of ON

for charging, OFF for not charging or it is switched at high

frequency(35kHz)toindicatethetwopossiblefaults.While

switching at 35kHz, its duty cycle is modulated at a slow

rate that can be recognized by a human.

Because the LTC4088 is a 3-terminal PowerPath product,

system load is always prioritized over battery charging.

Due to excessive system load, there may not be sufﬁcient

power to charge the battery beyond the bad cell threshold

voltage within the bad cell timeout period. In this case the

battery charger will falsely indicate a bad cell. System

software may then reduce the load and reset the battery

charger to try again.

Whenchargingbegins,CHRGispulledlowandremainslow

for the duration of a normal charge cycle. When charging

is complete, as determined by the criteria set by the C/X

pin, the CHRG pin is released (Hi-Z). The CHRG pin does

Although very improbable, it is possible that a duty cycle

reading could be taken at the bright-dim transition (low

duty cycle to high duty cycle). When this happens the

duty cycle reading will be precisely 50%. If the duty cycle

reading is 50%, system software should disqualify it and

take a new duty cycle reading.

not respond to the C/X threshold if the LTC4088 is in V

BUS

current limit. This prevents false end of charge indications

duetoinsufﬁcientpoweravailabletothebatterycharger. If

a fault occurs while charging, the pin is switched at 35kHz.

Whileswitching,itsdutycycleismodulatedbetweenahigh

and low value at a very low frequency. The low and high

duty cycles are disparate enough to make an LED appear

to be on or off thus giving the appearance of “blinking”.

Each of the two faults has its own unique “blink” rate for

human recognition as well as two unique duty cycles for

machine recognition.

C/X Determination

The current exiting the C/X pin represents 1/1031th of

the battery charge current. With a resistor from C/X to

ground that is X/10 times the resistor at the PROG pin,

the CHRG pin releases when the battery current drops to

Table 2 illustrates the four possible states of the CHRG

pin when the battery charger is active.

C/X. For example, if C/10 detection is desired, R should

C/X

be made equal to R

PROG

state is given by:

. For C/20, R would be twice

. The current threshold at which CHRG will change

PROG

C/X

Table 2. CHRG Signal

R

MODULATION

FREQUENCY (BLINK) FREQUENCY

DUTY

CYCLES

STATUS

Charging

0Hz

0Hz (Low Z)

0Hz (Hi-Z)

100%

0%

V_C/X

R_C/X

I_BAT

=

•1031

I

< C/X

BAT

NTC Fault

35kHz

1.5Hz at 50%

6.1Hz at 50%

6.25% or 93.75%

12.5% or 87.5%

Bad Battery

With this design, C/10 detection can be achieved with only

one resistor rather than a resistor for both the C/X pin and

the PROG pin. Since both of these pins have 1/1031 of the

battery charge current in them, their voltages will be equal

when they have the same resistor value. Therefore, rather

thanusingtworesistors, theC/XpinandthePROGpincan

be connected together and the resistors can be paralleled

to a single resistor of 1/2 of the program resistor.

Notice that an NTC fault is represented by a 35kHz pulse

trainwhosedutycycletogglesbetween6.25%and93.75%

at a 1.5Hz rate. A human will easily recognize the 1.5Hz

rate as a “slow” blinking which indicates the out of range

battery temperature while a microprocessor will be able

to decode either the 6.25% or 93.75% duty cycles as an

NTC fault.

4088f

14

LTC4088

U

OPERATIO

NTC Thermistor

Thermal Regulation

The battery temperature is measured by placing a nega- TopreventthermaldamagetotheICorsurroundingcompo-

tive temperature coefﬁcient (NTC) thermistor close to nents, aninternalthermalfeedbackloopwillautomatically

the battery pack. The NTC circuitry is shown in the Block decrease the programmed charge current if the die tem-

Diagram.

peraturerisestoapproximately110°C.Thermalregulation

protects the LTC4088 from excessive temperature due to

high power operation or high ambient thermal conditions,

and allows the user to push the limits of the power han-

dling capability with a given circuit board design without

risk of damaging the LTC4088 or external components.

The beneﬁt of the LTC4088 thermal regulation loop is that

charge current can be set according to actual conditions

rather than worst-case conditions for a given application

with the assurance that the charger will automatically

reduce the current in worst-case conditions.

To use this feature, connect the NTC thermistor, R

,

NTC

NOM

betweentheNTCpinandgroundandabiasresistor,R

from V

to NTC. R

should be a 1% resistor with

BUS

NOM

a value equal to the value of the chosen NTC thermistor

at 25°C (R25). A 100k thermistor is recommended since

thermistor current is not measured by the LTC4088 and

will have to be considered for USB compliance.

The LTC4088 will pause charging when the resistance of

theNTCthermistordropsto0.54timesthevalueofR25or

approximately 54k (for a Vishay “Curve 1” thermistor, this

correspondstoapproximately40°C).Ifthebatterycharger Shutdown Mode

is in constant voltage (ﬂoat) mode, the safety timer also

For autonomous battery charger operation, D2 should

pauses until the thermistor indicates a return to a valid

temperature. As the temperature drops, the resistance of

the NTC thermistor rises. The LTC4088 is also designed

to pause charging when the value of the NTC thermistor

increases to 3.25 times the value of R25. For a Vishay

“Curve 1” thermistor, this resistance, 325k, corresponds

to approximately 0°C. The hot and cold comparators each

haveapproximately3°Cofhysteresistopreventoscillation

about the trip point. Grounding the NTC pin disables all

NTC functionality.

be permanently grounded. However, for more control

via software the LTC4088’s battery charger can be inde-

pendently disabled by bringing the D2 pin above V . D2

IH

must also be brought high to enable high power (2.5mA)

suspend mode.

The input switching regulator is enabled whenever V

BUS

is above the UVLO voltage and the LTC4088 is not in one

of the two USB suspend modes (500µA or 2.5mA).

The ideal diode is enabled at all times and cannot be

disabled.

4088f

15

LTC4088

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APPLICATIO S I FOR ATIO

CLPROG Resistor and Capacitor

rectiﬁer as current approaches zero. This comparator will

minimizetheeffectofcurrentreversalontheaverageinput

current measurement. For some low inductance values,

however, the inductor current may reverse slightly. This

value depends on the speed of the comparator in relation

As described in the Step-Down Input Regulator section,

the resistor on the CLPROG pin determines the average

input current limit in each of the six current limit modes.

The input current will be comprised of two components,

to the slope of the current waveform, given by V /L, where

L

the current that is used to drive V

and the quiescent

OUT

V isthevoltageacrosstheinductor(approximately–V

)

L

OUT

current of the switching regulator. To ensure that the USB

speciﬁcationisstrictlymet,bothcomponentsofinputcur-

rent should be considered. The Electrical Characteristics

table gives the typical values for quiescent currents in all

settings as well as current limit programming accuracy.

To get as close to the 500mA or 100mA speciﬁcations as

possible, a precision resistor should be used.

and L is the inductance value.

An inductance value of 3.3µH is a good starting value. The

ripple will be small enough for the regulator to remain in

continuousconductionat100mAaverageV

current.At

BUS

lighter loads the current-reversal comparator will disable

thesynchronousrectiﬁeratacurrentslightlyabove0mA.As

theinductanceisreducedfromthisvalue,thepartwillenter

discontinuous conduction mode at progressively higher

An averaging capacitor is required in parallel with the

resistor so that the switching regulator can determine

the average input current. This capacitor also provides

the dominant pole for the feedback loop when current

limit is reached. To ensure stability, the capacitor on

CLPROG should be 0.47µF or larger. Alternatively, faster

transient response may be achieved with 0.1µF in series

with 8.2Ω.

loads. Ripple at V

will increase, directly proportionally

OUT

to the magnitude of inductor ripple. Transient response,

however, will be improved. The current mode controller

controls inductor current to exactly the amount required

by the load to keep V

in regulation. A transient load

OUT

steprequirestheinductorcurrenttochangetoanewlevel.

Sinceinductorcurrentcannotchangeinstantaneously,the

Choosing the Inductor

capacitance on V

delivers or absorbs the difference in

OUT

current until the inductor current can change to meet the

new load demand. A smaller inductor changes its current

morequicklyforagivenvoltagedrivethanalargerinductor,

resultinginfastertransientresponse.Alargerinductorwill

reduce output ripple and current ripple, but at the expense

Becausetheaverageinputcurrentcircuitdoesnotmeasure

reverse current (i.e., current from V

to V ), cur-

OUT

BUS

rent reversal in the inductor at light loads will contribute

an error to the V current measurement. The error is

BUS

conservative in that if the current reverses, the voltage

at CLPROG will be higher than what would represent the

actual average input current drawn. The current available

for charging and the system load is thus reduced. The

USB speciﬁcation will not be violated.

ofreducedtransientperformance(ormoreC

required)

VOUT

and a physically larger inductor package size.

The input regulator has an instantaneous peak current

clamp to prevent the inductor from saturating during tran-

sient load or start-up conditions. The clamp is designed

so that it does not interfere with normal operation at

highloadswithreasonableinductorripple.Itwillprevent

inductor current runaway in case of a shorted output.

This reduction in available V

current will happen when

BUS

the peak-peak inductor ripple is greater than twice the

average current limit setting. For example, if the average

current limit is set to 100mA, the peak-peak ripple should

notexceed200mA. Iftheinputcurrentislessthan100mA,

the measurement accuracy may be reduced, but it does

not affect the average current loop since it will not be in

regulation.

The DC winding resistance and AC core losses of the

inductor will affect efﬁciency, and therefore available

output power. These effects are difﬁcult to characterize

and vary by application. Some inductors which may be

suitable for this application are listed in Table 3.

TheLTC4088includesacurrent-reversalcomparatorwhich

monitors inductor current and disables the synchronous

4088f

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LTC4088

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APPLICATIO S I FOR ATIO

Table 3. Recommended Inductors for the LTC4088

L

(µH)

MAX I

(A)

MAX DCR

SIZE IN mm

(L × W × H)

DC

INDUCTOR TYPE

(Ω)

MANUFACTURER

LPS4018

3.3

2.2

0.08

3.9 × 3.9 × 1.7

Coilcraft

www.coilcraft.com

D53LC

DB318C

3.3

2.26

1.55

0.034

0.070

5 × 5 × 3

3.8 × 3.8 × 1.8

Toko

www.toko.com

WE-TPC Type M1

3.3

1.95

0.065

4.8 × 4.8 × 1.8

Wurth Elektronik

www.we-online.com

CDRH6D12

CDRH6D38

3.3

2.2

3.5

0.0625

0.020

6.7 × 6.7 × 1.5

7 × 7 × 4

Sumida

www.sumida.com

V_BUSand V_OUTBypass Capacitors

Forexample,X7Rceramiccapacitorshavethebestvoltage

and temperature stability. X5R ceramic capacitors have

apparentlyhigherpackingdensitybutpoorerperformance

over their rated voltage and temperature ranges. Y5V

ceramic capacitors have the highest packing density,

but must be used with caution, because of their extreme

nonlinearcharacteristicofcapacitanceversusvoltage.The

actualin-circuitcapacitanceofaceramiccapacitorshould

be measured with a small AC signal and DC bias as is

expectedin-circuit.Manyvendorsspecifythecapacitance

verse voltage with a 1V_RMSAC test signal and, as a result,

over state the capacitance that the capacitor will present

in the application. Using similar operating conditions as

the application, the user must measure or request from

the vendor the actual capacitance to determine if the

selected capacitor meets the minimum capacitance that

the application requires.

ThestyleandvalueofcapacitorsusedwiththeLTC4088

determineseveralimportantparameterssuchasregula-

torcontrol-loopstabilityandinputvoltageripple.Because

the LTC4088 uses a step-down switching power supply

from V_BUSto V_OUT, its input current waveform contains

highfrequencycomponents.Itisstronglyrecommended

that a low equivalent series resistance (ESR) multilayer

ceramiccapacitorbeusedtobypassV_BUS.Tantalumand

aluminum capacitors are not recommended because

of their high ESR. The value of the capacitor on V_BUS

directly controls the amount of input ripple for a given

load current. Increasing the size of this capacitor will

reduce the input ripple. The USB speciﬁcation allows a

maximum of 10µF to be connected directly across the

USB power bus. If additional capacitance is required

for noise performance, a soft-connect circuit may be

required to limit inrush current and avoid excessive

transient voltage drops on the bus (see Figure 5).

Overprogramming the Battery Charger

The USB high power speciﬁcation allows for up to 2.5W

to be drawn from the USB port. The switching regulator

transforms the voltage at V_BUSto just above the voltage

at BAT with high efﬁciency, while limiting power to less

than the amount programmed at CLPROG. The charger

should be programmed (with the PROG pin) to deliver the

maximumsafechargingcurrentwithoutregardtotheUSB

speciﬁcations. If there is insufﬁcient current available to

charge the battery at the programmed rate, it will reduce

charge current until the system load on V_OUTis satisﬁed

and the V_BUScurrent limit is satisﬁed. Programming the

charger for more current than is available will not cause

theaverageinputcurrentlimittobeviolated. Itwillmerely

allow the battery charger to make use of all available

To prevent large V_OUTvoltage steps during transient

load conditions, it is also recommended that a ceramic

capacitorbeusedtobypassV_OUT.Theoutputcapacitoris

used in the compensation of the switching regulator. At

least10µFwithlowESRarerequiredonV_OUT.Additional

capacitance will improve load transient performance

and stability.

Multilayer ceramic chip capacitors typically have excep-

tional ESR performance. MLCCs combined with a tight

boardlayoutandanunbrokengroundplanewillyieldvery

good performance and low EMI emissions.

There are several types of ceramic capacitors avail-

able each having considerably different characteristics.

4088f

17

LTC4088

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W U U

APPLICATIO S I FOR ATIO

power to charge the battery as quickly as possible, and

The trip points for the LTC4088’s temperature qualiﬁca-

tion are internally programmed at 0.349 • V for the hot

with minimal power dissipation within the charger.

BUS

threshold and 0.765 • V

for the cold threshold.

BUS

Alternate NTC Thermistors and Biasing

Therefore, the hot trip point is set when:

The LTC4088 provides temperature qualiﬁed charging if

a grounded thermistor and a bias resistor are connected

to NTC. By using a bias resistor whose value is equal to

the room temperature resistance of the thermistor (R25)

the upper and lower temperatures are pre-programmed

to approximately 40°C and 0°C, respectively (assuming

a Vishay “Curve 1” thermistor).

R_NTC|HOT

• V_BUS= 0.349 • V_BUS

R_NOM+R_NTC|HOT

and the cold trip point is set when:

R_NTC|COLD

• V_BUS= 0.765 • V_BUS

R_NOM+R_NTC|COLD

The upper and lower temperature thresholds can be ad-

justed by either a modiﬁcation of the bias resistor value

or by adding a second adjustment resistor to the circuit.

If only the bias resistor is adjusted, then either the upper

or the lower threshold can be modiﬁed but not both. The

other trip point will be determined by the characteristics

of the thermistor. Using the bias resistor in addition to an

adjustmentresistor,boththeupperandthelowertempera-

ture trip points can be independently programmed with

the constraint that the difference between the upper and

lower temperature thresholds cannot decrease. Examples

of each technique are given below.

Solving these equations for R

results in the following:

and R

NTC|HOT

NTC|COLD

R

= 0.536 • R

NTC|HOT

NOM

and

R

= 3.25 • R

NTC|COLD

NOM

By setting R

equal to R25, the above equations result

NOM

= 0.536 and r

in r

= 3.25. Referencing these ratios

HOT

COLD

to the Vishay Resistance-Temperature Curve 1 chart gives

a hot trip point of about 40°C and a cold trip point of about

0°C. The difference between the hot and cold trip points

is approximately 40°C.

NTC thermistors have temperature characteristics which

areindicatedonresistance-temperatureconversiontables.

TheVishay-DalethermistorNTHS0603N011-N1003F,used

in the following examples, has a nominal value of 100k

and follows the Vishay “Curve 1” resistance-temperature

characteristic.

Byusingabiasresistor, R , differentinvaluefromR25,

NOM

the hot and cold trip points can be moved in either direc-

tion. The temperature span will change somewhat due to

the non-linear behavior of the thermistor. The following

equations can be used to easily calculate a new value for

the bias resistor:

In the explanation below, the following notation is used.

R25 = Value of the Thermistor at 25°C

r_HOT

0.536

R_NOM

=

•R25

R

= Value of thermistor at the cold trip point

= Value of the thermistor at the hot trip

NTC|COLD

NTC|HOT

point

r_COLD

3.25

R_NOM

•R25

r

= Ratio of R

to R25

COLD

NTC|COLD

where r

and r

are the resistance ratios at the

COLD

desired^Hh^Oo^Ttandcoldtrippoints. Notethattheseequations

are linked. Therefore, only one of the two trip points can

be chosen, the other is determined by the default ratios

designed in the IC. Consider an example where a 60°C

hot trip point is desired.

= Ratio of R

to R25

HOT

NTC|COLD

R

=Primarythermistorbiasresistor(seeFigure2)

NOM

R1 = Optional temperature range adjustment resistor

(see Figure 3)

4088f

18

LTC4088

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APPLICATIO S I FOR ATIO

FromtheVishayCurve1R-Tcharacteristics,r is0.2488

the nearest 1% value is 12.7k. The ﬁnal solution is shown

in Figure 4b and results in an upper trip point of 45°C and

a lower trip point of 0°C.

HOT

at 60°C. Using the above equation, R

should be set

NOM

to 46.4k. With this value of R

, the cold trip point is

NOM

about 16°C. Notice that the span is now 44°C rather than

the previous 40°C. This is due to the decrease in “tem-

perature gain” of the thermistor as absolute temperature

increases.

USB Inrush Limiting

TheUSBspeciﬁcationallowsatmost10µFofdownstream

capacitance to be hot-plugged into a USB hub. In most

LTC4088 applications, 10µF should be enough to provide

The upper and lower temperature trip points can be inde-

pendentlyprogrammedbyusinganadditionalbiasresistor

asshowninFigure4b. Thefollowingformulascanbeused

adequateﬁlteringonV .Ifmorecapacitanceisrequired,

BUS

thefollowingcircuitcanbeusedtosoft-connectadditional

capacitance.

to compute the values of R

and R1:

NOM

r_COLD–r_HOT

In this circuit, capacitor C1 holds MP1 off when the cable

is ﬁrst connected. Eventually the bottom plate of C1 dis-

chargestoGND, applyingincreasinggatesupporttoMP1.

R_NOM

=

•R25

2.714

R1= 0.536 •R_NOM–r_HOT•R25

MP1

Si2333

For example, to set the trip points to 0°C and 45°C with

a Vishay Curve 1 thermistor choose:

V

BUS

C1

100nF

5V USB

INPUT

LTC4088

USB CABLE

C2

3.266 – 0.4368

R1

40k

R_NOM

=

•100k = 104.2k

2.714

GND

4088 F05

the nearest 1% value is 105k:

Figure 5. USB Soft-Connect Circuit

R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k

LTC4088

NTC BLOCK

V

BUS

LTC4088

NTC BLOCK

V

BUS

0.765 • V

BUS

R

NOM

105k

NTC

NOM

–

+

–

+

100k

TOO_COLD

TOO_HOT

TOO_COLD

TOO_HOT

NTC

1

R

R1

12.7k

NTC

T

100k

–

+

–

+

0.349 • V

BUS

R

NTC

T

100k

+

–

+

–

NTC_ENABLE

0.1V

4088 F04a

4088 F04b

(4a)

(4b)

Figure 4. NTC Circuits

4088f

19

LTC4088

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APPLICATIO S I FOR ATIO

and all of its external high frequency components. High

frequency currents, such as the input current on the

LTC4088, tend to ﬁnd their way on the ground plane along

a mirror path directly beneath the incident path on the top

of the board. If there are slits or cuts in the ground plane

due to other traces on that layer, the current will be forced

to go around the slits. If high frequency currents are not

allowed to ﬂow back through their natural least-area path,

excessive voltage will build up and radiated emissions will

occur(seeFigure6).Thereshouldbeagroupofviasdirectly

under the grounded backside leading directly down to an

internal ground plane. To minimize parasitic inductance,

the ground plane should be as close as possible to the

top plane of the PC board (layer 2).

The long time constant of R1 and C1 prevent the current

from building up in the cable too fast, thus dampening

out any resonant overshoot.

Voltage overshoot on V

may sometimes be observed

BUS

when connecting the LTC4088 to a lab power supply. This

overshoot is caused by long leads from the power supply

to V . Twisting the wires together from the supply to

BUS

V

can greatly reduce the parasitic inductance of these

BUS

longleads,andkeepthevoltageatV

tosafelevels. USB

BUS

cables are generally manufactured with the power leads in

close proximity, and thus fairly low parasitic inductance.

Board Layout Considerations

The Exposed Pad on the backside of the LTC4088 pack-

age must be securely soldered to the PC board ground.

This is the only ground pin in the package, and it serves

as the return path for both the control circuitry and the

synchronous rectiﬁer.

The GATE pin for the external ideal diode controller has

extremely limited drive current. Care must be taken to

minimize leakage to adjacent PC board traces. 100nA of

leakage from this pin will introduce an additional offset

to the ideal diode of approximately 10mV. To minimize

leakage, the trace can be guarded on the PC board by

Furthermore, duetoitshighfrequencyswitchingcircuitry,

itisimperativethattheinputcapacitor,inductor,andoutput

capacitor be as close to the LTC4088 as possible and that

there be an unbroken ground plane under the LTC4088

surrounding it with V

connected metal, which should

OUT

generally be less than one volt higher than GATE.

4088 F06

Figure 6. Ground Currents Follow Their Incident Path

at High Speed. Slices in the Ground Plane Cause High

Voltage and Increased Emissions

4088f

20

LTC4088

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APPLICATIO S I FOR ATIO

In constant-current mode, the PROG pin is in the feed-

back loop rather than the battery voltage. Because of the

additional pole created by any PROG pin capacitance,

capacitance on this pin must be kept to a minimum. With

no additional capacitance on the PROG pin, the charger

is stable with program resistor values as high as 25k.

However, additional capacitance on this node reduces the

maximumallowedprogramresistor.Thepolefrequencyat

the PROG pin should be kept above 100kHz. Therefore, if

Battery Charger Stability Considerations

The LTC4088’s battery charger contains both a con-

stant-voltage and a constant-current control loop. The

constant-voltage loop is stable without any compensation

when a battery is connected with low impedance leads.

Excessive lead length, however, may add enough series

inductance to require a bypass capacitor of at least 1µF

from BAT to GND.

High value, low ESR multilayer ceramic chip capacitors

reduce the constant-voltage loop phase margin, possibly

resulting in instability. Ceramic capacitors up to 22µF may

beusedinparallelwithabattery,butlargerceramicsshould

be decoupled with 0.2Ω to 1Ω of series resistance.

the PROG pin has a parasitic capacitance, C

, the fol-

PROG

lowing equation should be used to calculate the maximum

resistance value for R

:

PROG

1

R_PROG

≤

2π •100kHz •C_PROG

Furthermore, a4.7µFcapacitorinserieswitha0.2Ωto1Ω

resistor from BAT to GND is required to prevent oscillation

when the battery is disconnected.

4088f

21

LTC4088

U

TYPICAL APPLICATIO S

High Efﬁciency Battery Charger/USB Power Manager

with NTC Qualiﬁed Charging and Reverse Input Protection

L1

WALL

USB

3.3µH

M2

V

SW

V

LOAD

BUS

OUT

D0

D1

D2

CHRG

LDO3V3

GATE

BAT

R1

100k

LTC4088

M1

µC

C1

10µF

0805

C3

10µF

NTC

0805

CLPROG PROG C/X GND

+

Li-Ion

R2

T

R5

8.2Ω

R3

2.94k

100k

R4

499Ω

C2

0.1µF

0603

4088 TA02

C1, C3: MURATA GRM21BR61A106KE19

C2: MURATA GRM188R71C104KA01

L1: COILCRAFT LPS4018-332MLC

M1, M2: SILICONIX Si2333

R2: VISHAY-DALE NTHS0603N011-N1003F

USB Compliant Switching Charger

L1

3.3µH

WALL

USB

V

SW

BUS

OUT

LDO3V3

GATE

C3

10µF

0805

D0

D1

D2

CHRG

R1

100k

LTC4088

µC

C1

LOAD

BAT

10µF

0805

NTC

CLPROG PROG C/X GND

+

Li-Ion

R2

T

R5

8.2Ω

R3

2.94k

100k

R4

499Ω

C2

0.1µF

0603

4088 TA03a

C1, C3: MURATA GRM21BR61A106KE19

C2: MURATA GRM188R71C104KA01

L1: COILCRAFT LPS4018-332MLC

R2: VISHAY-DALE NTHS0603N011-N1003F

700

600

I

BAT

500

400

300

200

I

BUS

100

5x USB SETTING,

BATTERY CHARGER SET FOR 1A

0

3.0

3.3

3.6

4.2

2.7

3.9

BATTERY VOLTAGE (V)

4088 TA03b

4088f

22

LTC4088

U

PACKAGE DESCRIPTIO

DE Package

14-Lead Plastic DFN (4mm × 3mm)

(Reference LTC DWG # 05-08-1708 Rev B)

0.70 0.05

3.30 0.05

1.70 0.05

3.60 0.05

2.20 0.05

PACKAGE

OUTLINE

0.25 0.05

0.50 BSC

3.00 REF

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.115

TYP

0.40 0.10

4.00 0.10

(2 SIDES)

8

14

R = 0.05

TYP

3.30 0.10

3.00 0.10

(2 SIDES)

1.70 0.10

PIN 1 NOTCH

R = 0.20 OR

PIN 1

TOP MARK

(SEE NOTE 6)

0.35 × 45°

CHAMFER

(DE14) DFN 0806 REV B

7

1

0.25 0.05

0.50 BSC

0.75 0.05

0.200 REF

3.00 REF

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC

PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

4088f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LTC4088

RELATED PARTS

PART NUMBER

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LTC4057

DESCRIPTION

COMMENTS

Lithium-Ion Linear Battery Charger

Up to 800mA Charge Current, Thermal Regulation, ThinSOT^TMPackage

LTC4058

Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, 7% Charge

Accuracy

LTC4065/LTC4065A 750mA Linear Lithium-Ion Battery Charger

2mm × 2mm DFN Package, Thermal Regulation, Standalone Operation

LTC4411/LTC4412

Low Loss Single PowerPath Controllers in

ThinSOT

Automatic Switching Between DC Sources, Load Sharing,

Replaces ORing Diodes

LTC4413

Dual Ideal Diodes

3mm × 3mm DFN Package, Low Loss Replacement for ORing Diodes

Power Management

LTC3406/LTC3406A 600mA (I_OUT), 1.5MHz, Synchronous

Step-Down DC/DC Converter

95% Efﬁciency, V_IN= 2.5V to 5.5V, V_OUT= 0.6V, I_Q= 20µA, I_SD< 1µA,

ThinSOT Package

LTC3411

LTC3455

LTC4055

LTC4066

LTC4085

1.25A (I_OUT), 4MHz, Synchronous Step-Down

DC/DC Converter

95% Efﬁciency, V_IN= 2.5V to 5.5V, V_OUT= 0.8V, I_Q= 60µA, I_SD< 1µA,

MS10 Package

Dual DC/DC Converter with USB Power Manager Seamless Transition Between Power Sources: USB, Wall Adapter and

and Li-Ion Battery Charger

Battery; 95% Efﬁcient DC/DC Conversion

USB Power Controller and Battery Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 200mΩ Ideal Diode, 4mm × 4mm QFN16 Package

USB Power Controller and Battery Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 50mΩ Ideal Diode, 4mm × 4mm QFN24 Package

USB Power Manager with Ideal Diode Controller Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

and Li-Ion Charger

Regulation, 200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm

DFN14 Package

LTC4088-1

High Efﬁciency USB Power Manager and Battery Maximizes Available Power from USB Port, Bat-Track, “Instant-On”

Charger with Regulated Output Voltage

Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ

Option, Automatic Charge Current Reduction Maintains 3.6V Minimum

V_OUT, 4mm × 3mm DFN14 Package

LTC4089/LTC4089-5 USB Power Manager with Ideal Diode Controller High Efﬁciency 1.2A Charger from 6V to 36V (40V Max) Input. Charges

and High Efﬁciency Li-Ion Battery Charger

Single Cell Li-Ion/Polymer Batteries Directly from a USB Port, Thermal

Regulation, 200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm

DFN14 Package. Bat-Track Adaptive Output Control (LTC4089), Fixed

5V Output (LTC4089-5)

ThinSOT is a trademark of Linear Technology Corporation.

4088f

LT 0307 • PRINTED IN USA

24 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC4088EDE
厂家：	Linear
描述：	High Effi ciency Battery Charger/USB Power Manager 高艾菲效率电池充电器/ USB电源管理器电源电路电池电源管理电路光电二极管
文件：	总24页 (文件大小：272K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC4088EDE [Linear]

相关型号：

LTC4088EDE#PBF

LTC4088EDE#TR

LTC4088EDE#TRPBF

LTC4088EDE-1

LTC4088EDE-1#PBF

LTC4088EDE-1#TR

LTC4088EDE-1#TRPBF

LTC4088EDE-1-PBF

LTC4088EDE-1-TRPBF

LTC4088EDE-2#PBF

LTC4088EDE-2#TRPBF

LTC4088EDE-2-PBF