LTC2378IDE-16#PBF_技术文档

LTC2378-16

16-Bit, 1Msps, Low Power

SAR ADC with 97dB SNR

FeaTures

DescripTion

n

1Msps Throughput Rate

The LTC^®2378-16 is a low noise, low power, high speed

16-bit successive approximation register (SAR) ADC. Op-

n

±±0.5Sꢀ IN5 ꢁMaꢂx

n

Guaranteed 16-ꢀit No Missing Codes

erating from a 2.5V supply, the LTC2378-16 has a ±V

fully differential input range with V ranging from 2.5V

to 5.1V. The LTC2378-16 consumes only 13.5mW and

achieves ±±.5LSꢀ INL maximum, no missing codes at

16 bits with 97dꢀ SNR.

REF

n

5ow Power: 130.mW at 1Msps, 130.µW at 1ksps

97dꢀ SNR ꢁTypx at f = 2kHz

–122dꢀ THD ꢁTypx at f = 2kHz

REF

n

IN

n

IN

Digital Gain Compression ꢁDGCx

Guaranteed Operation to 125°C

2.5V Supply

The LTC2378-16 has a high speed SPI-compatible serial

interface that supports 1.8V, 2.5V, 3.3V and 5V logic

while also featuring a daisy-chain mode. The fast 1Msps

throughput with no cycle latency makes the LTC2378-16

ideally suited for a wide variety of high speed applications.

Aninternaloscillatorsetstheconversiontime,easingexter-

nal timing considerations. The LTC2378-16 automatically

powers down between conversions, leading to reduced

power dissipation that scales with the sampling rate.

Fully Differential Input Range ±V

REF

V

Input Range from 2.5V to 5.1V

REF

No Pipeline Delay, No Cycle Latency

1.8V to 5V I/O Voltages

SPI-Compatible Serial I/O with Daisy-Chain Mode

Internal Conversion Clock

16-Lead MSOP and 4mm × 3mm DFN Packages

applicaTions

The LTC2378-16 features a unique digital gain compres-

sion(DGC)function,whicheliminatesthedriveramplifier’s

negative supply while preserving the full resolution of the

ADC. When enabled, the ADC performs a digital scaling

n

Medical Imaging

n

High Speed Data Acquisition

n

Portable or Compact Instrumentation

function that maps zero-scale code from ±V to ±.1 • V

n

REF

Industrial Process Control

and full-scale code from V

to ±.9 • V . For a typical

n

REF

Low Power ꢀattery-Operated Instrumentation

reference voltage of 5V, the full-scale input range is now

±.5V to 4.5V, which provides adequate headroom for

powering the driving amplifier from a single 5.5V supply.

n

ATE

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

Typical applicaTion

32k Point FFT f_S= 1Msps, f_IN= 2kHz

2.5V 1.8V TO 5V

0

SNR = 97.2dB

–20

–40

THD = –121.7dB

SINAD = 97.1dB

SFDR = 128dB

10µF

0.1µF

V

OV

DD

CHAIN

RDL/SDI

SDO

DD

6800pF

3300pF

6800pF

V

REF

20Ω

–60

+

–

IN

+

–

–80

0V

LTC2378-16

SCK

REF

BUSY

CNV

REF/DGC

–100

–120

–140

–160

–180

IN

SAMPLE CLOCK

0V

V

REF

GND

REF

237816 TA01

2.5V TO 5.1V

47µF

(X5R, 0805 SIZE)

0

100

200

300

400

500

FREQUENCY (kHz)

237816 TA02

237816fa

1

For more information www.linear.com/LTC2378-16

LTC2378-16

absoluTe MaxiMuM raTings

ꢁNotes 1, 2x

Supply Voltage (V )...............................................2.8V

Digital Output Voltage

DD

Supply Voltage (OV )................................................6V

(Note 3)........................... (GND –±.3V) to (OV + ±.3V)

DD

Reference Input (REF).................................................6V

Power Dissipation.............................................. 5±±mW

Operating Temperature Range

LTC2378C................................................ ±°C to 7±°C

LTC2378I .............................................–4±°C to 85°C

LTC2378H.......................................... –4±°C to 125°C

Storage Temperature Range .................. –65°C to 15±°C

Analog Input Voltage (Note 3)

+

–

IN , IN ......................... (GND –±.3V) to (REF + ±.3V)

REF/DGC Input (Note 3).... (GND –±.3V) to (REF + ±.3V)

Digital Input Voltage

(Note 3)........................... (GND –±.3V) to (OV + ±.3V)

DD

pin conFiguraTion

TOP VIEW

CHAIN

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

GND

OV

TOP VIEW

V

DD

CHAIN 1

16 GND

GND

SDO

V

2

15 OV

DD

+

GND 3

14 SDO

13 SCK

17

GND

IN

SCK

+

–

IN

4

5

–

IN

RDL/SDI

BUSY

GND

12 RDL/SDI

11 BUSY

10 GND

GND

REF

GND 6

REF 7

REF/DGC 8

9

CNV

REF/DGC

CNV

MS PACKAGE

16-LEAD PLASTIC MSOP

DE PACKAGE

T

JMAX

= 15±°C, θ = 11±°C/W

16-LEAD (4mm × 3mm) PLASTIC DFN

JA

T

JMAX

= 15±°C, θ = 4±°C/W

JA

EXPOSED PAD (PIN 17) IS GND, MUST ꢀE SOLDERED TO PCꢀ

http://www0linear0com/product/5TC2378-16#orderinfo

orDer inForMaTion

5EAD FREE FINISH

TAPE AND REE5

PART MARKING*

PACKAGE DESCRIPTION

16-Lead Plastic MSOP

TEMPERATURE RANGE

±°C to 7±°C

LTC2378CMS-16#PꢀF

LTC2378IMS-16#PꢀF

LTC2378HMS-16#PꢀF

LTC2378CDE-16#PꢀF

LTC2378IDE-16#PꢀF

LTC2378CMS-16#TRPꢀF 237816

LTC2378IMS-16#TRPꢀF 237816

LTC2378HMS-16#TRPꢀF 237816

LTC2378CDE-16#TRPꢀF 23786

–4±°C to 85°C

–4±°C to 125°C

±°C to 7±°C

16-Lead (4mm × 3mm) Plastic DFN

LTC2378IDE-16#TRPꢀF

23786

–4±°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 5±± unit reels through

designated sales channels with #TRMPꢀF suffix.

237816fa

2

For more information www.linear.com/LTC2378-16

LTC2378-16

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5

V +

PARAMETER

CONDITIONS

(Note 5)

MIN

–±.±5

TYP

MAX

UNITS

+

l

Absolute Input Range (IN )

V

+ ±.±5

V

IN

REF

–

V –

IN

Absolute Input Range (IN )

(Note 5)

+ ±.±5

V + – V – Input Differential Voltage Range

V

IN

= V + – V –

–V

+V

REF

IN

REF

V

CM

Common-Mode Input Range

V

/2–

V /2

REF

V

/2+

REF

±.1

±1

l

I

Analog Input Leakage Current

Analog Input Capacitance

µA

IN

C

Sample Mode

Hold Mode

45

5

pF

IN

CMRR

Input Common Mode Rejection Ratio

f

IN

= 5±±kHz

86

dꢀ

converTer characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5 PARAMETER

CONDITIONS

MIN

16

TYP

MAX

UNITS

ꢀits

l

Resolution

No Missing Codes

16

ꢀits

Transition Noise

±.15

±±.2

±±.1

±

LSꢀ

RMS

l

INL

Integral Linearity Error

Differential Linearity Error

ꢀipolar Zero-Scale Error

ꢀipolar Zero-Scale Error Drift

ꢀipolar Full-Scale Error

ꢀipolar Full-Scale Error Drift

(Note 6)

(Note 7)

–±.5

–4

±.5

4

LSꢀ

DNL

ꢀZE

LSꢀ

1

mLSꢀ/°C

LSꢀ

l

FSE

–13

±2

13

±±.±5

ppm/°C

DynaMic accuracy ^Thel denotes the specifications which apply over the full operating temperature range,

otherwise specifications are at T_A= 2.°C and A_IN= –1dꢀFS0 ꢁNotes 4, 8x

SYMꢀO5 PARAMETER

CONDITIONS

MIN

94.6

94.5

TYP

97

MAX

UNITS

dꢀ

l

SINAD

SNR

Signal-to-(Noise + Distortion) Ratio

f

IN

f

IN

= 2kHz, V = 5V

REF

= 2kHz, V = 5V, (H-Grade)

97

dꢀ

REF

l

Signal-to-Noise Ratio

f

IN

f

IN

f

IN

= 2kHz, V = 5V

95.3

94.5

92.1

97

96.4

95

dꢀ

REF

= 2kHz, V = 5V, REF/DGC = GND

REF

= 2kHz, V = 2.5V

REF

l

f

IN

f

IN

f

IN

= 2kHz, V = 5V, (H-Grade)

95.2

94.3

91.8

97

96.4

95

dꢀ

REF

= 2kHz, V = 5V, REF/DGC = GND, (H-Grade)

REF

= 2kHz, V = 2.5V, (H-Grade)

REF

l

THD

Total Harmonic Distortion

f

IN

f

IN

f

IN

= 2kHz, V = 5V

–122

–126

–122

–1±3

–1±1

–1±2

dꢀ

REF

= 2kHz, V = 5V, REF/DGC = GND

REF

= 2kHz, V = 2.5V

REF

l

SFDR

Spurious Free Dynamic Range

–3dꢀ Input ꢀandwidth

Aperture Delay

f

= 2kHz, V = 5V

1±4

123

34

dꢀ

MHz

ps

IN

REF

5±±

4

Aperture Jitter

ps

Transient Response

Full-Scale Step

46±

ns

237816fa

3

For more information www.linear.com/LTC2378-16

LTC2378-16

reFerence inpuT ^Thel denotes the specifications which apply over the full operating temperature range, otherwise

specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5

PARAMETER

CONDITIONS

(Note 5)

MIN

TYP

MAX

5.1

UNITS

l

V

Reference Voltage

2.5

V

mA

V

REF

I

Reference Input Current

High Level Input Voltage REF/DGC Pin

Low Level Input Voltage REF/DGC Pin

(Note 9)

±.65

±.75

V

IHDGC

V

ILDGC

±.8V

REF

±.2V

V

REF

DigiTal inpuTs anD DigiTal ouTpuTs ^Thel denotes the specifications which apply over the

full operating temperature range, otherwise specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5 PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

l

V

High Level Input Voltage

Low Level Input Voltage

Digital Input Current

±.8 • OV

IH

IL

DD

±.2 • OV

V

DD

I

V

= ±V to OV

DD

–1±

1±

µA

pF

IN

C

V

Digital Input Capacitance

High Level Output Voltage

Low Level Output Voltage

Hi-Z Output Leakage Current

Output Source Current

Output Sink Current

5

IN

l

I = –5±±µA

O

OV – ±.2

DD

V

OH

OL

I = 5±±µA

O

±.2

1±

V

I

V

= ±V to OV

DD

–1±

µA

mA

OZ

OUT

= ±V

= OV

–1±

1±

SOURCE

SINK

DD

power requireMenTs ^Thel denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5

PARAMETER

Supply Voltage

CONDITIONS

MIN

2.375

1.71

TYP

MAX

2.625

5.25

6.3

UNITS

l

V

DD

2.5

V

OV

DD

I

Supply Current

Power Down Mode

1Msps Sample Rate

5.4

±.2

±.9

mA

µA

VDD

OVDD

PD

1Msps Sample Rate (C = 2±pF)

L

l

Conversion Done (I

+ I

+ I )

REF

9±

14±

VDD

OVDD

REF

+ I , H-Grade)

µA

PD

P

Power Dissipation

Power Down Mode

1Msps Sample Rate

13.5

2.25

15.8

225

315

mW

µW

D

Conversion Done (I

+ I

REF

)

VDD

OVDD

REF

+ I , H-Grade)

aDc TiMing characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5

PARAMETER

CONDITIONS

MIN

TYP

MAX

1

UNITS

Msps

ns

l

f

t

Maximum Sampling Frequency

Conversion Time

SMPL

CONV

ACQ

46±

1

527

Acquisition Time

t

= t

– t

– t (Note 1±)

ꢀUSYLH

ns

ACQ

CYC

CONV

Time ꢀetween Conversions

CNV High Time

µs

CYC

2±

ns

CNVH

ꢀUSYLH

CNVL

QUIET

SCK

CNV↑ to ꢀUSY Delay

Minimum Low Time for CNV

SCK Quiet Time from CNV↑

SCK Period

C = 2±pF

L

13

ns

(Note 11)

(Note 1±)

2±

1±

ns

(Notes 11, 12)

ns

237816fa

4

For more information www.linear.com/LTC2378-16

LTC2378-16

aDc TiMing characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 2.°C0 ꢁNote 4x

SYMꢀO5

PARAMETER

CONDITIONS

MIN

4

TYP

MAX

UNITS

ns

l

t

SCK High Time

SCKH

SCK Low Time

4

ns

SCKL

SDI Setup Time From SCK↑

SDI Hold Time From SCK↑

SCK Period in Chain Mode

SDO Data Valid Delay from SCK↑

SDO Data Remains Valid Delay from SCK↑

SDO Data Valid Delay from ꢀUSY↓

ꢀus Enable Time After RDL↓

ꢀus Relinquish Time After RDL↑

(Note 11)

4

ns

SSDISCK

HSDISCK

SCKCH

DSDO

1

ns

t

= t

+ t (Note 11)

DSDO

13.5

ns

SCKCH

SSDISCK

C = 2±pF (Note 11)

L

9.5

ns

C = 2±pF (Note 1±)

L

1

ns

HSDO

C = 2±pF (Note 1±)

L

5

ns

DSDOꢀUSYL

EN

(Note 11)

16

13

ns

DIS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may effect device

reliability and lifetime.

Note 7: ꢀipolar zero-scale error is the offset voltage measured from

–±.5LSꢀ when the output code flickers between ±±±± ±±±± ±±±± ±±±± and

1111 1111 1111 1111. Full-scale bipolar error is the worst-case of –FS

or +FS untrimmed deviation from ideal first and last code transitions and

includes the effect of offset error.

Note 2: All voltage values are with respect to ground.

Note 8: All specifications in dꢀ are referred to a full-scale ±5V input with a

5V reference voltage.

Note 3: When these pin voltages are taken below ground or above REFor

OV , they will be clamped by internal diodes. This product can handle

DD

input currents up to 1±±mA below ground or above REFor OV without

latch-up.

Note 9: f

= 1MHz, I varies proportionately with sample rate.

SMPL REF

DD

Note 1±: Guaranteed by design, not subject to test.

Note 11: Parameter tested and guaranteed at OV = 1.71V, OV = 2.5V

Note 4: V = 2.5V, OV = 2.5V, REF = 5V, V = 2.5V, f

= 1MHz,

DD

CM

SMPL

DD

REF/DGC = V

.

REF

and OV = 5.25V.

DD

Note .: Recommended operating conditions.

Note 12: t

of 1±ns maximum allows a shift clock frequency up to

SCK

Note 6: Integral nonlinearity is defined as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

1±±MHz for rising capture.

0.8*OV

DD

t

WIDTH

0.2*OV

DD

50%

t

DELAY

237816 F01

0.8*OV

0.2*OV

DD

0.2*OV

DD

Figure 10 Voltage 5evels for Timing Specifications

237816fa

5

For more information www.linear.com/LTC2378-16

LTC2378-16

Typical perForMance characTerisTics ^T_A^{= 2.°C, V}_DD= 20.V, OV_DD= 20.V, V_CM= 20.V,

REF = .V, f_SMP5= 1Msps, unless otherwise noted0

Integral Nonlinearity

vs Output Code

Differential Nonlinearity

vs Output Code

DC Histogram

1.0

0.8

0.5

0.4

140000

120000

100000

80000

60000

40000

20000

0

σ = 0.15

0.6

0.3

0.4

0.2

0.1

0.0

–0.2

–0.4

–0.6

–0.8

–1.0

–0.1

–0.2

–0.3

–0.4

–0.5

–32768

–16384

0

16384

32768

–32768

–16384

0

16384

32768

–2

–1

0

1

2

OUTPUT CODE

CODE

237816 G01

237816 G02

237816 G03

THD, Harmonics

32k Point FFT f_S= 1Msps,

f_IN= 2kHz

vs Input Frequency

SNR, SINAD vs Input Frequency

0

–20

98.0

97.5

97.0

96.5

96.0

95.5

95.0

94.5

94.0

93.5

93.0

–80

–90

SNR = 97.2dB

THD

2ND

3RD

SNR

THD = –121.7dB

SINAD = 97.1dB

SFDR = 128dB

–40

–60

–100

–110

–120

–130

–140

–80

SINAD

–100

–120

–140

–160

–180

0

100

200

300

400

500

0

25 50 75 100 125 150 175 200

0

25 50 75 100 125 150 175 200

FREQUENCY (kHz)

237816 G05

237816 G06

237816 G04

SNR, SINAD vs Input level,

f_IN= 2kHz

SNR, SINAD vs Reference

Voltage, f_IN= 2kHz

THD, Harmonics vs Reference

Voltage, f_IN= 2kHz

98.0

97.5

97.0

96.5

96.0

95.5

95.0

94.5

94.0

98.0

97.5

97.0

96.5

96.0

–100

–105

–110

–115

–120

–125

–130

–135

–140

–145

–150

SNR

SINAD

THD

3RD

SINAD

2ND

2.5

3.0

3.5

4.0

4.5

5.0

–40

–30

–20

–10

0

2.5

3.0

3.5

4.0

4.5

5.0

REFERENCE VOLTAGE (V)

INPUT LEVEL (dB)

REFERENCE VOLTAGE (V)

237816 G08

237816 G07

237816 G09

237816fa

6

For more information www.linear.com/LTC2378-16

LTC2378-16

Typical perForMance characTerisTics ^T_A^{= 2.°C, V}_DD= 20.V, OV_DD= 20.V, V_CM= 20.V,

REF = .V, f_SMP5= 1Msps, unless otherwise noted0

SNR, SINAD vs Temperature,

f_IN= 2kHz

THD, Harmonics vs Temperature,

f_IN= 2kHz

IN5/DN5 vs Temperature

98.0

97.5

97.0

96.5

96.0

–110

–115

–120

–125

–130

–135

–140

0.5

0.3

SNR

MAX INL

MAX DNL

THD

SINAD

0.1

3RD

MIN DNL

–0.1

–0.3

–0.5

MIN INL

2ND

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

237816 G10

237816 G11

237816 G12

Supply Current vs Temperature

Full-Scale Error vs Temperature

Offset Error vs Temperature

1.0

0.5

6

5

4

3

2

1

0

2.0

1.5

I

VDD

–FS

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

I

REF

+FS

I

OVDD

–1.0

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

237816 G14

237816 G15

237816 G13

Reference Current

vs Reference Voltage

Shutdown Current vs Temperature

CMRR vs Input Frequency

45

40

35

30

25

20

15

10

5

100

95

90

85

80

75

70

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

I

+ I

VDD OVDD REF

0

2.5

3.0

3.5

4.0

4.5

5.0

0

125

250

375

500

–55 –35 –15

5

25 45 65 85 105 125

REFERENCE VOLTAGE (V)

FREQUENCY (kHz)

TEMPERATURE (°C)

237816 G16

237816 G17

237816 G18

237816fa

7

For more information www.linear.com/LTC2378-16

LTC2378-16

pin FuncTions

CHAIN ꢁPin 1x: Chain Mode Selector Pin. When low, the

LTC2378-16 operates in normal mode and the RDL/SDI

input pin functions to enable or disable SDO. When high,

the LTC2378-16 operates in chain mode and the RDL/SDI

pin functions as SDI, the daisy-chain serial data input.

ꢀUSY ꢁPin 11x: ꢀUSY Indicator. Goes high at the start of

a new conversion and returns low when the conversion

has finished. Logic levels are determined by ±V .

DD

RD5/SDI ꢁPin 12x: When CHAIN is low, the part is in nor-

mal mode and the pin is treated as a bus enabling input.

When CHAIN is high, the part is in chain mode and the

pin is treated as a serial data input pin where data from

another ADC in the daisy-chain is input. Logic levels are

Logic levels are determined by ±V .

DD

V

ꢁPin 2x: 2.5V Power Supply. The range of V is

DD

2.375Vto2.625V. ꢀypassV toGNDwitha1±µFceramic

DD

capacitor.

determined by ±V .

DD

GND ꢁPins 3, 6, 1± and 16x: Ground.

SCKꢁPin13x:SerialDataClockInput.WhenSDOisenabled,

the conversion result or daisy-chain data from another

ADC is shifted out on the rising edges of this clock MSꢀ

+

–

IN , IN ꢁPins 4, .x: Positive and Negative Differential

Analog Inputs.

first. Logic levels are determined by ±V .

DD

REF ꢁPin 7x: Reference Input. The range of REF is 2.5V

to 5.1V. This pin is referred to the GND pin and should be

decoupledcloselytothepinwitha 47µFceramiccapacitor

(X5R, ±8±5 size).

SDOꢁPin14x:SerialDataOutput. Theconversionresultor

daisy-chain data is output on this pin on each rising edge

of SCK MSꢀ first. The output data is in 2’s complement

format. Logic levels are determined by ±V .

DD

REF/DGCꢁPin8x:WhentiedtoREF,digitalgaincompression

is disabled and the LTC2378-16 defines full-scale accord-

OV ꢁPin 1.x: I/O Interface Digital Power. The range of

DD

OV is 1.71V to 5.25V. This supply is nominally set to

DD

ing to the ±V

analog input range. When tied to GND,

REF

the same supply as the host interface (1.8V, 2.5V, 3.3V,

digital gain compression is enabled and the LTC2378-16

or 5V). ꢀypass OV to GND with a ±.1µF capacitor.

DD

defines full-scale with inputs that swing between 1±% and

9±% of the ±V analog input range.

GND ꢁEꢂposed Pad Pin 17 – DFN Package Onlyx: Ground.

Exposedpadmustbesoldereddirectlytothegroundplane.

REF

CNV ꢁPin 9x: Convert Input. A rising edge on this input

powers up the part and initiates a new conversion. Logic

levels are determined by ±V .

DD

FuncTional block DiagraM

V

= 2.5V

DD

OV = 1.8V to 5V

DD

REF = 5V

LTC2378-16

CHAIN

SDO

RDL/SDI

SCK

+

IN

SPI

PORT

16-BIT SAMPLING ADC

–

IN

CNV

BUSY

REF/DGC

CONTROL LOGIC

GND

237816 BD01

237816fa

8

For more information www.linear.com/LTC2378-16

LTC2378-16

TiMing DiagraM

Conversion Timing Using the Serial Interface

CHAIN, RDL/SDI = 0

CNV

POWER-DOWN AND ACQUIRE

CONVERT

BUSY

SCK

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

SDO

237816 TD01

237816fa

9

For more information www.linear.com/LTC2378-16

LTC2378-16

applicaTions inForMaTion

OVERVIEW

TRANSFER FUNCTION

TheLTC2378-16isalownoise,lowpower,highspeed16-bit

successive approximation register (SAR) ADC. Operating

from a single 2.5V supply, the LTC2378-16 supports a

The LTC2378-16 digitizes the full-scale voltage of 2 × REF

16

into 2 levels, resulting in an LSꢀ size of 152µV with

REF = 5V. The ideal transfer function is shown in Figure 2.

The output data is in 2’s complement format.

large and flexible ±V fully differential input range with

REF

V

ranging from 2.5V to 5.1V, making it ideal for high

REF

performance applications which require a wide dynamic

range. The LTC2378-16 achieves ±±.5LSꢀ INL max, no

missing codes at 16 bits and 97dꢀ SNR.

011...111

BIPOLAR

011...110

ZERO

000...001

000...000

111...111

111...110

Fast 1Msps throughput with no cycle latency makes the

LTC2378-16 ideally suited for a wide variety of high speed

applications.Aninternaloscillatorsetstheconversiontime,

easing external timing considerations. The LTC2378-16

dissipates only 13.5mW at 1Msps, while an auto power-

down feature is provided to further reduce power dissipa-

tion during inactive periods.

100...001

FSR = +FS – –FS

1LSB = FSR/65536

100...000

–1 0V

LSB

INPUT VOLTAGE (V)

1

LSB

–FSR/2

FSR/2 – 1LSB

237816 F02

The LTC2378-16 features a unique digital gain compres-

sion(DGC)function,whicheliminatesthedriveramplifier’s

negative supply while preserving the full resolution of the

ADC. When enabled, the ADC performs a digital scaling

Figure 20 5TC2378-16 Transfer Function

ANA5OG INPUT

function that maps zero-scale code from ±V to ±.1 • V

The analog inputs of the LTC2378-16 are fully differential

in order to maximize the signal swing that can be digitized.

Theanaloginputscanbemodeledbytheequivalentcircuit

shown in Figure 3. The diodes at the input provide ESD

protection. In the acquisition phase, each input sees ap-

REF

and full-scale code from V

to ±.9 • V . For a typical

REF

reference voltage of 5V, the full-scale input range is now

±.5V to 4.5V, which provides adequate headroom for

powering the driving amplifier from a single 5.5V supply.

proximately 45pF (C ) from the sampling CDAC in series

IN

with 4±Ω (R ) from the on-resistance of the sampling

ON

CONVERTER OPERATION

switch. Any unwanted signal that is common to both

inputs will be reduced by the common mode rejection of

the ADC. The inputs draw a current spike while charging

The LTC2378-16 operates in two phases. During the ac-

quisition phase, the charge redistribution capacitor D/A

+

–

the C capacitors during acquisition. During conversion,

the analog inputs draw only a small leakage current.

converter (CDAC) is connected to the IN and IN pins

to sample the differential analog input voltage. A rising

edge on the CNV pin initiates a conversion. During the

conversionphase,the16-bitCDACissequencedthrougha

successiveapproximationalgorithm,effectivelycomparing

the sampled input with binary-weighted fractions of the

IN

REF

C

45pF

IN

R

40Ω

ON

+

IN

referencevoltage(e.g.V /2,V /4…V /65536)using

REF

BIAS

the differential comparator. At the end of conversion, the

CDAC output approximates the sampled analog input. The

ADC control logic then prepares the 16-bit digital output

code for serial transfer.

VOLTAGE

REF

C

45pF

IN

R

40Ω

ON

–

237816 F03

Figure 30 The Equivalent Circuit for the

Differential Analog Input of the 5TC2378-16

237816fa

10

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LTC2378-16

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INPUT DRIVE CIRCUITS

Highqualitycapacitorsandresistorsshouldbeusedinthe

RCfilterssincethesecomponentscanadddistortion.NPO

and silver mica type dielectric capacitors have excellent

linearity. Carbon surface mount resistors can generate

distortion from self heating and from damage that may

occurduringsoldering.Metalfilmsurfacemountresistors

are much less susceptible to both problems.

A low impedance source can directly drive the high im-

pedance inputs of the LTC2378-16 without gain error. A

high impedance source should be buffered to minimize

settling time during acquisition and to optimize the dis-

tortion performance of the ADC. Minimizing settling time

is important even for DC inputs, because the ADC inputs

draw a current spike when entering acquisition.

Single-Ended-to-Differential Conversion

For best performance, a buffer amplifier should be used

to drive the analog inputs of the LTC2378-16. The ampli-

fier provides low output impedance, which produces fast

settling of the analog signal during the acquisition phase.

It also provides isolation between the signal source and

the current spike the ADC inputs draw.

Forsingle-endedinputsignals,asingle-endedtodifferential

conversion circuit must be used to produce a differential

signal at the inputs of the LTC2378-16. The LT635± ADC

driver is recommended for performing single-ended-to-

differential conversions. The LT635± is flexible and may

be configured to convert single-ended signals of various

amplitudes to the ±5V differential input range of the

LTC2378-16. The LT635± is also available in H-grade to

complement the extended temperature operation of the

LTC2378-16 up to 125°C.

Input Filtering

The noise and distortion of the buffer amplifier and signal

sourcemustbeconsideredsincetheyaddtotheADCnoise

and distortion. Noisy input signals should be filtered prior

to the buffer amplifier input with an appropriate filter to

minimizenoise.Thesimple1-poleRClowpassfilter(LPF1)

shown in Figure 4 is sufficient for many applications.

Figure 5a shows the LT635± being used to convert a ±V

to 5V single-ended input signal. In this case, the first

amplifierisconfiguredasaunitygainbufferandthesingle-

ended input signal directly drives the high-impedance

input of the amplifier. As shown in the FFT of Figure 5b,

the LT635± drives the LTC2378-16 to near full data sheet

performance.

LPF2

6800pF

SINGLE-ENDED-

20Ω

LPF1

INPUT SIGNAL

+

–

IN

500Ω

3300pF

The LT635± can also be used to buffer and convert large

true bipolar signals which swing below ground to the ±5V

differential input range of the LTC2378-16 in order to

maximize the signal swing that can be digitized. Figure 6a

shows the LT635± being used to convert a ±1±V true bi-

polar signal for use by the LTC2378-16. In this case, the

first amplifier in the LT635± is configured as an inverting

amplifier stage, which acts to attenuate and level shift the

inputsignaltothe±Vto5VinputrangeoftheLTC2378-16.

In the inverting amplifier configuration, the single-ended

input signal source no longer directly drives a high imped-

ance input of the first amplifier. The input impedance is

LTC2378-16

6600pF

IN

20Ω

237816 F04

SINGLE-ENDED- 6800pF

TO-DIFFERENTIAL

DRIVER

BW = 48kHz

BW = 600kHz

Figure 40 Input Signal Chain

Another filter network consisting of LPF2 should be used

between the buffer and ADC input to both minimize the

noisecontributionofthebufferandtohelpminimizedistur-

bances reflected into the buffer from sampling transients.

Long RC time constants at the analog inputs will slow

down the settling of the analog inputs. Therefore, LPF2

requires a wider bandwidth than LPF1. A buffer amplifier

with a low noise density must be selected to minimize

degradation of the SNR.

instead set by resistor R . R must be chosen carefully

IN IN

based on the source impedance of the signal source.

Higher values of R tend to degrade both the noise and

IN

distortion of the LT635± and LTC2378-16 as a system.

237816fa

11

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LTC2378-16

applicaTions inForMaTion

V

CM

LT6350

5V

0V

OUT1

4

5V

0V

R2 = 499Ω

R

INT

200pF

8

1

+

–

LT6350

5V

0V

OUT1

OUT2

4

5

5V

0V

–

+

R

INT

R

INT

8

+

–

OUT2

5

10µF

R4 = 402Ω

R3 = 2k

2

5V

0V

–

+

–

V

= V /2

REF

CM

1

2

237816 F05a

10V

0V

–10V

R

= 2k

R1 = 499Ω

IN

+

–

V

= V /2

REF

CM

Figure .a0 5T63.± Converting a ±V-.V Single-Ended

Signal to a ±.V Differential Input Signal

220pF

237816 F06a

Figure 6a0 5T63.± Converting a ±1±V Single-Ended Signal

to a ±.V Differential Input Signal

0

SNR = 96.5dB

–20

–40

THD = –108.7dB

SINAD = 96.2dB

SFDR = 109.4dB

0

SNR = 96.3dB

–20

–40

THD = –100.9dB

SINAD = 95.2dB

SFDR = 103.3dB

–60

–80

–60

–100

–120

–140

–160

–180

–80

–100

–120

–140

–160

–180

0

100

200

300

400

500

FREQUENCY (kHz)

237816 F05b

0

100

200

300

400

500

Figure .b0 32k Point FFT Plot with f_IN= 2kHz

for Circuit Shown in Figure .a

FREQUENCY (kHz)

237816 F06b

Figure 6b0 32k Point FFT Plot with f_IN= 2kHz

for Circuit Shown in Figure 6a

R1, R2, R3 and R4 must be selected in relation to R to

IN

achievethedesiredattenuationandtomaintainabalanced

input impedance in the first amplifier. Table 1 shows the

5V

LT6203

5V

0V

3

2

+

–

resulting SNR and THD for several values of R , R1, R2,

IN

1

7

0V

R3 and R4 in this configuration. Figure 6b shows the re-

sulting FFT when using the LT635± as shown in Figure 6a.

5V

0V

5V

0V

5

6

+

–

Table 10 SNR, THD vs R_INfor ±1±V Single-Ended Input Signal0

R

R1

ꢁΩx

R2

ꢁΩx

R3

ꢁΩx

R4

ꢁΩx

SNR

ꢁdꢀx

THD

ꢁdꢀx

IN

ꢁΩx

237816 F07

2k

499

2k

4±2

2k

96.3

–1±1

–92

Figure 70 5T62±3 ꢀuffering a Fully Differential Signal Source

1±k

1±±k

2.49k

24.9k

2.49k

24.9k

1±k

1±±k

2±k

–98

Digital Gain Compression

The LTC2378-16 offers a digital gain compression (DGC)

feature which defines the full-scale input swing to be be-

Fully Differential Inputs

tween 1±% and 9±% of the ±V analog input range. To

REF

To achieve the full distortion performance of the

LTC2378-16,alowdistortionfullydifferentialsignalsource

driven through the LT62±3 configured as two unity gain

buffers as shown in Figure 7 can be used to get the full

data sheet THD specification of –122dꢀ.

enable digital gain compression, bring the REF/DGC pin

low. This feature allows the LT635± to be powered off of

a single +5.5V supply since each input swings between

±.5V and 4.5V as shown in Figure 8. Needing only one

237816fa

12

For more information www.linear.com/LTC2378-16

LTC2378-16

applicaTions inForMaTion

5V

many applications. With its small size, low power and

highaccuracy,theLTC6655-5isparticularlywellsuitedfor

use with the LTC2378-16. The LTC6655-5 offers ±.±25%

(max) initial accuracy and 2ppm/°C (max) temperature

coefficientforhighprecisionapplications.TheLTC6655-5

is fully specified over the H-grade temperature range and

complements the extended temperature operation of the

LTC2378-16 up to 125°C. We recommend bypassing the

LTC6655-5 with a 47µF ceramic capacitor (X5R, ±8±5

size) close to the REF pin.

4.5V

0.5V

0V

237816 F08

Figure 80 Input Swing of the 5TC2378 with Gain

Compression Enabled

positive supply to power the LT635± results in additional

power savings for the entire system.

TheREFpinoftheLTC2378-16drawscharge(Q

)from

CONV

Figure 9a shows how to configure the LT635± to accept a

±1±V true bipolar input signal and attenuate and level shift

the signal to the reduced input range of the LTC2378-16

when digital gain compression is enabled. Figure 9b

shows an FFT plot with the LTC2378-16 being driven by

the LT635± with digital gain compression enabled.

the 47µF bypass capacitor during each conversion cycle.

The reference replenishes this charge with a DC current,

I

= Q

/t . The DC current draw of the REF pin,

REF

CONV CYC

, depends on the sampling rate and output code. If

the LTC2378-16 is used to continuously sample a signal

at a constant rate, the LTC6655-5 will keep the deviation

of the reference voltage over the entire code span to less

than ±.5LSꢀs.

ADC REFERENCE

The LTC2378-16 requires an external reference to define

its input range. A low noise, low temperature drift refer-

enceiscriticaltoachievingthefulldatasheetperformance

of the ADC. Linear Technology offers a portfolio of high

performance references designed to meet the needs of

When idling, the REF pin on the LTC2378-16 draws only

a small leakage current (< 1µA). In applications where a

burst of samples is taken after idling for long periods as

shown in Figure 1±, I quickly goes from approximately

REF

5.5V

V

LTC6655-5

IN

0

–20

OUT_F

OUT_S

SNR = 95.5dB

THD = –97.6dB

SINAD = 93.8dB

SFDR = 99.5dB

5V

1k

–40

47µF

V

CM

–60

4.5V

0.5V

2.5V

1k

10µF

3

+

–80

V

6800pF

LT6350

OUT1

OUT2

6.04k

4.32k

REF

V

4

DD

LTC2378-16

REF/DGC

–100

–120

–140

–160

–180

+

–

20Ω

IN

R

INT

8

+

–

INT

10µF

R

3300pF

20Ω

–

+

5

6

1

4.5V

2

–

237816 F09a

V

6800pF

10V

0V

–10V

= 15k

3.01k

IN

0

100

200

300

400

500

0.5V

V

CM

FREQUENCY (kHz)

237816 F09b

Figure 9a0 5T63.± Configured to Accept a ±1±V Input Signal While Running Off of a

Single .0.V Supply When Digital Gain Compression Is Enabled in the 5TC2378-16

Figure 9b0 32k Point FFT Plot

with f_IN= 2kHz for Circuit Shown

in Figure 9a

CNV

IDLE

PERIOD

IDLE

PERIOD

237816 F10

Figure 1±0 CNV Waveform Showing ꢀurst Sampling

237816fa

13

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LTC2378-16

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±µA to a maximum of ±.75mA at 1Msps. This step in DC

currentdrawtriggersatransientresponseinthereference

that must be considered since any deviation in the refer-

ence output voltage will affect the accuracy of the output

code. In applications where the transient response of the

reference is important, the fast settling LTC6655-5 refer-

ence is also recommended.

Signal-to-Noise Ratio ꢁSNRx

The signal-to-noise ratio (SNR) is the ratio between the

RMS amplitude of the fundamental input frequency and

the RMS amplitude of all other frequency components

except the first five harmonics and DC. Figure 11 shows

that the LTC2378-16 achieves a typical SNR of 97dꢀ at a

1MHz sampling rate with a 2kHz input.

DYNAMIC PERFORMANCE

Total Harmonic Distortion ꢁTHDx

Fast Fourier Transform (FFT) techniques are used to test

the ADC’s frequency response, distortion and noise at the

rated throughput. ꢀy applying a low distortion sine wave

and analyzing the digital output using an FFT algorithm,

the ADC’s spectral content can be examined for frequen-

cies outside the fundamental. The LTC2378-16 provides

guaranteed tested limits for both AC distortion and noise

measurements.

TotalHarmonicDistortion(THD)istheratiooftheRMSsum

ofallharmonicsoftheinputsignaltothefundamentalitself.

The out-of-band harmonics alias into the frequency band

between DC and half the sampling frequency (f

THD is expressed as:

/2).

SMPL

V2²+V3²+V4²+…+V_N²

THD=2±log

V1

Signal-to-Noise and Distortion Ratio ꢁSINADx

where V1 is the RMS amplitude of the fundamental fre-

quencyandV2throughV aretheamplitudesofthesecond

N

The signal-to-noise and distortion ratio (SINAD) is the

ratiobetweentheRMSamplitudeofthefundamentalinput

frequency and the RMS amplitude of all other frequency

components at the A/D output. The output is band-limited

tofrequenciesfromaboveDCandbelowhalfthesampling

frequency. Figure11showsthattheLTC2378-16achieves

a typical SINAD of 97dꢀ at a 1MHz sampling rate with a

2kHz input.

through Nth harmonics.

POWER CONSIDERATIONS

The LTC2378-16 provides two power supply pins: the

2.5V power supply (V ), and the digital input/output

DD

interface power supply (OV ). The flexible OV supply

DD

allows the LTC2378-16 to communicate with any digital

logic operating between 1.8V and 5V, including 2.5V and

3.3V systems.

0

SNR = 97.2dB

–20

–40

THD = –121.7dB

SINAD = 97.1dB

SFDR = 128dB

Power Supply Sequencing

–60

The LTC2378-16 does not have any specific power supply

sequencing requirements. Care should be taken to adhere

to the maximum voltage relationships described in the

Absolute Maximum Ratings section. The LTC2378-16

has a power-on-reset (POR) circuit that will reset the

LTC2378-16 at initial power-up or whenever the power

supply voltage drops below 1V. Once the supply voltage

re-enters the nominal supply voltage range, the POR will

reinitialize the ADC. No conversions should be initiated

until 2±µs after a POR event to ensure the reinitialization

period has ended. Any conversions initiated before this

–80

–100

–120

–140

–160

–180

0

100

200

300

400

500

FREQUENCY (kHz)

237816 F11

Figure 110 32k Point FFT with f_IN= 2kHz of the 5TC2378-16

time will produce invalid results.

237816fa

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TIMING AND CONTRO5

DIGITA5 INTERFACE

The LTC2378-16 has a serial digital interface. The flexible

CNV Timing

OV supplyallowstheLTC2378-16tocommunicatewith

DD

The LTC2378-16 conversion is controlled by CNV. A ris-

ing edge on CNV will start a conversion and power up

the LTC2378-16. Once a conversion has been initiated,

it cannot be restarted until the conversion is complete.

For optimum performance, CNV should be driven by a

clean low jitter signal. Converter status is indicated by the

ꢀUSY output which remains high while the conversion is

in progress. To ensure that no errors occur in the digitized

results, any additional transitions on CNV should occur

within 4±ns from the start of the conversion or after the

conversion has been completed. Once the conversion has

completed, the LTC2378-16 powers down and begins

acquiring the input signal.

any digital logic operating between 1.8V and 5V, including

2.5V and 3.3V systems.

The serial output data is clocked out on the SDO pin when

anexternalclockisappliedtotheSCKpinifSDOisenabled.

Clocking out the data after the conversion will yield the

best performance. With a shift clock frequency of at least

4±MHz, a 1Msps throughput is still achieved. The serial

output data changes state on the rising edge of SCK and

can be captured on the falling edge or next rising edge of

SCK. D15 remains valid till the first rising edge of SCK.

The serial interface on the LTC2378-16 is simple and

straightforwardtouse.Thefollowingsectionsdescribethe

operationoftheLTC2378-16. Severalmodesareprovided

depending on whether a single or multiple ADCs share the

SPI bus or are daisy-chained.

Internal Conversion Clock

The LTC2378-16 has an internal clock that is trimmed to

achieveamaximumconversiontimeof527ns.Withamin-

imum acquisition time of 46±ns, throughput performance

of 1Msps is guaranteed without any external adjustments.

6

5

Auto Power-Down

I

VDD

4

3

2

1

0

The LTC2378-16 automatically powers down after a

conversion has been completed and powers up once a

new conversion is initiated on the rising edge of CNV.

During power down, data from the last conversion can

be clocked out. To minimize power dissipation during

power down, disable SDO and turn off SCK. The auto

power-down feature will reduce the power dissipation of

the LTC2378-16 as the sampling frequency is reduced.

Since power is consumed only during a conversion, the

LTC2378-16remainspowered-downforalargerfractionof

I

REF

I

OVDD

0

100 200 300 400 500 600 700 800 9001000

SAMPLING RATE (kHz)

237816 F12

Figure 120 Power Supply Current of the 5TC2378-16

Versus Sampling Rate

the conversion cycle (t ) at lower sample rates, thereby

CYC

reducing the average power dissipation which scales with

the sampling rate as shown in Figure 12.

237816fa

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Normal Mode, Single Device

Figure 13 shows a single LTC2378-16 operated in normal

mode with CHAIN and RDL/SDI tied to ground. With RDL/

SDI grounded, SDO is enabled and the MSꢀ(D15) of the

new conversion data is available at the falling edge of

ꢀUSY.ThisisthesimplestwaytooperatetheLTC2378-16.

When CHAIN = ±, the LTC2378-16 operates in normal

mode. In normal mode, RDL/SDI enables or disables the

serial data output pin SDO. If RDL/SDI is high, SDO is in

high impedance. If RDL/SDI is low, SDO is driven.

CONVERT

DIGITAL HOST

IRQ

CNV

CHAIN

BUSY

LTC2378-16

SCK

RDL/SDI

SDO

DATA IN

CLK

237816 F13a

POWER-DOWN

AND ACQUIRE

CONVERT

POWER-DOWN AND ACQUIRE

CONVERT

CHAIN = 0

RDL/SDI = 0

t

CYC

t

CNVH

t

CNVL

CNV

t

= t

– t

ACQ CYC CONV BUSYLH

t

CONV

ACQ

BUSY

t

SCK

t

BUSYLH

t

QUIET

SCKH

1

2

3

14

15

16

SCK

SDO

t

SCKL

HSDO

t

DSDO

DSDOBUSYL

D15

D14

D13

D1

D0

237816 F13

Figure 130 Using a Single 5TC2378-16 in Normal Mode

237816fa

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LTC2378-16

applicaTions inForMaTion

Normal Mode, Multiple Devices

Since SDO is shared, the RDL/SDI input of each ADC must

be used to allow only one LTC2378-16 to drive SDO at a

timeinordertoavoidbusconflicts. AsshowninFigure14,

the RDL/SDI inputs idle high and are individually brought

low to read data out of each device between conversions.

When RDL/SDI is brought low, the MSꢀ of the selected

device is output onto SDO.

Figure 14 shows multiple LTC2378-16 devices operating

in normal mode (CHAIN = ±) sharing CNV, SCK and SDO.

ꢀy sharing CNV, SCK and SDO, the number of required

signals to operate multiple ADCs in parallel is reduced.

RDL

B

A

CONVERT

CNV

CHAIN

BUSY

SDO

IRQ

CHAIN

LTC2378-16

B

LTC2378-16

A

DIGITAL HOST

SDO

RDL/SDI

SCK

DATA IN

CLK

237816 F14a

POWER-DOWN

AND ACQUIRE

CONVERT

POWER-DOWN AND ACQUIRE

CHAIN = 0

t

CNVL

CNV

t

CONV

BUSY

t

BUSYLH

RDL/SDI

A

B

RDL/SDI

t

SCK

t

QUIET

SCKH

SCK

SDO

1

2

3

14

15

16

17

18

19

30

31

32

t

SCKL

HSDO

t

DIS

DSDO

t

EN

Hi-Z

D15

D14

D13

D1

A

D0

A

D15

D14

D13

D1

B

D0

B

A

B

237816 F14

Figure 140 Normal Mode With Multiple Devices Sharing CNV, SCK and SDO

237816fa

17

For more information www.linear.com/LTC2378-16

LTC2378-16

applicaTions inForMaTion

Chain Mode, Multiple Devices

This is useful for applications where hardware constraints

may limit the numberoflines needed to interface toa large

number of converters. Figure 15 shows an example with

two daisy-chained devices. The MSꢀ of converter A will

appear at SDO of converter ꢀ after 16 SCK cycles. The

MSꢀ of converter A is clocked in at the SDI/RDL pin of

converter ꢀ on the rising edge of the first SCK.

When CHAIN = OV , the LTC2378-16 operates in chain

DD

mode.Inchainmode,SDOisalwaysenabledandRDL/SDI

serves as the serial data input pin (SDI) where daisy-chain

data output from another ADC can be input.

CONVERT

OV

DD

CNV

CHAIN

DIGITAL HOST

LTC2378-16

RDL/SDI

SDO

RDL/SDI

BUSY

SDO

IRQ

A

B

DATA IN

SCK

CLK

237816 F16a

POWER-DOWN

AND ACQUIRE

CONVERT

POWER-DOWN AND ACQUIRE

CONVERT

CHAIN = OV

DD

RDL/SDI = 0

A

t

CYC

t

CNVL

CNV

BUSY

t

CONV

t

BUSYLH

SCK

t

SCKCH

t

QUIET

SCKH

1

2

3

14

15

16

17

18

30

31

32

t

SCKL

t

HSDO

SSDISCK

t

DSDO

HSDISCK

SDO = RDL/SDI

A

B

D15

D14

D13

D1

D0

A

t

DSDOBUSYL

D15

D13

D1

B

D15

D14

D1

A

D0

A

SDO

B

A

B

237816 F15

Figure 1.0 Chain Mode Timing Diagram

237816fa

18

For more information www.linear.com/LTC2378-16

LTC2378-16

boarD layouT

To obtain the best performance from the LTC2378-16

a printed circuit board is recommended. Layout for the

printed circuit board (PCꢀ) should ensure the digital and

analog signal lines are separated as much as possible. In

particular,careshouldbetakennottorunanydigitalclocks

orsignalsalongsideanalogsignalsorunderneaththeADC.

Recommended 5ayout

ThefollowingisanexampleofarecommendedPCꢀlayout.

A single solid ground plane is used. ꢀypass capacitors to

the supplies are placed as close as possible to the supply

pins. Low impedance common returns for these bypass

capacitors are essential to the low noise operation of the

ADC. The analog input traces are screened by ground.

For more details and information refer to DC1783A, the

evaluation kit for the LTC2378-16.

Partial Top Silkscreen

237816fa

19

For more information www.linear.com/LTC2378-16

LTC2378-16

boarD layouT

Partial 5ayer 1 Component Side

Partial 5ayer 2 Ground Plane

237816fa

20

For more information www.linear.com/LTC2378-16

LTC2378-16

boarD layouT

Partial 5ayer 3 PWR Plane

Partial 5ayer 4 ꢀottom 5ayer

237816fa

21

For more information www.linear.com/LTC2378-16

LTC2378-16

boarD layouT

Partial Schematic of Demo ꢀoard

D G C R E F /

R E F

8

7

1 5

2

1

G N D

D D

V

G N D 1 6

O V

G N D

1 0

G N D

6

3

2

1

3

2

1

237816fa

22

For more information www.linear.com/LTC2378-16

LTC2378-16

package DescripTion

Please refer to http://www0linear0com/product/5TC2378-16#packaging for the most recent package drawings0

DE Package

16-5ead Plastic DFN ꢁ4mm × 3mmx

(Reference LTC DWG # ±5-±8-1732 Rev Ø)

0.70 0.05

3.30 0.05

ꢀ.70 0.05

3.60 0.05

2.20 0.05

PACKAGE

OUTLINE

0.25 0.05

0.45 BSC

3.ꢀ5 REF

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.ꢀꢀ5

TYP

0.40 0.ꢀ0

4.00 0.ꢀ0

(2 SIDES)

9

ꢀ6

R = 0.05

TYP

3.30 0.ꢀ0

3.00 0.ꢀ0

(2 SIDES)

ꢀ.70 0.ꢀ0

PIN ꢀ NOTCH

R = 0.20 OR

0.35 × 45°

PIN ꢀ

TOP MARK

(SEE NOTE 6)

CHAMFER

(DEꢀ6) DFN 0806 REV Ø

8

ꢀ

0.23 0.05

0.45 BSC

0.75 0.05

0.200 REF

3.ꢀ5 REF

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

ꢀ. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC

PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

237816fa

23

For more information www.linear.com/LTC2378-16

LTC2378-16

package DescripTion

Please refer to http://www0linear0com/product/5TC2378-16#packaging for the most recent package drawings0

MS Package

16-5ead Plastic MSOP

(Reference LTC DWG # ±5-±8-1669 Rev A)

0.889 ±0.127

(.035 ±.005)

5.10

3.20 – 3.45

(.201)

(.126 – .136)

MIN

4.039 ±0.102

(.159 ±.004)

(NOTE 3)

0.50

(.0197)

BSC

0.305 ±0.038

(.0120 ±.0015)

TYP

0.280 ±0.076

(.011 ±.003)

REF

16151413121110

9

RECOMMENDED SOLDER PAD LAYOUT

3.00 ±0.102

(.118 ±.004)

(NOTE 4)

DETAIL “A”

0.254

4.90 ±0.152

(.193 ±.006)

(.010)

0° – 6° TYP

GAUGE PLANE

0.53 ±0.152

(.021 ±.006)

1 2 3 4 5 6 7 8

0.86

(.034)

REF

1.10

(.043)

MAX

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 ±0.0508

(.004 ±.002)

MSOP (MS16) 0213 REV A

0.50

(.0197)

BSC

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

237816fa

24

For more information www.linear.com/LTC2378-16

LTC2378-16

revision hisTory

REV

DATE

DESCRIPTION

PAGE NUMꢀER

A

±8/16 Updated graphs G±1, G±2, and G±3

6

237816fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

25

For more information www.linear.com/LTC2378-16

LTC2378-16

Typical applicaTion

5T63.± Configured to Accept a ±1±V Input Signal While Running Off of a Single .0.V Supply When

Digital Gain Compression Is Enabled in the 5TC2378-16

5.5V

V

LTC6655-5

IN

OUT_F

OUT_S

5V

1k

47µF

V

CM

4.5V

0.5V

2.5V

10µF

3

+

V

6800pF

LT6350

OUT1

OUT2

6.04k

4.32k

REF

V

4

DD

LTC2378-16

REF/DGC

+

–

20Ω

IN

R

INT

8

+

–

INT

10µF

R

3300pF

20Ω

–

+

5

6

1

4.5V

2

–

237816 TA03

V

6800pF

10V

0V

= 15k

3.01k

IN

0.5V

V

CM

–10V

relaTeD parTs

PART NUMꢀER

DESCRIPTION

COMMENTS

ADCs

LTC2379-18

18-ꢀit, 1.6Msps Serial, Low Power ADC

16-ꢀit, 2Msps Serial, Low Power ADC

2.5V Supply, Differential Input, 1±1.2dꢀ SNR, ±5V Input Range,

DGC, MSOP-16 and 4mm × 3mm DFN-16 Packages

LTC238±-16

2.5V Supply, Differential Input, 96.2dꢀ SNR, ±5V Input Range,

DGC, MSOP-16 and 4mm × 3mm DFN-16 Packages

LTC2383-16/LTC2382-16/ 16-ꢀit, 1Msps/5±±ksps/25±ksps Serial, Low Power

LTC2381-16 ADC

2.5V Supply, Differential Input, 92dꢀ SNR, ±2.5V Input Range, Pin

Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages

LTC2393-16/LTC2392-16/ 16-ꢀit, 1Msps/5±±ksps/25±ksps Parallel/Serial ADC 5V Supply, Differential Input, 94dꢀ SNR, ±4.±96V Input Range, Pin

LTC2391-16

Compatible Family in 7mm × 7mm LQFP-48 and QFN-48 Packages

LTC2365

12-ꢀit, 1Msps Serial ADC

2.35V to 3.6V Supply 6- and 8-Lead TSOT-23 Packages

LTC2355-14/LTC2356-14 14-ꢀit, 3.5Msps Serial ADC

3.3V Supply, 1-Channel, Unipolar/ꢀipolar, 18mW, MSOP-1± Package

DACS

LTC2757

18-ꢀit, Single Parallel I

SoftSpan™ DAC

±1LSꢀ INL/DNL, Software-Selectable Ranges, 7mm × 7mm

LQFP-48 Package

OUT

LTC2641

16-ꢀit/14-ꢀit/12-ꢀit Single Serial V

DACs

±1LSꢀ INL/DNL, MSOP-8 Package, ±V to 5V Output

OUT

LTC263±

12-ꢀit/1±-ꢀit/8-ꢀit Single V

DACs

SC7± 6-Pin Package, Internal Reference, ±1LSꢀ INL (12 ꢀits)

OUT

REFERENCES

LTC6655

Precision Low Drift Low Noise ꢀuffered Reference

5V/2.5V, 5ppm/°C, ±.25ppm Peak-to-Peak Noise, MSOP-8 Package

5V/2.5V, 5ppm/°C, 2.1ppm Peak-to-Peak Noise, MSOP-8 Package

LTC6652

AMP5IFIERS

LT635±

Low Noise Single-Ended-to-Differential ADC Driver

Rail-to-Rail Input and Outputs, 24±ns, ±.±1% Settling Time

LT62±±/LT62±±-5/

LT62±±-1±

165MHz/8±±MHz/1.6GHz Op Amp with

Unity Gain/AV = 5/AV = 1±

Low Noise Voltage: ±.95nV/√Hz (1±±kHz), Low Distortion: –8±dꢀ at

1MHz, TSOT23-6 Package

LT62±2/LT62±3

Single/Dual 1±±MHz Rail-to-Rail Input/Output Noise 1.9nV√Hz, 3mA Maximum, 1±±MHz Gain ꢀandwidth

Low Power Amplifiers

LTC1992

Low Power, Fully Differential Input/Output Amplifier/ 1mA Supply Current

Driver Family

237816fa

LT 0816 REV A • PRINTED IN USA

LinearTechnology Corporation

163± McCarthy ꢀlvd., Milpitas, CA 95±35-7417

26

For more information www.linear.com/LTC2378-16

(4±8)432-19±± FAX: (4±8) 434-±5±7 www.linear.com/LTC2378-16

●

 LINEAR TECHNOLOGY CORPORATION 2011


型号：	LTC2378IDE-16#PBF
厂家：	Linear
描述：	LTC2378-16 - 16-Bit, 1Msps, Low Power SAR ADC with 97dB SNR; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C 光电二极管转换器
文件：	总26页 (文件大小：757K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC2378IDE-16#PBF [Linear]

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