LTC2165 [Linear]

50Ω Gain Block IF Amplifier n 20MHz to 1700MHz Bandwidth;
LTC2165
型号: LTC2165
厂家: Linear    Linear
描述:

50Ω Gain Block IF Amplifier n 20MHz to 1700MHz Bandwidth

文件: 总16页 (文件大小:635K)
中文:  中文翻译
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LTC6431-15  
50Ω  
Gain Block  
IF Amplifier  
FeaTures  
DescripTion  
The LTC®6431-15 is a gain-block amplifier with excellent  
linearity at frequencies beyond 1000MHz and with low  
associated output noise.  
n
20MHz to 1700MHz Bandwidth  
n
15.5dB Power Gain  
n
47dBm OIP3 at 240MHz into a 50Ω Load  
n
NF = 3.33dB at 240MHz  
The unique combination of high linearity, low noise and  
low power dissipation make this an ideal candidate for  
many signal-chain applications. The LTC6431-15 is easy  
to use, requiring a minimum of external components. It is  
internally input/output matched to 50Ω and it draws only  
90mA from a single 5V supply.  
n
1nV/√Hz Total Input Noise  
n
S11 < –15dB Up to 1.2GHz  
n
S22 < –15dB Up to 1.2GHz  
n
>2V Linear Output Swing  
P-P  
n
n
n
n
n
n
n
n
P1dB = 20.6dBm  
DC Power = 450mW  
50Ω Single-Ended Operation  
On-chip bias and temperature compensation maintain  
performance over environmental changes.  
Insensitive to V Variation  
CC  
A-Grade 100% OIP3 Tested at 240MHz  
Input/Output Internally Matched to 50Ω  
Single 5V Supply  
The LTC6431-15 uses a high performance SiGe BiCMOS  
process for excellent repeatability compared with similar  
GaAsamplifiers.AllA-gradeLTC6431-15devicesaretested  
and guaranteed for OIP3 at 240MHz. The LTC6431-15 is  
housed in a 4mm × 4mm 24-lead QFN package with an  
exposedpadforthermalmanagementandlowinductance.  
Unconditionally Stable  
applicaTions  
n
Single-Ended IF Amplifier  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
n
ADC Driver  
n
CATV  
Typical applicaTion  
Single-Ended IF Amplifier  
OIP3 vs Frequency  
50  
5V  
48  
46  
R
F
V
CC  
= 5V  
CHOKE,  
560nH  
1000pF  
1000pF  
44  
42  
40  
LTC6431-15  
R
R
SOURCE  
LOAD  
50Ω  
50Ω  
V
P
= 5V, T = 25°C  
CC  
643115 TA01a  
= 2dBm/TONE  
OUT  
38  
36  
f
= 1MHz  
OUT  
SPACE  
Z
IN  
= Z  
= 50Ω  
400  
600  
800  
1000  
0
200  
FREQUENCY (MHz)  
643115 TA01b  
643115f  
1
LTC6431-15  
absoluTe MaxiMuM raTings  
pin conFiguraTion  
TOP VIEW  
(Note 1)  
Total Supply Voltage (V to GND)...........................5.5V  
CC  
Amplifier Output Current (OUT) ...........................105mA  
RF Input Power, Continuous, 50Ω (Note 2)..........15dBm  
RF Input Power, 100µs Pulse, 50Ω (Note 2) ........20dBm  
Operating Case Temperature  
24 23 22 21 20 19  
DNC  
DNC  
DNC  
DNC  
DNC  
DNC  
1
2
3
4
5
6
18 OUT  
GND  
17  
16  
T_DIODE  
25  
GND  
Range (T  
)..........................................–40°C to 85°C  
CASE  
15 DNC  
DNC  
Storage Temperature Range .................. –65°C to 150°C  
14  
13 DNC  
Junction Temperature (T ) .................................... 150°C  
J
7
8
9 10 11 12  
UF PACKAGE  
24-LEAD (4mm × 4mm) PLASTIC QFN  
T
= 150°C, θ = 54°C/W  
JC  
JMAX  
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB  
orDer inForMaTion  
LEAD FREE FINISH  
LTC6431AIUF-15#PBF  
LTC6431BIUF-15#PBF  
TAPE AND REEL  
PART MARKING*  
PACKAGE DESCRIPTION  
TEMPERATURE RANGE  
–40°C to 85°C  
LTC6431AIUF-15#TRPBF 43115  
LTC6431BIUF-15#TRPBF 43115  
24-Lead (4mm × 4mm) Plastic QFN  
24-Lead (4mm × 4mm) Plastic QFN  
–40°C to 85°C  
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.  
Consult LTC Marketing for information on nonstandard lead based finish parts.  
For more information on lead free part marking, go to: http://www.linear.com/leadfree/  
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/  
Dc elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω. Typical measured DC electrical  
performance using Test Circuit A.  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
5.0  
MAX  
UNITS  
V
Operating Supply Range  
Total Supply Current  
4.75  
5.25  
V
S
I
I
I
All V Pins Plus OUT  
75  
67  
85.1  
100  
112  
mA  
mA  
S,TOT  
CC  
l
l
l
Total Supply Current to OUT Pin  
Current to OUT  
62  
55  
71  
14  
92  
95  
mA  
mA  
S,OUT  
Current to V Pin  
Either V Pin May Be Used  
12  
12.5  
16  
16.5  
mA  
mA  
CC,OUT  
CC  
CC  
643115f  
2
LTC6431-15  
ac elecTrical characTerisTics TA = 25°C (Note 3), VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise  
noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).  
SYMBOL PARAMETER  
Small Signal  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
BW  
–3dB Bandwidth  
De-Embedded to Package (Low Frequency  
Cutoff 20MHz)  
2000  
MHz  
S11  
S21  
S12  
S22  
Input Return Loss, 20MHz to 2000MHz  
Forward Power Gain, 50MHz to 300MHz  
Reverse Isolation, 20MHz to 3000MHz  
Output Return Loss, 20MHz to 1700MHz  
De-Embedded to Package  
De-Embedded to Package  
De-Embedded to Package  
De-Embedded to Package  
–10  
15.5  
–19  
–10  
dB  
dB  
dB  
dB  
Frequency = 50MHz  
S21  
Power Gain  
De-Embedded to Package  
15.5  
dB  
OIP3  
Output Third-Order Intercept Point  
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
46.0  
45.0  
dBm  
dBm  
OUT  
f
IM3  
Third-Order Intermodulation  
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–88.0  
–86.0  
dBc  
dBc  
OUT  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–58.0  
–88.0  
20.5  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.06  
Frequency = 140MHz  
S21  
Power Gain  
De-Embedded to Package  
15.5  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
47.0  
46.0  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–90.0  
–88.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–58.0  
–88.0  
20.7  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
De-Embedded to Package  
3.20  
Frequency = 240MHz  
S21  
OIP3  
IM3  
Power Gain  
14.5  
14.2  
15.6  
16.5  
16.7  
dB  
dB  
l
Output Third-Order Intercept Point  
Third-Order Intermodulation  
P
= 2dBm/Tone, Δ = 8MHz  
A-Grade  
B-Grade  
44.0  
47.0  
45.5  
dBm  
dBm  
OUT  
OUT  
f
P
= 2dBm/Tone, Δ = 8MHz  
A-Grade  
B-Grade  
–84  
–90.0  
–87.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–59.0  
–88.0  
20.6  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.33  
643115f  
3
LTC6431-15  
ac elecTrical characTerisTics TA = 25°C (Note 3), VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise  
noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).  
SYMBOL PARAMETER  
Frequency = 300MHz  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
S21  
Power Gain  
De-Embedded to Package  
15.5  
dB  
OIP3  
Output Third-Order Intercept Point  
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
46.5  
45.5  
dBm  
dBm  
OUT  
f
IM3  
Third-Order Intermodulation  
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–89.0  
–87.0  
dBc  
dBc  
OUT  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–60.0  
–86.0  
20.6  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.41  
Frequency = 380MHz  
S21  
Power Gain  
De-Embedded to Package  
15.4  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
46.0  
45.0  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–88.0  
–86.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–57.0  
–87.0  
20.6  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.48  
Frequency = 500MHz  
S21  
Power Gain  
De-Embedded to Package  
15.3  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
44.5  
43.5  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–85.0  
–83.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–55.6  
–77.0  
20.6  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.60  
Frequency = 600MHz  
S21  
Power Gain  
De-Embedded to Package  
15.3  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
41.5  
40.5  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–79.0  
–77.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–53.6  
–69.0  
20.6  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.67  
643115f  
4
LTC6431-15  
ac elecTrical characTerisTics TA = 25°C (Note 3), VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise  
noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).  
SYMBOL PARAMETER  
Frequency = 700MHz  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
S21  
Power Gain  
De-Embedded to Package  
15.2  
dB  
OIP3  
Output Third-Order Intercept Point  
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
40.0  
39.0  
dBm  
dBm  
OUT  
f
IM3  
Third-Order Intermodulation  
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–76.0  
–74.0  
dBc  
dBc  
OUT  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–51.9  
–69.0  
20.3  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.75  
Frequency = 800MHz  
S21  
Power Gain  
De-Embedded to Package  
15.2  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
39.0  
38.0  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–74  
–72  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–49.2  
–65.0  
20.1  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.83  
Frequency = 900MHz  
S21  
Power Gain  
De-Embedded to Package  
15.1  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
38.5  
37.5  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–73.0  
–71.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–46.7  
–63.0  
19.9  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.90  
Frequency = 1000MHz  
S21  
Power Gain  
De-Embedded to Package  
15.0  
dB  
OIP3  
Output Third-Order Intercept Point  
P
P
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
38.0  
37.0  
dBm  
dBm  
OUT  
OUT  
f
IM3  
Third-Order Intermodulation  
= 2dBm/Tone, Δ = 1MHz  
A-Grade  
B-Grade  
–72.0  
–70.0  
dBc  
dBc  
f
HD2  
HD3  
P1dB  
NF  
Second Harmonic Distortion  
Third Harmonic Distortion  
Output 1dB Compression Point  
Noise Figure  
P
P
= 6dBm  
= 6dBm  
–45.0  
–59.0  
19.5  
dBc  
dBc  
dBm  
dB  
OUT  
OUT  
De-Embedded to Package  
3.99  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may  
cause permanent damage to the device. Exposure to any Absolute Maximum  
Rating condition for extended periods may affect device reliability and lifetime.  
Note 3: The LTC6431-15 is guaranteed functional over the case operating  
temperature range of –40°C to 85°C.  
Note 4: Small-signal parameters S and noise are de-embedded to the package  
Note 2: Guaranteed by design and characterization. This parameter is not tested.  
pins, while large-signal parameters are measured directly from the circuit.  
643115f  
5
LTC6431-15  
Typical perForMance characTerisTics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless  
otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).  
Stability Factor K vs Frequency  
Over Temperature  
Noise Figure vs Frequency  
Over Temperature  
S Parameters vs Frequency  
25  
20  
8
7
6
5
4
3
2
1
0
10  
9
8
7
6
5
4
3
2
1
0
T
=
CASE  
T
=
CASE  
100°C  
–40°C  
25°C  
85°C  
85°C  
60°C  
35°C  
25°C  
0°C  
15  
S11  
S21  
S12  
S22  
10  
5
0
–20°C  
–40°C  
–5  
–10  
–15  
–20  
–25  
–30  
0
500 1000 1500 2000 2500 3000  
800  
FREQUENCY (MHz)  
0
400 600  
1000 1200  
1400  
0
1000  
3000  
2000  
FREQUENCY (MHz)  
4000  
5000  
200  
FREQUENCY (MHz)  
643115 G01  
643115 G02  
643115 G03  
S11 vs Frequency Over Temperature  
S21 vs Frequency Over Temperature  
0
–5  
20  
18  
16  
14  
12  
10  
8
T
=
CASE  
100°C  
85°C  
60°C  
35°C  
25°C  
0°C  
–10  
–15  
–20  
–25  
T
=
CASE  
–20°C  
–40°C  
100°C  
85°C  
60°C  
35°C  
25°C  
0°C  
6
4
2
–20°C  
–40°C  
0
0
1000 1500 2000 2500 3000  
FREQUENCY (MHz)  
500  
0
500  
1500 2000 2500 3000  
FREQUENCY (MHz)  
1000  
643115 G04  
643115 G05  
S12 vs Frequency Over Temperature  
S22 vs Frequency Over Temperature  
0
0
–5  
T
CASE  
=
T
=
CASE  
100°C  
85°C  
60°C  
35°C  
25°C  
0°C  
100°C  
–5  
–10  
–15  
–20  
–25  
–30  
85°C  
60°C  
35°C  
25°C  
0°C  
–10  
–15  
–20  
–25  
–30  
–20°C  
–40°C  
–20°C  
–40°C  
0
1000 1500 2000 2500 3000  
FREQUENCY (MHz)  
0
1000 1500 2000 2500 3000  
FREQUENCY (MHz)  
500  
500  
643115 G07  
643115 G06  
643115f  
6
LTC6431-15  
Typical perForMance characTerisTics A-Grade  
TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring  
from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).  
OIP3 vs Frequency Over  
VCC Voltage  
OIP3 vs Frequency  
OIP3 vs Power Out Over Frequency  
50  
48  
52  
50  
48  
46  
44  
42  
40  
38  
36  
34  
32  
30  
50  
48  
46  
44  
42  
40  
38  
36  
34  
T = 25°C  
V
P
f
= 5V  
CC  
P
f
IN  
= 2dBm/TONE  
= 2dBm/TONE  
= 1MHz  
OUT  
OUT  
SPACE  
= Z  
OUT  
SPACE  
= Z  
= 1MHz  
OUT  
Z
= 50Ω  
Z
= 50Ω  
IN  
46  
44  
42  
40  
38  
4.5V  
4.75V  
5V  
5.25V  
5.5V  
V
P
= 5V, T = 25°C  
CC  
= 2dBm/TONE  
OUT  
f
= 1MHz  
OUT  
SPACE  
Z
IN  
= Z  
= 50Ω  
36  
400  
600  
800  
1000  
200 300 400 500 600  
1000  
0
200  
–2  
8
10  
0
100  
700 800 900  
–10  
–6 –4  
0
2
4
6
–8  
RF POWER OUT (dBm/TONE)  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
643115 G10  
643115 G08  
643115 G09  
50MHz  
300MHz  
400MHz  
500MHz  
600MHz  
700MHz  
800MHz  
900MHz  
1000MHz  
100MHz  
200MHz  
240MHz  
OIP3 vs Tone Spacing  
Over Frequency  
OIP3 vs Frequency Over  
Case Temperature  
50  
48  
50  
45  
40  
35  
30  
25  
20  
V
P
Z
= 5V, T = 25°C  
CC  
OUT  
IN  
= 2dBm/TONE  
= Z  
= 50Ω  
OUT  
46  
44  
42  
40  
38  
85°C  
60°C  
25°C  
V
P
= 5V  
OUT  
0°C  
CC  
= 2dBm/TONE  
–20°C  
–30°C  
–40°C  
f
= 1MHz  
OUT  
SPACE  
Z
IN  
= Z  
= 50Ω  
36  
4
6
8
10 12  
20  
200 300 400 500 600  
1000  
0
2
14 16 18  
0
100  
700 800 900  
TONE SPACING (MHz)  
FREQUENCY (MHz)  
643115 G12  
643115 G11  
50MHz  
100MHz  
200MHz  
240MHz  
300MHz  
400MHz  
500MHz  
600MHz  
700MHz  
800MHz  
900MHz  
1000MHz  
643115f  
7
LTC6431-15  
Typical perForMance characTerisTics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless  
otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).  
HD2 vs Frequency Over POUT  
HD3 vs Frequency Over POUT  
HD4 vs Frequency Over POUT  
0
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
P
=
P
=
P
=
OUT  
OUT  
OUT  
6dBm  
6dBm  
6dBm  
–10  
8dBm  
10dBm  
8dBm  
10dBm  
8dBm  
10dBm  
–20  
–30  
–40  
–50  
–60  
–70  
200 300 400 500 600  
1000  
200 300 400 500 600  
1000  
200 300 400 500 600 1000  
700 800 900  
0
100  
700 800 900  
0
100  
700 800 900  
0
100  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
643115 G13  
643115 G14  
643115 G15  
Total Current (ITOT  
)
Total Current (ITOT) vs VCC  
vs Case Temperature  
Total Current vs RF Input Power  
100  
98  
96  
94  
92  
90  
88  
86  
84  
82  
95  
90  
85  
80  
75  
70  
65  
60  
55  
50  
100  
90  
80  
70  
60  
50  
V
= 5V  
CC  
T = 25°C  
T
= 25°C  
CASE  
V
= 5V  
CC  
–10 –5  
0
5
10  
15  
20  
5.25 5.5  
6
–15  
4
4.25 4.5 4.75  
5
5.75  
80 100  
–20  
0
20  
40  
60  
–40  
TEMPERATURE (°C)  
RF INPUT POWER (dBm)  
V
(V)  
CC  
643115 G21  
643115 G16  
643115 G17  
Output Power vs Input Power  
Over Frequency  
Gain vs Output Power  
Over Frequency  
P1dB vs Frequency  
22  
21  
20  
19  
18  
17  
16  
22  
20  
18  
16  
14  
12  
10  
8
16.0  
15.5  
15.0  
14.5  
14.0  
13.5  
13.0  
12.5  
12.0  
60MHz  
100MHz  
140MHz  
200MHz  
240MHz  
300MHz  
400MHz  
500MHz  
60MHz  
100MHz  
140MHz  
200MHz  
240MHz  
300MHz  
400MHz  
500MHz  
600MHz  
700MHz  
800MHz  
900MHz  
1000MHz  
600MHz  
700MHz  
800MHz  
900MHz  
1000MHz  
6
4
2
0
200 300 400 500 600 1000  
700 800 900  
0
100  
–10  
–6 –4 –2  
0
2
4
6
8
10  
–8  
0
5
10  
15  
20  
FREQUENCY (MHz)  
INPUT POWER (dBm)  
OUTPUT POWER (dBm)  
643115 G21  
643115 G19  
643115 G20  
643115f  
8
LTC6431-15  
pin FuncTions  
GND (Pins 8, 17, 23, Exposed Pad Pin 25): Ground. For  
bestRFperformance,allgroundpinsshouldbeconnected  
totheprintedcircuitboardgroundplane. Theexposedpad  
should have multiple via holes to an underlying ground  
plane for low inductance and good thermal dissipation.  
OUT (Pin 18): Amplifier Output Pin. A choke inductor is  
necessary to provide power from the 5V supply and to  
provide RF isolation. For best performance select a choke  
with low loss and high self-resonant frequency (SRF). A  
DC blocking capacitor is also required. See the Applica-  
tions Information section for specific recommendations.  
IN (Pin 24): Signal Input Pin. This pin has an internally  
generated2VDCbias. ADCblockingcapacitorisrequired.  
See the Applications Information section for specific  
recommendations.  
DNC (Pins 1 to 7, 10 to 15, 19 to 21): Do Not Connect.  
Do not connect these pins; allow them to float. Failure to  
floatthesepinsmayimpairoperationoftheLTC6431-15.  
V
(Pins 9, 22): Positive Power Supply. Either V pin  
T_DIODE (Pin 16): Optional Diode. The T_DIODE can be  
forward-biased to ground with 1mA of current. The meas-  
ured voltage will be an indicator of chip temperature.  
CC  
CC  
should be connected to the 5V supply. Bypass the V pin  
CC  
with 1000pF and 0.1µF capacitors. The 1000pF capacitor  
should be physically close to Pin 22.  
block DiagraM  
V
CC  
9, 22  
BIAS AND TEMPERATURE  
COMPENSATION  
IN  
15dB  
GAIN  
OUT  
24  
18  
16  
T_DIODE  
GND  
8, 17, 23, 25 (EXPOSED PAD)  
643115 BD  
643115f  
9
LTC6431-15  
TesT circuiT a  
C1  
60pF  
C5  
1nF  
C6  
0.1µF  
C7  
1000pF  
PORT  
INPUT  
V
= 5V  
CC  
L1  
560nH  
C3  
1000pF  
R1  
350Ω  
DNC  
DNC  
DNC  
DNC  
DNC  
DNC  
OUT  
GND  
PORT  
OUTPUT  
OPTIONAL  
STABILITY  
NETWORK  
T_DIODE  
DNC  
LTC6431-15  
DNC  
DNC  
643115 F01  
Figure 1. Application, Test Circuit A  
operaTion  
The LTC6431-15 is a highly linear, fixed-gain amplifier that  
is configured to operate single ended. Its core signal path  
consists of a single amplifier stage minimizing stability is-  
sues.TheinputisaDarlingtonpairforhighinputimpedance  
and high current gain. Additional circuit enhancements  
increase the output impedance and minimize the effects  
of internal Miller capacitance.  
cally improved linearity. Shunt and series feedback are  
addedtolowertheinput/outputimpedanceandmatchthem  
simultaneously to the 50Ω source and load. Meanwhile,  
an internal bias controller optimizes the internal operating  
point for peak linearity over environmental changes. This  
circuitarchitectureprovideslownoise,excellentRFpower  
handling capability and wide bandwidth—characteristics  
that are desirable for IF signal chain applications.  
The LTC6431-15 starts with a classic RF gain-block topol-  
ogybutaddsadditionalenhancementstoachievedramati-  
643115f  
10  
LTC6431-15  
applicaTions inForMaTion  
The LTC6431-15 is a highly linear fixed-gain amplifier  
which is designed for ease of use. Implementing an RF  
gain stage is often a multistep project. Typically an RF  
designer must choose a bias point and design a bias  
network. Next the designer needs to address impedance  
matching with input and output matching networks and,  
finally, add stability networks to ensure stable operation  
in and out of band. These tasks are handled internally  
within the LTC6431-15.  
Table 1. Target Frequency Bands and Suggested Inductor Values  
FREQUENCY BAND INDUCTOR VALUE  
MODEL  
(MHz)  
(nH)  
1500nH  
560nH  
100nH  
51nH  
NUMBER  
MANUFACTURER  
20 to 100  
100 to 500  
500 to 1000  
1000 to 2000  
0805LS  
0603LS  
0603LS  
0603LS  
Coilcraft  
www.coilcraft.com  
DC Blocking Capacitor  
The LTC6431-15 has an internal self-biasing network  
which compensates for temperature variation and keeps  
the device biased for optimal linearity. Therefore, input  
and output DC blocking capacitors are required.  
The role of a DC blocking capacitor is straightforward:  
block the path of DC current and allow a low series imped-  
ance path for the AC signal. Lower frequencies require a  
highervalueofDCblockingcapacitance.Generally,1000pF  
to 10000pF will suffice for operation down to 20MHz.  
The LTC6431-15 is relatively insensitive to the choice of  
blocking capacitor.  
Boththeinputandoutputareinternallyimpedancematched  
to50Ωfrom20MHzto1700MHz. Similarly, anRFchokeis  
required at the output to deliver DC current to the device.  
The RF choke acts as a high impedance (isolation) to  
the DC supply which is at RF ground. Thus, the internal  
LTC6431-15 impedance matching is unaffected by the  
biasing network. The open collector output topology can  
delivermuchmorepowerthananamplifierwhosecollector  
is biased through a resistor or active load.  
RF Bypass Capacitor  
RF bypass capacitors act to shunt AC signals to ground  
withalowimpedancepath. Itisbesttoplacethemasclose  
as possible to the DC power supply pins of the device.  
Any extra distance translates into additional series in-  
ductance which lowers the self-resonant frequency and  
useful bandwidth of the bypass capacitor. The suggested  
bypass capacitor network consists of two capacitors:  
a low value 1000pF capacitor to handle high frequencies  
in parallel with a larger 0.1µF capacitor to handle lower  
frequencies. Use ceramic capacitors of an appropriate  
physical size for each capacitance value (e.g., 0402 for  
the 1000pF, 0805 for the 0.1µF) to minimize the equiva-  
lent series resistance (ESR) of the capacitor.  
Choosing the Right RF Choke  
Not all choke inductors are created equal. It is always  
important to select an inductor with low R  
, as this will  
LOSS  
drop the available voltage to the device. Also look for an  
inductor with high self-resonant frequency (SRF) as this  
will limit the upper frequency where the choke is useful.  
Above the SRF, the parasitic capacitance dominates and  
the choke impedance will drop. For these reasons, wire  
wound inductors are preferred, and multilayer ceramic  
chip inductors should be avoided for an RF choke. Since  
the LTC6431-15 is capable of such wideband operation,  
a single choke value will probably not result in optimized  
performance across its full frequency band. Table 1 lists  
target frequency bands and suggested corresponding  
inductor values.  
643115f  
11  
LTC6431-15  
applicaTions inForMaTion  
Low Frequency Stability  
supply should also be applied to both of the V pins on  
CC  
the device. A suggested parallel 60pF, 350Ω network has  
been added to the input to ensure low frequency stability.  
The 60pF capacitance can be increased to improve low  
frequency(<150MHz)performance.However,thedesigner  
needs to be sure that the impedance presented at low  
frequency will not create instability.  
Most RF gain blocks suffer from low frequency instability.  
Toavoidanystabilityissues,theLTC6431-15hasaninternal  
feedback network that lowers the gain and matches the  
inputandoutputimpedancesatfrequenciesabove20MHz.  
This feedback network contains a series capacitor, so if at  
some low frequency the feedback fails, the gain increases  
andgrossimpedancemismatchesoccur—indeedarecipe  
for instability. Luckily, this situation is easily resolved with  
a parallel capacitor and resistor network on the input, as  
seen in Figure 1. This network provides resistive loss at  
low frequencies and is bypassed by the parallel capaci-  
tor within the desired band of operation. However, if the  
LTC6431-15 is preceeded by a low frequency termination,  
suchasachoke,theinputstabilitynetworkisNOTrequired.  
Please note that a number of DNC pins are connected on  
the demo board. These connections are not necessary for  
normal circuit operation.  
Exposed Pad and Ground Plane Considerations  
As with any RF device, minimizing ground inductance is  
critical. Care should be taken with board layouts using  
these exposed pad packages. The maximum allowable  
number of minimum diameter via holes should be placed  
underneath the exposed pad and connect to as many  
ground plane layers as possible. This will provide good  
RF ground and low thermal impedance. Maximizing the  
copper ground plane will also improve heat spreading and  
lower inductance. It is a good idea to cover the via holes  
with a solder mask on the backside of the PCB to prevent  
the solder from wicking away from the critical PCB to the  
exposed pad interface.  
Test Circuit  
The test circuit shown in Figure 2 is designed to allow  
evaluation of the LTC6431-15 with standard single-ended  
50Ω test equipment. The circuit requires a minimum of  
externalcomponents.SincetheLTC6431-15isawideband  
part, the evaluation test circuit is optimized for wideband  
operation. Obviously, for narrowband applications the  
circuit can be further optimized. As mentioned earlier,  
input and output DC blocking capacitors are required as  
this device is internally biased for optimal operation. A  
frequency appropriate choke and decoupling capacitors  
are required to provide DC bias to the RF out node. A 5V  
The LTC6431-15 is a wide bandwidth part, but it is not  
intended for operation down to DC. The lower frequency  
cutoff (20MHz) is limited by on-chip matching elements.  
643115f  
12  
LTC6431-15  
applicaTions inForMaTion  
5
4
3
2
1
REVISION HISTORY  
ECO REV  
DESCRIPTION  
APPROVED  
DATE  
__  
OPTIONAL CIRCUIT  
C10  
2
PRODUCTION  
JOHN C. 08-18-11  
62pF  
C11  
C16  
T1  
SEE BOM  
T2  
1000pF  
1000pF  
J5  
R5  
SEE BOM  
348  
1
6
5
4
4
5
6
3
1
CAL IN  
C19  
1000pF  
C18  
1000pF  
SMA-R  
J18  
D
C
B
A
D
C
B
A
C12  
62pF  
J6  
3
C13  
1000pF  
C17  
GND  
CAL OUT  
1000pF  
R6  
E6  
SMA-R  
348  
GND  
JP2  
HD2X4-100  
OPT  
VCC  
C7  
C8  
1000pF  
VCC  
62pF  
J7  
C1  
1000pF  
R2  
+IN  
348  
L11  
L1  
C22  
C21  
1000pF  
SMA-R  
OPT  
560nH 0.1uF  
1008  
JP1  
HD2X6-100  
OPT  
U1  
C3  
J10  
*
*
1000pF  
1
18  
17  
16  
15  
14  
13  
+OUT  
1
3
5
7
9
2
4
DNC  
DNC  
DNC  
DNC  
DNC  
DNC  
+OUT  
GND  
2
3
4
5
6
SMA-R  
6
T_DIODE  
DNC  
8
10  
GND  
11 12  
DNC  
VCC  
J11  
E3  
+5V  
+5V  
VCC  
C20  
JP3  
HD2X4-100  
OPT  
1000pF  
NOTE: UNLESS OTHERWISE SPECIFIED  
1. ALL RESISTORS ARE IN OHMS, 0402.  
ALL CAPACITORS ARE 0402.  
1630 McCarthy Blvd.  
Milpitas, CA 95035  
Phone: (408)432-1900  
Fax: (408)434-0507  
LTC Confidential-For Customer Use Only  
CUSTOMER NOTICE  
APPROVALS  
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A  
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;  
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO  
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL  
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED  
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT  
PERFORMANCE OR RELIABILITY. CONTACT LINEAR  
www.linear.com  
*
TECHNOLOGY  
PCB DES.  
APP ENG.  
KIM T.  
ASSY  
-C  
U1  
FREQ.  
100-1200 MHz  
T3, T4  
OPT  
R3, R4 R13,R14,R17,R18  
OPT 0 OHM  
J8  
OPT  
J10  
STUFF  
TITLE: SCHEMATIC  
JOHN C.  
LTC6431IUF-15  
IF AMP/ADC DRIVER  
SIZE  
IC NO.  
REV.  
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.  
LTC643XIUF FAMILY  
DEMO CIRCUIT 1774A  
N/A  
DATE:  
1
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND  
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.  
SCALE = NONE  
Monday, June 25, 2012  
SHEET  
1
OF  
1
5
4
3
2
1
Figure 2. DC1774A-C Demo Board Schematic  
643115 F03  
Figure 3. Demo Board  
643115f  
13  
LTC6431-15  
s paraMeTers 5V, 90mA, Z = 50Ω, T = 25°C, De-Embedded to Package Pins  
FREQUENCY  
(MHz)  
S11  
S11  
S21  
S21  
S12  
S12  
S22  
S22  
(Ph)  
GTU  
(Max)  
Stability  
(K)  
(Mag)  
(Ph)  
(Mag)  
(Ph)  
(Mag)  
(Ph)  
(Mag)  
23.5  
83.5  
143  
–14.90  
–21.83  
–22.33  
–22.14  
–21.88  
–21.02  
–20.39  
–19.55  
–18.88  
–18.39  
–18.02  
–17.70  
–17.37  
–17.06  
–16.73  
–16.35  
–16.05  
–15.76  
–15.51  
–15.29  
–15.13  
–14.93  
–14.75  
–14.52  
–14.26  
–13.88  
–13.48  
–13.07  
–12.67  
–12.21  
–11.77  
–11.38  
–10.95  
–10.57  
–10.19  
–9.78  
–93.74  
–128.88  
–142.38  
–153.70  
–162.35  
–168.55  
–172.14  
–175.07  
–177.54  
179.31  
175.72  
171.89  
168.02  
164.02  
160.39  
156.50  
152.86  
149.53  
146.42  
143.29  
141.27  
138.82  
137.08  
135.84  
134.03  
132.68  
130.52  
128.54  
126.19  
123.77  
120.88  
117.51  
114.44  
110.59  
106.94  
103.11  
99.15  
15.94  
15.54  
15.54  
15.54  
15.52  
15.49  
15.42  
15.41  
15.37  
15.35  
15.32  
15.29  
15.26  
15.20  
15.17  
15.12  
15.07  
15.02  
14.98  
14.90  
14.87  
14.80  
14.72  
14.67  
14.55  
14.43  
14.27  
14.06  
13.82  
13.60  
13.31  
13.02  
12.83  
12.51  
12.46  
12.20  
12.20  
12.10  
12.07  
166.13  
169.51  
166.10  
161.63  
156.90  
152.16  
147.41  
142.91  
138.07  
133.30  
128.48  
123.64  
118.80  
113.94  
109.07  
104.20  
99.34  
94.39  
89.31  
84.36  
79.21  
74.05  
69.04  
63.48  
58.17  
52.80  
47.38  
42.05  
37.06  
32.36  
27.42  
23.82  
19.28  
15.92  
12.13  
7.92  
–19.01  
–18.92  
–18.98  
–19.04  
–19.10  
–19.15  
–19.23  
–19.29  
–19.37  
–19.44  
–19.53  
–19.61  
–19.71  
–19.82  
–19.92  
–20.04  
–20.16  
–20.29  
–20.42  
–20.55  
–20.70  
–20.84  
–21.01  
–21.14  
–21.34  
–21.47  
–21.63  
–21.83  
–22.01  
–22.30  
–22.49  
–22.74  
–23.04  
–23.17  
–23.59  
–23.73  
–23.99  
–24.32  
–24.53  
8.83  
–15.39  
–26.58  
–31.71  
–36.22  
–36.75  
–35.10  
–31.62  
–29.46  
–26.62  
–25.06  
–23.84  
–22.46  
–21.37  
–20.17  
–19.13  
–18.11  
–17.31  
–16.51  
–15.82  
–15.22  
–14.56  
–13.94  
–13.37  
–12.79  
–12.27  
–11.71  
–11.24  
–10.62  
–10.07  
–9.51  
–77.56  
–72.76  
–52.44  
–29.74  
–13.45  
–3.73  
16.21  
15.58  
15.57  
15.57  
15.55  
15.52  
15.46  
15.46  
15.44  
15.43  
15.41  
15.39  
15.37  
15.33  
15.31  
15.29  
15.26  
15.24  
15.22  
15.16  
15.16  
15.12  
15.07  
15.06  
14.98  
14.91  
14.80  
14.67  
14.51  
14.39  
14.19  
13.98  
13.89  
13.66  
13.71  
13.53  
13.62  
13.60  
13.66  
0.99  
1.07  
1.07  
1.08  
1.08  
1.08  
1.09  
1.09  
1.09  
1.09  
1.10  
1.10  
1.10  
1.11  
1.11  
1.11  
1.12  
1.12  
1.13  
1.13  
1.14  
1.14  
1.15  
1.16  
1.17  
1.18  
1.19  
1.20  
1.22  
1.24  
1.26  
1.29  
1.31  
1.34  
1.36  
1.38  
1.39  
1.41  
1.41  
–3.42  
–8.97  
203  
–13.69  
–18.05  
–22.46  
–26.61  
–30.83  
–34.91  
–39.04  
–43.16  
–47.19  
–51.39  
–55.31  
–59.53  
–63.43  
–67.53  
–71.52  
–75.48  
–79.56  
–83.45  
–87.50  
–91.46  
–95.38  
–99.38  
–103.25  
–107.46  
–111.37  
–115.95  
–119.76  
–123.59  
–127.66  
–131.54  
–134.66  
–139.47  
–141.66  
–146.81  
–149.09  
–152.92  
263  
323  
383  
0.84  
443  
–1.01  
503  
–2.90  
563  
–7.32  
623  
–14.68  
–23.42  
–30.32  
–37.91  
–44.68  
–50.82  
–57.37  
–63.98  
–70.79  
–78.18  
–85.99  
–93.89  
–101.73  
–109.91  
–117.55  
–125.53  
–134.17  
–142.12  
–150.09  
–158.23  
–165.81  
–172.96  
179.92  
172.64  
166.43  
159.51  
153.38  
146.92  
140.33  
683  
743  
803  
863  
923  
983  
1049  
1109  
1160  
1220  
1280  
1340  
1400  
1460  
1520  
1580  
1640  
1700  
1760  
1820  
1880  
1940  
2000  
2060  
2120  
2180  
2240  
2300  
–9.02  
–8.65  
–8.28  
–7.97  
–7.71  
–7.49  
–9.44  
4.71  
–7.32  
–9.02  
95.22  
–0.60  
–5.36  
–7.17  
–8.67  
91.22  
–7.05  
643115f  
14  
LTC6431-15  
package DescripTion  
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.  
UF Package  
24-Lead Plastic QFN (4mm × 4mm)  
(Reference LTC DWG # 05-08-ꢀ697 Rev B)  
0.70 0.05  
4.50 0.05  
3.ꢀ0 0.05  
2.45 0.05  
(4 SIDES)  
PACKAGE OUTLINE  
0.25 0.05  
0.50 BSC  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
BOTTOM VIEW—EXPOSED PAD  
PIN ꢀ NOTCH  
R = 0.20 TYP OR  
0.35 × 45° CHAMFER  
R = 0.ꢀꢀ5  
TYP  
0.75 0.05  
4.00 0.ꢀ0  
(4 SIDES)  
23 24  
PIN ꢀ  
TOP MARK  
(NOTE 6)  
0.40 0.ꢀ0  
2
2.45 0.ꢀ0  
(4-SIDES)  
(UF24) QFN 0ꢀ05 REV B  
0.200 REF  
0.25 0.05  
0.50 BSC  
0.00 – 0.05  
NOTE:  
ꢀ. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE, IF PRESENT  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION  
ON THE TOP AND BOTTOM OF PACKAGE  
643115f  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-  
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
15  
LTC6431-15  
Typical applicaTion  
0.1µF  
V
= 5V  
CC  
5V  
18  
R
9, 22  
F
R
SOURCE  
CHOKE,  
1000pF  
50Ω  
C = 1000pF  
C =1000pF  
L = 560nH  
LTC6431-15  
24  
R
LOAD  
50Ω  
8, 17, 23, 25  
643115 TA02  
relaTeD parTs  
PART NUMBER  
DESCRIPTION  
COMMENTS  
Fixed Gain IF Amplifiers/ADC Drivers  
LTC6417  
LTC6416  
LTC6410-6  
1.6GHz Low Noise High Linearity Differential Buffer/  
ADC Driver  
OIP3 = 41dBm at 300MHz; Can Drive 50Ω Differential Output;  
High Speed Voltage Clamping Protects Subsequent Circuitry  
2GHz, 16-Bit Differential ADC Buffer  
–72dBc IM2 at 300MHz 2V Composite; I = 42mA;  
P-P S  
eN = 2.8nV/√Hz; A = 0dB; 300MHz  
V
1.4GHz Differential IF Amplifier with Configurable  
Input Impedance  
OIP3 = 36dBm at 70MHz; Flexible Interface to Mixer IF Port  
LTC6400-8/LTC6400-14/ 1.8GHz Low Noise, Low Distortion Differential  
LTC6400-20/LTC6400-26 ADC Drivers  
–71dBc IM3 at 240MHz 2V Composite; I = 90mA;  
V
P-P  
S
A = 8dB/14dB/20dB/26dB  
LTC6420-20  
Dual 1.8GHz Low Noise, Low Distortion Differential  
ADC Drivers  
Dual Version of the LTC6400-20; A = 20dB  
V
LT1993-2/LT1993-4/  
LT1993-10  
800MHz Differential Amplifier/ADC Drivers  
–72dBc IM3 at 70MHz 2V Composite; A = 2V/V, 4V/V, 10V/V  
P-P V  
Variable Gain IF Amplifiers/ADC Drivers  
LTC6412  
800MHz, 31dB Range Analog-Controlled VGA  
OIP3 = 35dBm at 240MHz; Continuously Adjustable Gain Control  
Baseband Differential Amplifiers  
LT6411  
Low Power Differential ADC Driver/Dual Selectable  
Gain Amplifier  
–83dBc IM3 at 70MHz 2V Composite; A = 1, –1 or 2;  
P-P V  
16mA; Excellent for Single-Ended to Differential Conversion  
LTC6406  
3GHz Rail-to-Rail Input Differential Amplifier/  
ADC Driver  
–65dBc IM3 at 50MHz 2V Composite; Rail-to-Rail Inputs;  
P-P  
eN = 1.6nV/√Hz; 18mA  
LTC6404-1/LTC6404-2  
Low Noise Rail-to-Rail Output Differential Amplifier/  
ADC Driver  
16-Bit SNR, SFDR at 10MHz; Rail-to-Rail Outputs;  
eN = 1.5nV/√Hz; LTC6404-1 Is Unity-Gain Stable,  
LTC6404-2 Is Gain-of-Two Stable  
LTC6403-1  
Low Noise Rail-to-Rail Output Differential  
16-Bit SNR, SFDR at 3MHz; Rail-to-Rail Outputs; eN =  
2.8nV/√Hz  
LT1994  
Low Noise, Low Distortion Differential Amplifier/ADC Driver  
16-Bit SNR, SFDR at 1MHz; Rail-to-Rail Outputs  
High Speed ADCs  
LTC2208/LTC2209  
16-Bit, 130Msps/160Msps ADCs  
16-Bit, 80Msps, 1.8V ADC  
78dBFS/77dBFS Noise Floor, 100dB SFDR, 2.25V or 1.5V  
P-P  
P-P  
Input Range  
LTC2259-16  
89mW, 73.1dB SNR, 88dB SFDR, 1V to 2V Input Range  
P-P P-P  
LTC2160/LTC2161/  
LTC2162/LTC2163/  
LTC2164/LTC2165  
16-Bit, 25Msps/40Msps/65Msps/80Msps/105Msps/  
125Msps, 1.8V ADCs  
77dB SNR, 90dB SFDR, 1V to 2V Input Range  
P-P P-P  
LTC2150-14/LTC2151-14/ 14-Bit, 170Msps/210Msps/250Msps/310Msps, 1.8V ADCs Single ADCs, >68dB SNR, >88dB SFDR, 1.32V Input Range  
P-P  
LTC2152-14/LTC2153-14  
LTC2155-14/LTC2156-14/ 14-Bit, 170Msps/210Msps/250Msps/310Msps, 1.8V ADCs Dual ADCs, >68dB SNR, >88dB SFDR, 1.32V Input Range  
P-P  
LTC2157-14/LTC2158-14  
643115f  
LT 0712 • PRINTED IN USA  
16 LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  
LINEAR TECHNOLOGY CORPORATION 2012  

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