IXDD609D2TR [LITTELFUSE]
Buffer/Inverter Based MOSFET Driver, 9A, CMOS, PDSO8, ROHS COMPLIANT, DFN-8;
| 型号： | IXDD609D2TR |
| 厂家： | 
LITTELFUSE |
| 描述： | Buffer/Inverter Based MOSFET Driver, 9A, CMOS, PDSO8, ROHS COMPLIANT, DFN-8 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总14页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IXD_609
9-Ampere Low-Side
Ultrafast MOSFET Drivers
INTEGRATED
C
IRCUITS
D
IVISION
Features
Description
• 9A Peak Source/Sink Drive Current
• Wide Operating Voltage Range: 4.5V to 35V
• -40°C to +125°C Extended Operating Temperature
Range
• Logic Input Withstands Negative Swing of up to 5V
• Matched Rise and Fall Times
The IXDD609/IXDI609/IXDN609 high-speed gate
drivers are especially well suited for driving the latest
IXYS MOSFETs and IGBTs. The IXD_609
high-current output can source and sink 9A of peak
current while producing voltage rise and fall times of
less than 25ns. The input is CMOS compatible, and is
virtually immune to latch up. Proprietary circuitry
eliminates cross-conduction and current
• Low Propagation Delay Time
• Low, 10A Supply Current
• Low Output Impedance
“shoot-through.” Low propagation delay and fast,
matched rise and fall times make the IXD_609 family
ideal for high-frequency and high-power applications.
Applications
• Efficient Power MOSFET and IGBT Switching
• Switch Mode Power Supplies
• Motor Controls
• DC to DC Converters
• Class-D Switching Amplifiers
• Pulse Transformer Driver
The IXDD609 is configured as a non-inverting driver
with an enable, the IXDN609 is configured as a
non-inverting driver, and the IXDI609 is configured as
an inverting driver.
The IXD_609 family is available in a standard 8-pin
DIP (PI); an 8-pin SOIC (SIA); an 8-pin Power SOIC
with an exposed metal back (SI); an 8-pin DFN (D2); a
5-pin TO-263 (YI); and a 5-pin TO-220 (CI).
Ordering Information
Logic
Part Number
Packing
Method
Package Type
8-Pin DFN
8-Pin Power SOIC with Exposed Metal Back
8-Pin Power SOIC with Exposed Metal Back
Quantity
Configuration
IXDD609D2TR
Tape & Reel
Tube
Tape & Reel
Tube
Tape & Reel
Tube
2000
100
2000
100
2000
50
IXDD609SI
IXDD609SITR
IXDD609SIA
IXDD609SIATR
IXDD609PI
IXDD609CI
IXDD609YI
IXDI609SI
IN
OUT
8-Pin SOIC
8-Pin SOIC
8-Pin DIP
5-Pin TO-220
EN
Tube
Tube
Tube
50
50
5-Pin TO-263
8-Pin Power SOIC with Exposed Metal Back
8-Pin Power SOIC with Exposed Metal Back
100
2000
100
2000
50
IXDI609SITR
IXDI609SIA
IXDI609SIATR
IXDI609PI
Tape & Reel
Tube
Tape & Reel
Tube
8-Pin SOIC
8-Pin SOIC
8-Pin DIP
5-Pin TO-220
IN
OUT
IXDI609CI
Tube
50
IXDI609YI
5-Pin TO-263
Tube
50
IXDN609SI
IXDN609SITR
IXDN609SIA
IXDN609SIATR
IXDN609PI
IXDN609CI
IXDN609YI
8-Pin Power SOIC with Exposed Metal Back
8-Pin Power SOIC with Exposed Metal Back
8-Pin SOIC
Tube
Tape & Reel
Tube
Tape & Reel
Tube
100
2000
100
2000
50
IN
OUT
8-Pin SOIC
8-Pin DIP
5-Pin TO-220
5-Pin TO-263
Tube
Tube
50
50
DS-IXD_609-R09
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1
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5 Electrical Characteristics: T = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
A
1.6 Electrical Characteristics: T = - 40°C to +125°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
A
1.7 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. IXD_609 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Characteristics Test Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Block Diagrams & Truth Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 IXDD609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 IXDI609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 IXDN609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2
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R09
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
1 Specifications
1.1 Pin Configurations
1.2 Pin Definitions
IXDD609 D2 / PI / SI / SIA
IXDD609 CI / YI
Pin Name
Description
Logic Input
VCC
OUT
GND
IN
1
2
3
4
5
VCC
IN
VCC
1
2
3
4
8
7
6
5
IN
OUT
OUT
GND
EN
Output Enable - Drive pin low to disable output,
and force output to a high impedance state
EN
GND
EN
Output - Sources or sinks current to turn-on or
turn-off a discrete MOSFET or IGBT
OUT
OUT
IXDI609 PI / SI / SIA
IXDI609 CI / YI
Inverted Output - Sources or sinks current to
turn-on or turn-off a discrete MOSFET or IGBT
VCC
OUT
GND
IN
1
2
3
4
5
VCC
IN
VCC
1
2
3
4
8
7
6
5
OUT
OUT
GND
V
Supply Voltage - Provides power to the device
CC
NC
Ground - Common ground reference for the
device
GND
NC
GND
NC
Not connected
IXDN609 PI / SI / SIA
IXDN609 CI / YI
VCC
OUT
GND
IN
1
2
3
4
5
VCC
IN
VCC
1
2
3
4
8
7
6
5
OUT
OUT
GND
NC
GND
NC
1.3 Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
V
Supply Voltage
Input Voltage
-0.3
-5
40
V
V
CC
V , V
VCC+0.3
IN EN
I
Output Current
Junction Temperature
Storage Temperature
-
±9
A
OUT
T
°C
-55
-65
+150
+150
J
T
°C
STG
Unless stated otherwise, absolute maximum electrical ratings are at 25°C
Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device.
Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not
implied.
1.4 Recommended Operating Conditions
Parameter
Symbol
Range
Units
V
Supply Voltage
4.5 to 35
V
CC
T
Operating Temperature Range
-40 to +125
°C
A
R09
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3
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
1.5 Electrical Characteristics: T = 25°C
A
Test Conditions: 4.5V < V < 35V (unless otherwise noted).
CC
Parameter
Conditions
4.5V < VCC < 18V
4.5V < VCC < 18V
0V < V < V
Symbol
Minimum
Typical
Maximum
Units
Input Voltage, High
Input Voltage, Low
V
3.0
-
-
0.8
±10
-
IH
V
V
-
-
-
IL
Input Current
I
IN
CC
-
A
IN
EN Input Voltage, High
EN Input Voltage, Low
Output Voltage, High
Output Voltage, Low
Output Resistance, High State
Output Resistance, Low State
IXDD609 only
V
2/3V
-
-
ENH
CC
V
IXDD609 only
V
1/3V
-
ENL
CC
-
-
V
V
-0.025
CC
-
-
0.025
1
OH
V
A
V
-
-
-
-
OL
V
=18V, I =-100mA
OUT
R
CC
0.6
0.4
OH
V
=18V, I =100mA
OUT
R
CC
0.8
OL
Limited by package power
dissipation
Output Current, Continuous
I
-
-
±2
DC
V
V
V
V
=18V, C
=18V, C
=18V, C
=18V, C
=10nF
=10nF
=10nF
=10nF
Rise Time
t
CC
CC
CC
CC
LOAD
LOAD
LOAD
LOAD
-
-
-
-
22
15
40
42
35
25
60
60
r
Fall Time
t
f
On-Time Propagation Delay
Off-Time Propagation Delay
t
ondly
t
ns
offdly
Enable to Output-High Delay Time
(IXDD609 Only)
Disable to High Impedance State Delay Time
(IXDD609 Only)
V
=18V
CC
t
-
-
25
35
60
60
ENOH
V
=18V
-
CC
t
DOLD
Enable Pull-Up Resistor
R
-
-
-
-
200
1
<1
<1
-
2
10
10
k
mA
EN
V
=18V, V =3.5V
IN
CC
V
=18V, V =0V
IN
Power Supply Current
I
CC
CC
A
V
=18V, V =V
CC
IN CC
1.6 Electrical Characteristics: T = - 40°C to +125°C
A
Test Conditions: 4.5V < V < 35V unless otherwise noted.
CC
Parameter
Conditions
4.5V < VCC < 18V
4.5V < VCC < 18V
0V < V < V
Symbol
Minimum
Maximum
Units
Input Voltage, High
Input Voltage, Low
V
3.3
-
0.65
±10
-
IH
V
V
-
-
IL
Input Current
I
IN
CC
A
IN
Output Voltage, High
Output Voltage, Low
Output Resistance, High State
Output Resistance, Low State
-
V
V
-0.025
CC
OH
V
-
V
-
-
-
0.025
2
OL
V
=18V, I =-100mA
OUT
R
CC
OH
V
=18V, I =100mA
OUT
R
CC
1.5
OL
Limited by package power
dissipation
Output Current, Continuous
I
-
±1
A
DC
V
V
V
V
=18V, C
=18V, C
=18V, C
=18V, C
=10nF
=10nF
=10nF
=10nF
Rise Time
t
CC
CC
CC
CC
LOAD
LOAD
LOAD
LOAD
-
-
-
-
-
40
30
75
75
75
r
Fall Time
t
f
On-Time Propagation Delay
Off-Time Propagation Delay
Enable to Output-High Delay Time
Disable to High Impedance State Delay Time
t
ondly
ns
t
offdly
IXDD609 only, V =18V
CC
t
ENOH
IXDD609 only, V =18V
CC
t
-
-
-
-
75
2.5
150
150
DOLD
V
=18V, V =3.5V
IN
mA
CC
V
=18V, V =0V
IN
Power Supply Current
I
CC
CC
A
V
=18V, V =V
CC
IN CC
4
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R09
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
1.7 Thermal Characteristics
Package
Parameter
Symbol
Rating
Units
D2 (8-Pin DFN)
35
36
125
85
120
46
3
CI (5-Pin TO-220)
PI (8-Pin DIP)
Thermal Impedance, Junction-to-Ambient
°C/W
°C/W
JA
SI (8-Pin Power SOIC)
SIA (8-Pin SOIC)
YI (5-Pin TO-263)
CI (5-Pin TO-220)
SI (8-Pin Power SOIC)
YI (5-Pin TO-263)
Thermal Impedance, Junction-to-Case
10
2
JC
2 IXD_609 Performance
2.1 Timing Diagrams
VIH
VIH
IN
IN
VIL
VIL
t
t
t
t
ondly
offdly
offdly
ondly
90%
90%
10%
OUT
10%
OUT
t
t
t
t
r
r
f
f
2.2 Characteristics Test Diagram
+
VCC
IN
OUT
VCC
0.1μF 10μF
VCC
-
Tektronix
Current Probe
EN
GND
VIN
CLOAD
6302
R09
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5
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
3 Block Diagrams & Truth Tables
3.1 IXDD609
3.3 IXDN609
VCC
VCC
IN
OUT
IN
OUT
GND
EN
GND
IN
OUT
IN
EN
OUT
0
1
0
1
x
1 or open
1 or open
0
0
1
0
1
Z
3.2 IXDI609
VCC
OUT
IN
GND
IN
OUT
0
1
1
0
6
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R09
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
4 Typical Performance Characteristics
Fall Time vs. Supply Voltage
Rise Time vs. Supply Voltage
Rise and Fall Times vs.Temperature
(Input=0-5V, f=10kHz,TA=25ºC)
(Input=0-5V, f=10kHz,TA=25ºC)
(VIN=0-5V, VCC=18V, f=10kHz, CL=2.5nF)
70
60
50
40
30
20
10
0
60
50
40
30
20
10
0
11
10
9
CL=10nF
CL=5.4nF
CL=1.5nF
t
r
CL=10nF
CL=5.4nF
CL=1.5nF
8
t
f
7
6
5
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
-40 -20
0
20 40 60 80 100 120 140
Supply Voltage (V)
Supply Voltage (V)
Temperature (ºC)
Rise Time vs. Load Capacitance
Fall Time vs. Load Capacitance
70
60
60
50
40
30
20
10
0
VCC=4.5V
VCC=8V
VCC=4.5V
VCC=8V
V
CC=12V
VCC=18V
CC=25V
VCC=12V
VCC=18V
50
40
30
20
10
0
V
V
CC=25V
VCC=30V
CC=35V
VCC=30V
VCC=35V
V
0
2000
4000
6000
8000
10000
0
2000
4000
6000
8000
10000
Load Capacitance (pF)
Load Capacitance (pF)
Propagation Delay
Propagation Delay vs. Supply Voltage
Propagation Delay vs. Input Voltage
vs.Temperature
(VIN=0-5V, f=1kHz, CL=5.4nF)
(VIN=5V, VCC=12V, f=1kHz, CL=5.4nF)
(VCC=18V, f=1kHz, CL=5.4nF)
200
150
100
50
180
160
140
120
100
80
55
50
45
40
35
30
t
ondly
t
offdly
t
offdly
t
offdly
t
60
ondly
t
ondly
40
20
0
0
2
3
4
5
6
7
8
9
10 11 12
0
5
10
15
20
25
30
35
-40 -20
0
20 40 60 80 100 120 140
Input Voltage (V)
Temperature (ºC)
Supply Voltage (V)
Input Threshold Voltage
vs.Temperature
(VCC=18V, CL=2.5nF)
Input Threshold vs. Supply Voltage
Enable Threshold vs. Supply Voltage
3.5
3.0
2.5
2.0
1.5
1.0
25
20
15
10
5
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
Min VIH
Min VENH
Min VIH
Max VIL
Max VENL
Max VIL
0
-40 -20
0
20 40 60 80 100 120 140
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Temperature (ºC)
Supply Voltage (V)
Supply Voltage (V)
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7
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
Supply Current vs. Load Capacitance
(VCC=18V)
Supply Current vs. Load Capacitance
(VCC=12V)
Supply Current vs. Load Capacitance
(VCC=8V)
500
400
300
200
100
0
300
250
200
150
100
50
200
150
100
50
f=2MHz
f=1MHz
f=2MHz
f=1MHz
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
f=1kHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
f=1kHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
f=1kHz
0
0
1000
1000
5000
Load Capacitance (pF)
10000
1000
5000
Load Capacitance (pF)
10000
5000
Load Capacitance (pF)
10000
Supply Current vs. Frequency
(VCC=18V)
Supply Current vs. Frequency
(VCC=12V)
Supply Current vs. Frequency
(VCC=8V)
1000
1000
1000
100
10
CL=10nF
CL=5.4nF
100 CL=1.5nF
CL=10nF
CL=5.4nF
100 CL=1.5nF
CL=10nF
CL=5.4nF
CL=1.5nF
10
1
10
1
1
0.1
0.01
0.1
1
0.1
1
10
100
Frequency (kHz)
1000
10000
1
10
100
Frequency (kHz)
1000
10000
10
100
Frequency (kHz)
1000
10000
Dynamic Supply Current
vs.Temperature
(VIN=5V, VCC=18V, f=1kHz, CL=1.5nF)
Quiescent Supply Current
vs.Temperature
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.65
0.60
0.55
0.50
0.45
0.40
VIN=3.5V
VIN=5V
VIN=10V
VIN=0V & 18V
-40 -20
0
20 40 60 80 100 120 140
0.35
Temperature (ºC)
-40 -20
0
20 40 60 80 100 120 140
Temperature (ºC)
Output Source Current
vs. Supply Voltage
(f=422Hz, CL=66nF)
Output Sink Current
vs. Supply Voltage
(f=422Hz, CL=66nF)
-30
30
25
20
15
10
5
-25
-20
-15
-10
-5
0
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
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R09
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
Output Source Current
Output Sink Current
vs.Temperature
vs.Temperature
(VCC=18V, f=422Hz, CL=66nF)
(VCC=18V, f=422Hz, CL=66nF)
-12.0
14.0
13.5
13.0
12.5
12.0
11.5
11.0
10.5
10.0
-11.5
-11.0
-10.5
-10.0
-9.5
-9.0
-40 -20
0
20 40 60 80 100 120 140
-40 -20
0
20 40 60 80 100 120 140
Temperature (ºC)
Temperature (ºC)
High State Output Resistance
vs. Supply Voltage
Low State Output Resistance
vs. Supply Voltage
(IOUT= -10mA)
(IOUT= +10mA )
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
1.5
1.0
0.5
0.0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
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9
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
5 Manufacturing Information
5.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest
version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation.
We test all of our products to the maximum conditions set forth in the standard, and guarantee proper
operation of our devices when handled according to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
Moisture Sensitivity Level (MSL) Classification
IXD_609 All Versions except IXD_609YI
IXD_609YI
MSL 1
MSL 3
5.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
5.3 Soldering Profile
Provided in the table below is the Classification Temperature (T ) of this product and the maximum dwell time the
C
body temperature of this device may be (T - 5)ºC or greater. The classification temperature sets the Maximum Body
C
Temperature allowed for this device during lead-free reflow processes. For through-hole devices, and any other
processes, the guidelines of J-STD-020 must be observed.
Classification Temperature (TC)
Dwell Time (tp)
Device
Maximum Cycles
IXD_609CI
IXD_609YI
245°C for 30 seconds
245°C for 30 seconds
250°C for 30 seconds
260°C for 30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
1
3
3
3
IXD_609PI
IXD_609SI / IXD_609SIA / IXD_609D2
5.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. Board washing to reduce or
remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to
prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and
providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing
process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature
and duration necessary to remove the moisture trapped within the package is the responsibility of the user
(assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be
used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based.
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R09
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
5.5 Mechanical Dimensions
5.5.1 SIA (8-Pin SOIC)
0.31 / 0.51
(0.012 / 0.020)
8x
PCB Land Pattern
TOP VIEW
1.55
(0.061)
5
5.80 / 6.20
(0.228 / 0.244)
3.75
(0.148)
3.80 / 4.00
(0.150 / 0.157)
0.10 / 0.25
(0.004 / 0.010)
A
0.25
(0.010)
PIN #1
1.27
0.05
6x
0.60
(0.024)
GAUGE PLANE
SEATING PLANE
1.25 MIN
(0.049 MIN)
A
0.40 / 1.27
(0.016 / 0.050)
4
8°- 0°
1.75 MAX
(0.069 MAX)
4.80 / 5.00
(0.189 / 0.197)
Dimensions
MIN / MAX
0.10
(0.004)
0.10 / 0.25
(0.004 / 0.010)
Notes:
1. Controlling dimension: millimeters.
2. All dimensions are in mm (inches).
3. This package conforms to JEDEC Standard MS-012, variation AA, Rev. F.
4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end.
5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side.
6. Lead thickness includes plating.
5.5.2 SI (8-Pin Power SOIC with Exposed Metal Back)
PCB Land Pattern
0.31 / 0.51
(0.012 / 0.020)
8x
0.60
(0.024)
BOTTOM VIEW
1.55
(0.061)
TOP VIEW
5
5.80 / 6.20
(0.228 / 0.244)
3.85
(0.152)
2.05 / 2.41
(0.081 / 0.095)
2.23
(0.088)
3.80 / 4.00
(0.150 / 0.157)
PIN #1
1.27
0.05
6x
2.81 / 3.30
(0.111 / 0.130)
3.055
(0.120)
1.25 MIN
(0.049 MIN)
4
1.70 MAX
(0.067 MAX)
0.10 / 0.25
(0.004 / 0.010)
4.80 / 5.00
(0.189 / 0.197)
A
0.25
(0.010)
Dimensions
MIN / MAX
GAUGE PLANE
SEATING PLANE
A
0.10
(0.004)
0.40 / 1.27
(0.016 / 0.050)
0 / 0.15
(0 / 0.006)
8°- 0°
Notes:
1. Controlling dimension: millimeters.
2. All dimensions are in mm (inches).
3. This package conforms to JEDEC Standard MS-012, variation BA, Rev. F.
4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end.
5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side.
6. The exposed metal pad on the back of the package should be connected to GND. It is not suitable for carrying current.
7. Lead thickness includes plating.
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11
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
5.5.3 Tape & Reel Information for SI and SIA Packages
330.2 DIA.
(13.00 DIA.)
Top Cover
W=12.00
(0.472)
Tape Thickness
B0=5.30
(0.209)
0.102 MAX.
(0.004 MAX.)
A0=6.50
(0.256)
P1=8.00
(0.315)
K0= 2.10
(0.083)
Dimensions
mm
(inches)
User Direction of Feed
Embossed Carrier
Embossment
NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2
5.5.4 YI (5-Pin TO-263)
E
(Note 2)
MM
INCH
MIN
SYMBOL
MIN
MAX
4.826
0.254
0.991
0.889
0.737
0.584
1.651
9.652
7.700
1.562
MAX
0.190
0.010
0.039
0.035
0.029
0.023
0.065
0.380
0.303
0.062
0.420
0.315
0.270
E1
E3
Recommended PCB Pattern
A
A1
b
b1
c
c1
c2
D
D1
D2
E
E1
E3
e
H
L
4.064
0.000
0.508
0.508
0.381
0.381
1.143
8.382
6.858
1.358
0.160
0.000
0.020
0.020
0.015
0.015
0.045
0.330
0.270
0.053
10.75
(0.423)
L1
D2
D1
D
(Note 2)
2.20
(0.087)
8.40
(0.331)
H
*
9.652 10.668 0.380
8.000
6.869
1.702 BSC
14.605 15.875 0.575
8.05
(0.317)
Pin 1
Indicator
6.223
5.092
0.245
0.200
0.067 BSC
10.50
(0.413)
C
C
3.80
(0.150)
0.625
0.110
0.066
e ~4x
b ~5x
1.778
1.000
2.794
1.676
0.070
0.039
L1
L3
R
R1
θ
*
Circular feature will be
present on devices
with the
1.05
(0.041)
1.702
(0.067)
0.254 BSC
0.460 TYP
0.506 TYP
0.010 BSC
0.018 TYP
0.02 TYP
-
A
Optional Tip Lead Form.
Dimensions
mm
(inches)
c2
-
8º
8º
SECTION: C-C
PLATING
(Note 3)
b1
JEDEC TO-263
Optional Tip Lead Form
c
BASE METAL c1
A1
A1
b
NOTES:
1. Reference JEDEC TO-263 Type “BA”.
L
L
R1
L3
R1
R
R
2. Dimension does not include mold flash; mold flash
shall not exceed 0.127mm (0.005 inch) per side.
3. Minimum plating: 1000 microinches.
L3
θ
θ
4. Controlling dimension: millimeters.
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R09
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
5.5.5 PI (8-Pin DIP)
9.652 ± 0.381
(0.380 ± 0.015)
PCB Hole Pattern
7.620 ± 0.254
(0.300 ± 0.010)
2.540 ± 0.127
(0.100 ± 0.005)
8-0.800 DIA.
2.540 ± 0.127
(8-0.031 DIA.)
(0.100 ± 0.005)
9.144 ± 0.508
(0.360 ± 0.020)
6.350 ± 0.127
(0.250 ± 0.005)
3.302 ± 0.051
(0.130 ± 0.002)
Pin 1
0.457 ± 0.076
(0.018 ± 0.003)
7.620 ± 0.127
(0.300 ± 0.005)
7.239 TYP.
(0.285)
7.620 ± 0.127
(0.300 ± 0.005)
4.064 TYP
(0.160)
0.254 ± 0.0127
(0.010 ± 0.0005)
Dimensions
0.813 ± 0.102
mm
(0.032 ± 0.004)
(inches)
5.5.6 CI (5-Pin TO-220)
A
B
3.810 - 3.860
(0.150 - 0.152)
9.652 - 10.668
(0.380 - 0.420)
3.556 - 4.826
(0.140 - 0.190)
9.652 - 10.668
(0.380 - 0.420)
0.127 BSC
(0.005 BSC)
0.355 M B A M
0.508 - 1.397
(0.020 - 0.055)
2.540 - 3.048
(0.100 - 0.120)
5.842 - 6.858
(0.230 - 0.270)
5.842 - 6.858
(0.230 - 0.270)
7.550 - 8.100
(0.297 - 0.319)
4.826 - 5.334
(0.190 - 0.210)
14.224 - 16.510
(0.560 - 0.650)
12.192 - 12.878
(0.480 - 0.507)
6.300 - 6.700
(0.248 - 0.264)
8.382 - 9.017
(0.330 - 0.355)
6.858 - 8.890
(0.270 - 0.350)
THERMAL PAD
2.032 - 2.921
(0.080 - 0.115)
C
C
12.700 - 14.732
(0.500 - 0.580)
0.356 - 0.610
(0.014 - 0.024)
0.381 - 1.016 5x
(0.015 - 0.040 5x)
SECTION C-C
1.702 4x BSC
(0.067 4x BSC)
BASE METAL
0.381 - 1.016
(0.015 - 0.040)
PLATING
0.381 M B A M
Dimensions
mm
(inches)
0.356 - 0.559
(0.014 - 0.022)
0.356 - 0.610
(0.014 - 0.024)
LEAD TIP
0.381 - 0.965
(0.015 - 0.038)
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13
IXD_609
INTEGRATED
C
IRCUITS
D
IVISION
5.5.7 D2 (8-Pin DFN)
5.00 BSC
(0.197 BSC)
0.35 x 45º
(0.014 x 45º)
0.80 / 1.00
(0.031 / 0.039)
0.20 REF
(0.008 REF)
0.95
(0.037)
4.50
(0.177)
Pin 1
4.00 BSC
(0.157 BSC)
3.10
(0.122)
0.45
(0.018)
0.10
(0.004)
2.60
(0.102)
1.20
(0.047)
0.74 / 0.83
(0.029 / 0.033)
Recommended PCB Land Pattern
3.03 / 3.10
(0.119 / 0.122)
Dimensions
mm MIN / mm MAX
(inches MIN / inches MAX)
0.30 / 0.45
(0.012 / 0.018)
0.95 BSC
(0.037 BSC)
Pin 1
Pin 8
2.53 / 2.60
(0.100 / 0.102)
NOTE:
0.35 / 0.45 x 45º
(0.014 / 0.018 x 45º)
The exposed metal pad on the back of the D2 package should
be connected to GND. Pad is not suitable for carrying current.
5.5.8 Tape & Reel Information for D2 Package
∅1.55 0.05
330.2 DIA.
(13.00 DIA.)
4.00 0.10 See Note #2
1.75 0.10
R0.75 TYP
2.00 0.05
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
(0.05)
5º MAX
5.50 0.05
(0.05)
B0=5.40 0.10
12.00 0.30
Embossed Carrier
K0=1.90 0.10
∅1.50 (MIN)
P1=8.00 0.10
NOTES:
5º MAX
1. A0 & B0 measured at 0.3mm above base of pocket.
2. 10 pitches cumulative tol. 0.2mm
3. ( ) Reference dimensions only.
A0=4.25 0.10
Embossment
4. Unless otherwise specified, all dimensions in millimeters.
0.30 0.05
For additional information please visit our website at: www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-IXD_609-R09
©Copyright 2017, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
10/25/2017
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R09
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