CS60-14IO1 [LITTELFUSE]

Silicon Controlled Rectifier, 75A I(T)RMS, 48000mA I(T), 1400V V(DRM), 1400V V(RRM), 1 Element, PLUS247, 3 PIN;


型号：	CS60-14IO1
厂家：	LITTELFUSE
描述：	Silicon Controlled Rectifier, 75A I(T)RMS, 48000mA I(T), 1400V V(DRM), 1400V V(RRM), 1 Element, PLUS247, 3 PIN PC 栅栅极
文件：	总5页 (文件大小：249K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CS60-14io1

V_RRM

I_TAV

V_T

1400V

Thyristor

60A

1.14V

Single Thyristor

Part number

CS60-14io1

Backside: anode

PLUS247

Features / Advantages:

Applications:

Package:

● Thyristor for line frequency

● Planar passivated chip

● Long-term stability

● Line rectifying 50/60 Hz

● Softstart AC motor control

● DC Motor control

● Industry standard outline

● RoHS compliant

● Epoxy meets UL 94V-0

● Power converter

● AC power control

● Lighting and temperature control

Disclaimer Notice

Information furnished is believed to be accurate and reliable. However, users should independently

evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for,

www.littelfuse.com/disclaimer-electronics.

and may not be used in, all applications. Read complete Disclaimer Notice at

IXYS reserves the right to change limits, conditions and dimensions.

Data according to IEC 60747and per semiconductor unless otherwise specified

20191202c

CS60-14io1

Ratings

Thyristor

Symbol

V_RSM/DSM

Definition

Conditions

min. typ. max. Unit

T_VJ= 25°C

T_VJ= 140°C

T_VJ= 25°C

1500

1400

200

max. non-repetitive reverse/forward blocking voltage

max. repetitive reverse/forward blocking voltage

V_RRM/DRM

I_R/D

V_R/D=1400 V

I_T= 60 A

I_T= 120 A

I_T= 60 A

I_T= 120 A

T_C= 110°C

180° sine

µA

reverse current, drain current

10 mA

forward voltage drop

1.18

V_T

1.44

1.14

1.46

T_VJ

°C

125

average forward current

RMS forward current

T_VJ= 140°C

I_TAV

I_T(RMS)

V_T0

0.82

threshold voltage

for power loss calculation only

slope resistance

5.3 mΩ

0.32 K/W

K/W

r_T

R_thJC

R_thCH

P_tot

thermal resistance junction to case

thermal resistance case to heatsink

0.15

T_C= 25°C

T_VJ= 45°C

V_R= 0 V

360

1.40

1.51

1.19

1.29

total power dissipation

max. forward surge current

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

V_R= 400V f = 1 MHz

t_P= 30 µs

I_TSM

T_VJ= 140°C

V_R= 0 V

value for fusing

T_VJ= 45°C

V_R= 0 V

I²t

9.80 kA²s

9.49 kA²s

7.08 kA²s

6.87 kA²s

T_VJ= 140°C

V_R= 0 V

junction capacitance

T_VJ= 25°C

T_C= 140°C

C_J

P_GM

max. gate power dissipation

t_P= 300 µs

0.5

P_GAV

average gate power dissipation

critical rate of rise of current

T_VJ= 140°C; f = 50 Hz

repetitive, I_T= 180 A

150 A/µs

(di/dt)_cr

0.3

t_P= 200 µs;di_G/dt =

A/µs;

I_G= 0.3A; V = ⅔ V_DRM

V = ⅔ V_DRM

non-repet., I_T= 60 A

T_VJ= 140°C

500 A/µs

critical rate of rise of voltage

gate trigger voltage

1000 V/µs

(dv/dt)_cr

V_GT

R_GK= ∞; method 1 (linear voltage rise)

V_D= 6 V

T_VJ= 25°C

T_VJ= -40°C

T_VJ= 25°C

T_VJ= -40°C

T_VJ= 140°C

1.5

1.6

gate trigger current

V_D= 6 V

100 mA

200 mA

I_GT

gate non-trigger voltage

gate non-trigger current

latching current

V_D= ⅔ V_DRM

0.2

V_GD

I_GD

I_L

10 mA

t_p= 10 µs

T_VJ= 25°C

450 mA

I_G= 0.45A; di_G/dt = 0.45 A/µs

V_D= 6 V R_GK= ∞

holding current

T_VJ= 25°C

200 mA

I_H

gate controlled delay time

V_D= ½ V

µs

t_gd

DRM

I_G= 0.45A; di_G/dt = 0.45 A/µs

turn-off time

V_R= 100 V; I_T

60A; V = ⅔ V_DRMT_VJ=125 °C

µs

150

µs

t_q

di/dt = 10 A/µs dv/dt = 20 V/µs

t_p= 200

IXYS reserves the right to change limits, conditions and dimensions.

Data according to IEC 60747and per semiconductor unless otherwise specified

20191202c

CS60-14io1

Ratings

Package PLUS247

Symbol

I_RMS

Definition

Conditions

min. typ. max. Unit

per terminal

140

125

140

°C

RMS current

-40

T_VJ

virtual junction temperature

T_op

operation temperature

storage temperature

T_stg

Weight

5.5

120

F_C

mounting force with clip

terminal to terminal

terminal to backside

d_Spp/App

d_Spb/Apb

creepage distance on surface | striking distance through air

Product Marking

Logo

IXYS

Part Number

Date Code

Lot#

XXXXXXXXX

yywwZ

1234

Location

Ordering

Ordering Number

Marking on Product

Delivery Mode

Quantity Code No.

30 507901

Standard

CS60-14io1

Tube

Similar Part

CS60-12io1

Package

Voltage class

1200

PLUS247 (3)

CS60-16io1

PLUS247 (3)

1600

T_VJ=140°C

Equivalent Circuits for Simulation

* on die level

Thyristor

V₀

R₀

threshold voltage

slope resistance *

0.82

V_{0 max}

R_{0 max}

mΩ

IXYS reserves the right to change limits, conditions and dimensions.

Data according to IEC 60747and per semiconductor unless otherwise specified

20191202c

CS60-14io1

Outlines PLUS247

View A - A

Sym.

Inches

Millimeter

min.

max.

0.190 0.205

0.090 0.100

0.075 0.085

0.045 0.055

0.075 0.084

0.115 0.123

0.024 0.031

0.819 0.840

min.

4.83

2.29

1.91

1.14

1.91

2.92

0.61

max.

5.21

2.54

2.16

1.40

2.13

3.12

0.80

20.80 21.34

0.515

13.07

0.51

0.010 0.053

0.620 0.635

1.35

15.75 16.13

13.45

0.530

0.215 BSC

0.780 0.800

0.150 0.170

0.220 0.244

0.170 0.190

5.45 BSC

19.81 20.32

3.81

5.59

4.32

6.20

4.83

IXYS reserves the right to change limits, conditions and dimensions.

Data according to IEC 60747and per semiconductor unless otherwise specified

20191202c

CS60-14io1

Thyristor

120

1200

1000

V_R= 0 V

50 Hz, 80% V_RRM

10000

100

T_VJ= 45°C

I_TSM

I²t

[A²s]

I_T

800

600

400

T_VJ= 125°C

[A]

T_VJ= 125°C

125°C

150°C

T_VJ= 25°C

1,2

0,4

1000

0,8

1,6

0,01

0,1

4 5 6 7 8 910

t [s]

V_T[V]

Fig. 1 Forward characteristics

t [ms]

Fig. 3 I²t versus time (1-10 ms)

Fig. 2 Surge overload current

1000

100

1: I

, T = 125°C

25°C

GD VJ

dc =

0.5

0.4

2: I , T

GT VJ

3: I , T = -40°C

GT VJ

0.33

0.17

0.08

typ.

Limit

I_T(AV)M

t_gd

V_G

[V]

[µs]

[A]

= 125°C

4: P

5: P

6: P

= 0.5 W

GAV

5 W

= 10 W

0,1

100

1000 10000

100

I_G[mA]

1000

25 50 75 100 125 150

I_G[mA]

T_C[°C]

Fig. 5 Gate controlled delay time

Fig. 4 Gate trigger characteristics

Fig. 6 Max. forward current

at case temperature

100

0,4

dc =

0.5

0.4

0.33

0.17

0.08

R_thHA

0,3

0.6

0.8

1.0

2.0

4.0

8.0

Z_thJC

P_(AV)

[W]

0,2

R_thi[K/W] t_i[s]

0.041 0.008

0.043 0.0001

0.039 0.04

0.076 0.57

0.121 0.37

[K/W]

0,1

0,0

10⁰

100

150

10¹

10²

10³

10⁴

I_T(AV)[A]

T_amb[°C]

t [ms]

Fig. 7a Power dissipation versus direct output current

Fig. 7b and ambient temperature

Fig. 8 Transient thermal impedance junction to case

IXYS reserves the right to change limits, conditions and dimensions.

Data according to IEC 60747and per semiconductor unless otherwise specified

20191202c

CS60-14IO1 [LITTELFUSE]

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