IRFU4105PBF [KERSEMI]
Ultra Low On-Resistance; 超低导通电阻
| 型号： | IRFU4105PBF |
| 厂家： | 
Kersemi Electronic Co., Ltd. |
| 描述： | Ultra Low On-Resistance |
| 文件： | 总10页 (文件大小：3846K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95550A
IRFR4105PbF
IRFU4105PbF
HEXFET® Power MOSFET
l Ultra Low On-Resistance
l Surface Mount (IRFR4105)
l Straight Lead (IRFU4105)
l Fast Switching
D
VDSS = 55V
l Fully Avalanche Rated
l Lead-Free
RDS(on) = 0.045Ω
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
ID = 27Aꢀ
S
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D-PAK
TO-252AA
I-PAK
TO-251AA
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
27ꢀ
19
A
100
68
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
0.45
± 20
65
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
16
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
6.8
5.0
mJ
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
2.2
Units
°C/W
1
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
50
110
www.kersemi.com
1/7/05
IRFR/U4105PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55 ––– –––
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.045
VGS = 10V, ID = 16A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 16A
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 20V
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
2.0
6.5
––– 4.0
––– –––
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 34
––– ––– 6.8
––– ––– 14
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = 16A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
7.0 –––
49 –––
31 –––
40 –––
VDD = 28V
ID = 16A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 18Ω
RD = 1.8Ω, See Fig. 10
Between lead,
6mm (0.25in.)
D
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
4.5
–––
nH
G
from package
––– 7.5 –––
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
––– 700 –––
––– 240 –––
––– 100 –––
Output Capacitance
pF
VDS = 25V
Reverse Transfer Capacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
27ꢀ
––– –––
––– –––
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
100
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.6
––– 57 86
––– 130 200
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
TJ = 25°C, IS = 16A, VGS = 0V
ns
TJ = 25°C, IF = 16A
Qrr
ton
nC di/dt = 100A/µs
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 410µH
RG = 25Ω, IAS = 16A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%
ꢀ Calculated continuous current based on maximum allowable junction
temperature; Package limitation current = 20A
This is applied for I-PAK, Ls of D-PAK is measured between lead and
,
center of die contact
ISD ≤ 16A, di/dt ≤ 420A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
Uses IRFZ34N data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
2
www.kersemi.com
IRFR/U4105PbF
1000
100
10
1000
100
10
VGS
VGS
15V
TOP
15V
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
1
1
20µs PULSE WIDTH
20µs PULSE WIDTH
T
C
= 175°C
T
C
= 25°C
0.1
0.1
A
0.1
A
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
2.4
2.0
1.6
1.2
0.8
0.4
0.0
100
I
= 26A
D
TJ = 25°C
T = 175°C
J
10
VDS = 25V
20µs PULSE WIDTH
10A
ction
V
= 10V
GS
1
A
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
4
5
6
7
8
9
T , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
www.kersemi.com
3
IRFR/U4105PbF
20
16
12
8
1200
I = 16A
D
V
C
C
C
= 0V,
f = 1MHz
GS
iss
= C + C
,
C
SHORTED
V
V
= 44V
= 28V
gs
gd
ds
DS
DS
= C
gd
rss
oss
1000
800
600
400
200
0
= C + C
C
ds
gd
iss
C
oss
C
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
A
0
A
1
10
100
0
10
20
30
40
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10µs
T = 175°C
J
T = 25°C
J
100µs
1ms
T
T
= 25°C
= 175°C
C
J
V
GS
= 0V
Single Pulse
A
1
1
A
100
0.4
0.8
1.2
1.6
2.0
1
10
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
SD
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
www.kersemi.com
IRFR/U4105PbF
30
25
20
15
10
5
RD
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+VDD
-
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
2
DM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.kersemi.com
5
IRFR/U4105PbF
140
120
100
80
I
D
TOP
6.5A
11A
BOTTOM 16A
15V
DRIVER
+
L
V
DS
D.U.T
R
G
60
V
DD
-
I
A
AS
10V
40
Ω
0.01
t
p
20
Fig 12a. Unclamped Inductive Test Circuit
V
= 25V
50
DD
0
A
175
25
75
100
125
150
V
Starting T , Junction Temperature (°C)
(BR)DSS
J
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
5.0 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
www.kersemi.com
IRFR/U4105PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
www.kersemi.com
7
IRFR/U4105PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S EMB LY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WE E K 16
IRFU120
916A
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
12
34
LINE A
Note: "P" in assembly line position
AS S E MB L Y
LOT CODE
indi cates "L ead- F ree"
OR
PART NUMBER
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12 34
YEAR 9 = 1999
AS S E MB L Y
LOT CODE
WE E K 16
A = AS S E MB L Y S I T E CODE
8
www.kersemi.com
IRFR/U4105PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
WIT H AS S EMBLY
DAT E CODE
YEAR 9 = 1999
WEEK 19
RECTIFIER
LOGO
IRFU120
919A
78
LOT CODE 5678
AS SEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
56
LINE A
ASSEMBLY
LOT CODE
Note: "P" in assembly line
position indicates "Lead-Free"
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
P = DE S I GNAT E S L E AD- F R E E
PRODUCT (OPTIONAL)
YEAR 9 = 1999
AS S E MB LY
LOT CODE
WEE K 19
A = AS S E MB L Y S IT E CODE
www.kersemi.com
9
IRFR/U4105PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
10
www.kersemi.com
©2020 ICPDF网 联系我们和版权申明