ISL97519AIUZ-TK [INTERSIL]
600kHz/1.2MHz PWM Step-Up Regulator; 600kHz的/ 1.2MHz的PWM升压调节器
| 型号： | ISL97519AIUZ-TK |
| 厂家： | 
Intersil |
| 描述： | 600kHz/1.2MHz PWM Step-Up Regulator |
| 文件： | 总9页 (文件大小：368K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL97519A
®
Data Sheet
June 30, 2008
FN6683.2
600kHz/1.2MHz PWM Step-Up Regulator
Features
The ISL97519A is a high frequency, high efficiency step-up
voltage regulator operated at constant frequency PWM
mode. With an internal 2.0A, 200mΩ MOSFET, it can deliver
up to 1A output current at over 90% efficiency. Two
selectable frequencies, 600kHz and 1.2MHz, allow trade offs
between smaller components and faster transient response.
An external compensation pin gives the user greater
flexibility in setting frequency compensation allowing the use
of low ESR Ceramic output capacitors.
• >90% Efficiency
• 2.0A, 200mΩ Power MOSFET
• 2.3V to 5.5V Input
• Up to 25V Output
• 600kHz/1.2MHz Switching Frequency Selection
• Adjustable Soft-Start
• Internal Thermal Protection
• 1.1mm Max Height 8 Ld MSOP Package
• Pb-Free (RoHS compliant)
• Halogen Free
When shut down, it draws <1µA of current and can operate
down to 2.3V input supply. These features along with
1.2MHz switching frequency makes it an ideal device for
portable equipment and TFT-LCD displays.
The ISL97519A is available in an 8 Ld MSOP package with a
maximum height of 1.1mm. The device is specified for
operation over the full -40°C to +85°C temperature range.
Applications
• TFT-LCD displays
• DSL modems
Pinout
• PCMCIA cards
ISL97519A
(8 LD MSOP)
TOP VIEW
• Digital cameras
• GSM/CDMA phones
• Portable equipment
• Handheld devices
COMP
FB
SS
1
2
3
4
8
7
6
5
FSEL
VDD
LX
EN
Ordering Information
GND
PART
NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL97519AIUZ
7519A
7519A
8 Ld MSOP
8 Ld MSOP
8 Ld MSOP
MDP0043
MDP0043
MDP0043
ISL97519AIUZ-T*
ISL97519AIUZ-TK* 7519A
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL97519A
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27V
to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . See Curves on page 5
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
V
DD
COMP, FB, EN, SS, FSEL to GND . . . . . . . . . -0.3V to (V
+0.3V)
DD
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
J
C
A
Electrical Specifications
V
= 3.3V, V
= 12V, I
= 0mA, FSEL = GND, T = -40°C to +85°C unless otherwise specified.
A
IN
OUT
OUT
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature
limits established by characterization and are not production tested.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
1
MAX
UNIT
µA
mA
mA
V
IQ1
IQ2
IQ3
Quiescent Current - Shutdown
Quiescent Current - Not Switching
Quiescent Current - Switching
Feedback Voltage
EN = 0V
EN = V , FB = 1.3V
5
0.7
3
DD
EN = V , FB = 1.0V
DD
4.5
1.252
0.5
V
1.228
1.24
0.01
FB
I
Feedback Input Bias Current
Input Voltage Range
µA
V
B-FB
V
2.3
85
85
5.5
DD
D
D
-600kHz Maximum Duty Cycle
-1.2MHz Maximum Duty Cycle
FSEL = 0V
92
90
%
MAX
FSEL = V
%
MAX
DD
I
I
Current Limit - Max Peak Input Current
V
V
< 2.8V
1.0
A
LIM1
LIM2
DD
DD
Current Limit - Max Peak Input Current
Shutdown Input Bias Current
Switch ON-Resistance
> 2.8V
1.5
2.0
A
I
EN = 0V
= 2.7V, I = 1A
0.01
0.2
0.5
3
µA
Ω
EN
r
V
DS(ON)
DD
VSW = 27V
3V < V < 5.5V, V
LX
I
Switch Leakage Current
Line Regulation
0.01
0.2
µA
%
LX-LEAK
ΔV /ΔV
= 12V
OUT
/ΔI
IN
IN
= 3.3V, V
OUT
ΔV
Load Regulation
V
= 12V, I = 30mA to 200mA
0.3
%
OUT OUT
IN
OUT
O
F
F
Switching Frequency Accuracy
Switching Frequency Accuracy
EN, FSEL Input Low Level
EN, FSEL Input High Level
Error Amp Tranconductance
FSEL = 0V
500
620
1250
740
1500
0.5
kHz
kHz
V
OSC1
OSC2
FSEL = V
1000
DD
V
IL
V
1.5
70
V
IH
G
ΔI = 5µA
130
2.1
140
3
150
1µ/Ω
V
M
V
V
V
V
UVLO On Threshold
UVLO Hysteresis
1.95
2.25
DD-ON
DD
DD
HYS
mV
µA
mV
mA
°C
I
Soft-Start Charge Current
2
4
SS
-en
Minimum Soft-Start Enable Voltage
Current Limit Around SS Enable V
Over-Temperature Protection
40
65
150
400
SS
ILIM-V -en
SS
SS = 200mV
300
350
150
OTP
FN6683.2
June 30, 2008
2
ISL97519A
Block Diagram
FSEL
EN
SS
SHUTDOWN
AND START-UP
CONTROL
REFERENCE
GENERATOR
VDD
OSCILLATOR
LX
PWM LOGIC
CONTROLLER
FET
DRIVER
COMPARATOR
CURRENT
SENSE
GND
FB
GM
AMPLIFIER
COMP
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1
2
COMP
FB
Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground.
Voltage feedback pin. Internal reference is 1.24V nominal. Connect a resistor divider from V
.
OUT
V
= 1.24V (1 + R /R ). See “Typical Application Circuit” on page 3.
1 2
OUT
3
4
5
6
7
EN
GND
LX
Shutdown control pin. Pull EN low to turn off the device.
Analog and power ground.
Power switch pin. Connected to the drain of the internal power MOSFET.
Analog power supply input pin.
VDD
FSEL
Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to
high or VDD, switching frequency is set to 1.25MHz.
8
SS
Soft-start control pin. Connect a capacitor to control the converter start-up.
Typical Application Circuit
1
2
3
4
COMP
FB
SS
FSEL
VDD
LX
8
7
6
5
R
3
1kΩ
C
4
R
85.2kΩ
1
27nF
OPEN
C
R
2
10kΩ
5
C
5
4.7nF
EN
2.3V TO 5.5V
C
+
C
1
2
22µF
10µH
0.1µF
GND
12V
C
+
S1
3
D
1
22µF
FN6683.2
June 30, 2008
3
ISL97519A
Typical Performance Curves
95
92
90
88
86
84
82
80
78
76
74
V
f
= 3.3V, V = 9V,
O
IN
= 620kHz
90
85
s
V
= 5V, V = 12V, f = 1.25 MHz
O s
IN
80
75
70
65
60
V
= 5V, V = 12V, f = 620 kHz
IN
O
s
V
= 3.3V, V = 12V,
O
IN
= 620kHz
f
s
V
= 5V, V = 9V, f = 620 kHz
V
= 3.3V, V = 12V,
O
IN
O
s
IN
= 1.25MHz
f
s
V
= 5V, V = 9V, f = 1.25MHz
V
= 3.3V, V = 9V,
IN
O
s
IN
O
f
= 1.25MHz
s
0
100
200
I
300
(mA)
400
500
0
200
400
600
800
1000
I
(mA)
OUT
OUT
FIGURE 1. BOOST EFFICIENCY vs I
FIGURE 2. BOOST EFFICIENCY vs I
OUT
OUT
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
f
= 3.3V, V = 12V,
V
f
= 3.3V, V = 9V,
O
IN
O
IN
= 1.25MHz
V
f
= 5V, V = 9V,
O
V
f
= 5V, V = 12V,
O
IN
IN
= 1.25MHz
= 1.25MHz
s
s
= 1.25MHz
s
s
VIN = 3.3, V = 9V,
O
V
f
= 5V, V = 9V,
O
IN
= 620kHz
fs = 620kHz
s
V
f
= 5V, V = 12V,
O
V
f
= 3.3, V = 12V,
O
IN
IN
= 620kHz
= 620kHz
s
s
0
100
200
I
300
400
500
0
200
400
600
(mA)
800
1000
I
(mA)
OUT
OUT
FIGURE 3. LOAD REGULATION vs I
FIGURE 4. LOAD REGULATION vs I
OUT
OUT
0.6
0.5
0.4
0.3
0.2
0.1
0
I
= 50mA TO 300mA
O
V
= 12V
O
V
= 9V, I = 80mA
O
O
f
= 1.25MHz
s
V
= 9V, I = 100mA
O
O
f
= 620kHz
s
V
= 3.3V
f
= 600kHz
IN
s
V
f
= 12V, I = 80mA
O
O
= 1.25MHz
s
V
= 12V, I = 80mA
O
O
f
= 620kHz
s
-0.1
2
3
4
5
6
V
(V)
IN
FIGURE 5. LINE REGULATION vs V
FIGURE 6. TRANSIENT RESPONSE
IN
FN6683.2
June 30, 2008
4
ISL97519A
Typical Performance Curves (Continued)
I
= 50mA to 300mA
O
V
= 12V
O
V
= 3.3V
f
= 1.2MHz
IN
s
FIGURE 7. TRANSIENT RESPONSE
FIGURE 8. SS DELAY AND LX DELAY DURING EN = VDD
START- UP
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.6
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
870mW
486mW
0.4
0.3
0.2
0.1
0.0
0
25
50
75 85 100
125
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
the boost converter operates in two cycles. During the first
cycle, as shown in Figure 12, the internal power FET turns
on and the Schottky diode is reverse biased and cuts off the
current flow to the output. The output current is supplied
from the output capacitor. The voltage across the inductor is
Applications Information
The ISL97519A is a high frequency, high efficiency boost
regulator operated at constant frequency PWM mode. The
boost converter stores energy from an input voltage source
and delivers it to a higher output voltage. The input voltage
range is 2.3V to 5.5V and output voltage range is 5V to 25V.
The switching frequency is selectable between 600kHz and
1.2MHz allowing smaller inductors and faster transient
response. An external compensation pin gives the user
greater flexibility in setting output transient response and
tighter load regulation. The converter soft-start characteristic
V
and the inductor current ramps up in a rate of V /L, L is
IN
IN
the inductance. The inductance is magnetized and energy is
stored in the inductor. The change in inductor current is
shown in Equation 1:
V
IN
---------
ΔI
= ΔT1 ×
L1
L
can also be controlled by external C capacitor. The EN pin
allows the user to completely shutdown the device.
D
SS
------------
ΔT1 =
F
SW
D = Duty Cycle
Boost Converter Operations
Figure 11 shows a boost converter with all the key
components. In steady state operating and continuous
conduction mode where the inductor current is continuous,
I
OUT
---------------
ΔV
=
× ΔT
(EQ. 1)
O
1
C
OUT
FN6683.2
June 30, 2008
5
ISL97519A
During the second cycle, the power FET turns off and the
Schottky diode is forward biased, (see Figure 13). The
energy stored in the inductor is pumped to the output
supplying output current and charging the output capacitor.
The Schottky diode side of the inductor is clamped to a
Schottky diode above the output voltage. So the voltage
L
D
V
V
OUT
IN
C
C
OUT
IN
ISL97519A
drop across the inductor is V - V
. The change in
IN
OUT
I
inductor current during the second cycle is shown in
Equation 2:
L
ΔI
L2
ΔT
2
ΔV
O
V
– V
OUT
L
IN
-------------------------------
ΔI = ΔT2 ×
L
FIGURE 13. BOOST CONVERTER - CYCLE 2, POWER
SWITCH OPEN
1 – D
-------------
ΔT2 =
(EQ. 2)
Output Voltage
F
SW
An external feedback resistor divider is required to divide the
output voltage down to the nominal 1.24V reference voltage.
The current drawn by the resistor network should be limited
to maintain the overall converter efficiency. The maximum
value of the resistor network is limited by the feedback input
bias current and the potential for noise being coupled into
the feedback pin. A resistor network less than 100k is
recommended. The boost converter output voltage is
determined by the relationship in Equation 4:
For stable operation, the same amount of energy stored in
the inductor must be taken out. The change in inductor
current during the two cycles must be the same as shown in
Equation 3.
ΔI1 + ΔI2 = 0
V
V
– V
IN OUT
D
1 – D
IN
------------ --------- ------------- -------------------------------
×
+
×
= 0
F
L
F
L
SW
SW
R
⎛
⎞
⎟
⎠
1
(EQ. 4)
------
V
= V × 1 +
⎜
V
OUT
FB
1
R
2
OUT
(EQ. 3)
⎝
---------------
-------------
=
V
1 – D
IN
The nominal VFB voltage is 1.24V.
Inductor Selection
L
D
The inductor selection determines the output ripple voltage,
transient response, output current capability, and efficiency.
Its selection depends on the input voltage, output voltage,
switching frequency, and maximum output current. For most
applications, the inductance should be in the range of 2µH to
33µH. The inductor maximum DC current specification must
be greater than the peak inductor current required by the
regulator.The peak inductor current can be calculated in
Equation 5:
V
V
OUT
IN
C
C
OUT
IN
ISL97519A
FIGURE 11. BOOST CONVERTER
I
× V
V
× (V
– V
)
IN
OUT
OUT
IN
OUT
-----------------------------------
----------------------------------------------------
I
=
+ 1 ⁄ 2 ×
(EQ. 5)
L(PEAK)
V
L × V
× FREQ
OUT
IN
L
Output Capacitor
V
V
OUT
IN
C
C
Low ESR capacitors should be used to minimized the output
voltage ripple. Multi-layer ceramic capacitors (X5R and X7R)
are preferred for the output capacitors because of their lower
ESR and small packages. Tantalum capacitors with higher
ESR can also be used. The output ripple can be calculated
as shown in Equation 6:
IN
OUT
ISL97519A
I
L
ΔI
L1
I
× D
OUT
ΔT
(EQ. 6)
1
---------------------------
ΔV
=
+ I
× ESR
OUT
O
F
× C
O
SW
ΔV
O
For noise sensitive application, a 0.1µF placed in parallel
with the larger output capacitor is recommended to reduce
the switching noise coupled from the LX switching node.
FIGURE 12. BOOST CONVERTER - CYCLE 1, POWER
SWITCH CLOSE
FN6683.2
June 30, 2008
6
ISL97519A
The total soft-start time is calculated in Equation 7:
Schottky Diode
5
Css × 0.6V
In selecting the Schottky diode, the reverse break down
voltage, forward current and forward voltage drop must be
considered for optimum converter performance. The diode
must be rated to handle 2.0A, the current limit of the
ISL97519A. The breakdown voltage must exceed the
maximum output voltage. Low forward voltage drop, low
leakage current, and fast reverse recovery will help the
converter to achieve the maximum efficiency.
(EQ. 7)
-----------------------------
= Css × 2 × 10
t
=
ss
3μA
The full current is available after the soft-start period is
finished. The soft-start capacitor should be selected to be big
enough that it doesn't reach 0.6V before the output voltage
reaches the final value.
When the ISL97519A is disabled, the soft-start capacitor will
be discharged to ground.
Input Capacitor
Frequency Selection
The value of the input capacitor depends the input and
output voltages, the maximum output current, the inductor
value and the noise allowed to put back on the input line. For
most applications, a minimum 10µF is required. For
applications that run close to the maximum output current
limit, input capacitor in the range of 22µF to 47µF is
recommended.
The ISL97519A switching frequency can be user selected to
operate at either constant 620kHz or 1.25MHz. Connecting
F
pin to ground sets the PWM switching frequency to
SEL
620kHz. When connecting F
frequency is set to 1.25MHz.
high or V , the switching
DD
SEL
Shutdown Control
The ISL97519A is powered from the VIN. A high frequency
0.1µF bypass capacitor is recommended to be close to the
VIN pin to reduce supply line noise and ensure stable
operation.
When the EN pin is pulled down, the ISL97519A is shutdown
reducing the supply current to <1µA.
Maximum Output Current
The MOSFET current limit is nominally 2.0A and guaranteed
Loop Compensation
1.5A when V
is greater than 2.8V. This restricts the
DD
maximum output current, I
The ISL97519A incorporates a transconductance amplifier in
its feedback path to allow the user some adjustment on the
transient response and better regulation. The ISL97519A
uses current mode control architecture which has a fast
current sense loop and a slow voltage feedback loop. The
fast current feedback loop does not require any
, based on Equation 8:
OMAX
(EQ. 8)
I
= I
+ (1 ⁄ 2 × ΔI )
L-AVG L
L
where:
I = MOSFET current limit
L
compensation. The slow voltage loop must be compensated
for stable operation. The compensation network is a series
RC network from COMP pin to ground. The resistor sets the
high frequency integrator gain for fast transient response
and the capacitor sets the integrator zero to ensure loop
stability. For most applications, the compensation resistor in
the range of 0.5k to 7.5k and the compensation capacitor in
the range of 3nF to 10nF.
I
= average inductor current
L-AVG
ΔI = inductor ripple current
L
V
× [(V + V
) – V
]
IN
IN
O
DIODE
(EQ. 9)
------------------------------------------------------------------------------
=
ΔI
L
L × (V + V
) × F
S
O
DIODE
V
= Schottky diode forward voltage, typically, 0.6V
DIODE
F
I
= switching frequency, 600kHz or 1.2MHz
S
Soft-Start
I
OUT
During power-up, assuming EN is tied to VDD, as VDD rises
above VDD UVLO, the SS capacitor begins to charge up
with a constant 3µA current. During the time the part takes to
rise to 60mV the boost will not be enabled. Depending on
the value of the capacitor on the SS pin, this provides
sufficient (540µs for a 27nf capacitor or 2ms for a 100nf
capacitor) time for the passive in-rush current to settle down,
allowing the output capacitors to be charged to a diode drop
below VDD.
(EQ. 10)
(EQ. 11)
-------------
=
L-AVG
1 – D
D = MOSFET turn-on ratio:
V
IN
--------------------------------------------
OUT
D = 1 –
V
+ V
DIODE
Table 1 gives typical maximum I values for 1.2MHz
switching frequency and 10µH inductor.
OUT
After the SS pin passes above the threshold beyond which
the part is enabled (60mV) the part begins to switch. The
linearly rising SS voltage, at a charge rate proportional to
3µA, has a direct effect on the current limit allowing the
current limit to linearly ramp-up to full current limit. SS
voltage of 200mV corresponds to a current limit around
350mA and 0.6V corresponds to full current limit.
FN6683.2
June 30, 2008
7
ISL97519A
TABLE 1. TYPICAL MAXIMUM I
VALUES
DC PATH BLOCK APPLICATION
OUT
Note that there is a DC path in the boost converter from the
input to the output through the inductor and diode. The input
voltage will be seen at the output less a forward voltage drop
of the diode before the part is enabled. If this direct
connection is not desired, the following circuit can be
inserted between input and inductor to disconnect the DC
path when the part is disabled (see Figure 15).
V
(V)
V
(V)
I
(mA)
IN
OUT
OMAX
3.3
5
1150
3.3
3.3
5
9
12
9
655
500
990
750
5
12
INPUT
TO INDUCTOR
Cascaded MOSFET Application
A 25V N-Channel MOSFET is integrated in the boost
regulator. For applications where the output voltage is
greater than 25V, an external cascaded MOSFET is needed
as shown in Figure 14. The voltage rating of the external
EN
MOSFET should be greater than A
.
VDD
FIGURE 15. CIRCUIT TO DISCONNECT THE DC PATH OF
BOOST CONVERTER
A
V
VDD
IN
LX
FB
INTERSIL
ISL97519A
FIGURE 14. CASCADED MOSFET TOPOLOGY FOR HIGH
OUTPUT VOLTAGE APPLICATIONS
FN6683.2
June 30, 2008
8
ISL97519A
Mini SO Package Family (MSOP)
MDP0043
0.25 M C A B
A
MINI SO PACKAGE FAMILY
D
(N/2)+1
MILLIMETERS
N
SYMBOL
MSOP8
1.10
0.10
0.86
0.33
0.18
3.00
4.90
3.00
0.65
0.55
0.95
8
MSOP10
1.10
0.10
0.86
0.23
0.18
3.00
4.90
3.00
0.50
0.55
0.95
10
TOLERANCE
Max.
NOTES
A
A1
A2
b
-
±0.05
-
E
E1
PIN #1
I.D.
±0.09
-
+0.07/-0.08
±0.05
-
c
-
D
±0.10
1, 3
1
B
(N/2)
E
±0.15
-
E1
e
±0.10
2, 3
Basic
-
e
H
C
L
±0.15
-
SEATING
PLANE
L1
N
Basic
-
Reference
-
M
C A B
b
0.08
0.10 C
Rev. D 2/07
N LEADS
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
0.25
L
DETAIL X
A1
3¬¨Ðó
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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FN6683.2
June 30, 2008
9
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