ISL32483E [INTERSIL]
Fault Protected, Extended CMR, RS-485/RS-422 Transceivers; 故障保护，扩展CMR ， RS - 485 / RS -422收发器
| 型号： | ISL32483E |
| 厂家： | 
Intersil |
| 描述： | Fault Protected, Extended CMR, RS-485/RS-422 Transceivers |
| 文件： | 总17页 (文件大小：833K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Fault Protected, Extended CMR, RS-485/RS-422
Transceivers with Cable Invert and ±16.5kV ESD
ISL32483E, ISL32485E
The ISL3248xE are fault protected, 5V powered differential
transceivers that exceed the RS-485 and RS-422 standards for
Features
• Fault Protected RS-485 Bus Pins. . . . . . . . . . . . . . Up to ±60V
balanced communication. The RS-485 transceiver pins (driver
outputs and receiver inputs) are fault protected up to ±60V and
are protected against ±16.5kV ESD strikes without latch-up.
Additionally, the extended common mode range allows these
transceivers to operate in environments with common mode
voltages up to ±25V (>2X the RS-485 requirement), making this
fault-protected RS-485 family one of the most robust on the
market.
• Extended Common Mode Range . . . . . . . . . . . . . . . . . . . ±25V
More Than Twice the Range Required for RS-485
• ±16.5kV HBM ESD Protection on RS-485 Bus Pins
• Cable Invert Pins
Corrects for Reversed Cable Connections While Maintaining Rx
Full Fail-Safe Functionality
• Full Fail-Safe (Open, Short, Terminated) RS-485 Receivers
• 1/4 Unit Load (UL) for Up to 128 Devices on the Bus
Transmitters (Tx) deliver an exceptional 2.5V (typical) differential
output voltage into the RS-485 specified 54Ω load. This yields
better noise immunity than standard RS-485 ICs or allows up to
six 120Ω terminations in star network topologies.
• High Rx I for Opto-Couplers in Isolated Designs
OL
• Hot Plug Circuitry: Tx and Rx Outputs Remain Three-State
During Power-up/Power-down
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating, shorted,
or on a terminated but undriven (idle) bus.
• Slew Rate Limited RS-485 Data Rate . . . . . . . . . . . . . 1Mbps
• Low Quiescent Supply Current . . . . . . . . . . . . . . . . . . . 2.3mA
• Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . . 10µA
The ISL32483E and ISL32485E include cable invert functions
that reverse the polarity of the Rx and/or Tx bus pins in case the
cable is misconnected. Unlike competing devices, Rx full fail-safe
operation is maintained even when the Rx input polarity is
switched.
Applications
• Utility Meters/Automated Meter Reading Systems
• High Node Count RS-485 Systems
®
• PROFIBUS and RS-485 Based Field Bus Networks, and
Factory Automation
For fault protected RS-485 transceivers without the cable invert
function, please see the ISL32470E and ISL32490E data sheets.
• Security Camera Networks
• Building Lighting and Environmental Control Systems
• Industrial/Process Control Networks
30
25
VID = ±1V
B
25
A
12
0
20
15
10
-7
-12
5
RO
0
-20
-25
-5
STANDARD RS-485
TRANSCEIVER
CLOSEST
COMPETITOR
ISL3248XE
TIME (400ns/DIV)
FIGURE 1. EXCEPTIONAL Rx OPERATES AT 1Mbps EVEN WITH
±25V COMMON MODE VOLTAGE
FIGURE 2. TRANSCEIVERS DELIVER SUPERIOR COMMON MODE
RANGE vs STANDARD RS-485 DEVICES
January 18, 2011
FN7785.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL32483E, ISL32485E
TABLE 1. SUMMARY OF FEATURES
POLARITY
LOW
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
SLEW-RATE
LIMITED?
HOT
PLUG
REVERSAL
PINS?
QUIESCENT I
(mA)
POWER
SHDN?
CC
PART NUMBER
ISL32483E
ISL32485E
EN PINS?
Yes
PIN COUNT
Full
1
1
Yes
Yes
Yes
Yes
Yes
Yes
2.3
2.3
Yes
No
14
8
Half
Tx Only
Ordering Information
PART NUMBER
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
(Notes 1, 2, 3)
ISL32483EIBZ
ISL32485EIBZ
NOTES:
ISL32483 EIBZ
32485 EIBZ
-40 to +85
-40 to +85
14 Ld SOIC
8 Ld SOIC
M14.15
M8.15
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL32483E and ISL32485E. For more information on MSL please see
techbrief TB363.
Pin Configurations
ISL32483E
(14 LD SOIC)
TOP VIEW
ISL32485E
(8 LD SOIC)
TOP VIEW
RINV
RO
1
2
3
4
5
6
7
14 VCC
13 VCC
12 A
RO
INV
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
R
R
D
A/Y
RE
D
GND
DE
11 B
DI
10 Z
GND
GND
9
8
Y
DINV
FN7785.0
January 18, 2011
2
ISL32483E, ISL32485E
Pin Descriptions
PIN
ISL32483E
ISL32485E
NAME
PIN #
PIN #
FUNCTION
RO
2
1
Receiver output. If INV or RINV is low, then: If A - B ≥ -10mV, RO is high; if A - B ≤ -200mV, RO is low. If INV or
RINV is high, then: If B - A ≥ -10mV, RO is high; if B - A ≤ -200mV, RO is low. In all cases, RO = High if A and B
are unconnected (floating), or shorted together, or connected to an undriven, terminated bus (i.e., Rx is always
failsafe open, shorted, and idle, even if polarity is inverted).
RE
DE
DI
3
4
5
N/A
3
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Internally
pulled low.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and they are high
impedance when DE is low. Internally pulled high to V
.
CC
4
Driver input. If INV or DINV is low, a low on DI forces output Y low and output Z high, while a high on DI forces
output Y high and output Z low. The output states relative to DI invert if INV or DINV is high.
GND
A/Y
6, 7
N/A
5
6
Ground connection.
±60V Fault and ±16.5kV HBM ESD Protected RS-485/RS-422 level I/O pin. If INV is low, A/Y is the
non-inverting receiver input and non-inverting driver output. If INV is high, A/Y is the inverting receiver input
and the inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z
N/A
7
±60V Fault and ±16.5kV HBM ESD Protected RS-485/RS-422 level I/O pin. If INV is low, B/Z is the inverting
receiver input and inverting driver output. If INV is high, B/Z is the non-inverting receiver input and the
non-inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
A
B
Y
Z
12
11
9
N/A
N/A
N/A
N/A
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level input. If RINV is low, then A is the
non-inverting receiver input. If RINV is high, then A is the inverting receiver input.
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level input. If RINV is low, then B is the inverting
receiver input. If RINV is high, then B is the non-inverting receiver input.
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level output. If DINV is low, then Y is the
non-inverting driver output. If DINV is high, then Y is the inverting driver output
10
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level. If DINV is low, then Z is the inverting driver
output. If DINV is high, then Z is the non-inverting driver output
VCC
INV
13, 14
N/A
8
2
System power supply input (4.5V to 5.5V).
Receiver and driver polarity selection input. When driven high, this pin swaps the polarity of the driver output
and receiver input pins. If unconnected (floating) or connected low, normal RS-485 polarity conventions
apply. Internally pulled low.
RINV
DINV
1
8
N/A
N/A
Receiver polarity selection input. When driven high, this pin swaps the polarity of the receiver input pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low.
Driver polarity selection input. When driven high, this pin swaps the polarity of the driver output pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low.
FN7785.0
January 18, 2011
3
ISL32483E, ISL32485E
RECEIVING
INPUTS
Truth Tables
OUTPUT
RO
TRANSMITTING
RE
DE (Half
Duplex)
DE (Full
Duplex)
A-B
INV or
RINV
INPUTS
OUTPUTS
RE
X
DE
1
DI
INV or DINV
Y
1
0
0
1
Z
0
0
0
0
0
0
0
0
0
0
X
X
X
X
X
≥ -0.01V
≤ -0.2V
≤ 0.01V
≥ 0.2V
0
0
1
1
X
1
0
1
0
1
1
0
1
0
X
X
0
0
1
1
X
X
0
1
X
1
X
1
1
X
1
0
Inputs
Open or
Shorted
0
0
High-Z
High-Z
High-Z
High-Z
1
0
(see Note) (see Note)
1
1
0
1
0
1
X
X
X
High-Z
(see Note)
NOTE: Low Power Shutdown Mode (see Note 11 on page 7), except
for ISL32485E.
X
High-Z
NOTE: Low Power Shutdown Mode (see Note 11 on page 7), except for
ISL32485E.
Typical Operating Circuits
+5V
+5V
+
0.1µF
+
0.1µF
13, 14
13, 14
1
V
V
RINV
RO
CC
CC
R
B
A
11
12
Y
Z
T
9
DI
2
5
R
D
10
3
4
RE
DE
4
3
DE
RE
R
9
Y
Z
B
A
T
11
12
RO
5
8
DI
2
R
10
D
1
8
RINV
DINV
DINV
GND
6, 7
GND
6, 7
THE IC ON THE LEFT HAS THE CABLE CONNECTIONS
SWAPPED, SO THE INV PINS (1, 8) ARE STRAPPED
HIGH TO INVERT ITS RX AND TX POLARITY
ISL34183E FULL DUPLEX EXAMPLE
FN7785.0
January 18, 2011
4
ISL32483E, ISL32485E
Absolute Maximum Ratings
Thermal Information
V
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Thermal Resistance (Typical)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . .
14 Ld SOIC Package (Notes 4, 5) . . . . . . . .
θ
(°C/W)
116
88
θ
JC
(°C/W)
47
39
CC
JA
Input Voltages
DI, INV, RINV, DINV, DE, RE. . . . . . . . . . . . . . . . . . . . -0.3V to (V + 0.3V)
CC
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
(Transient Pulse Through 100Ω, see Note 15). . . . . . . . . . . . . . . . . ±80V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V +0.3V)
CC
Short Circuit Duration
Recommended Operating Conditions
Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . see “ESD PERFORMANCE” on page 6
Latch-up (Tested per JESD78, Level 2, Class A). . . . . . . . . . . . . . . . +125°C
Supply Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
CC
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common Mode Voltage Range . . . . . . . . . . . . . . . . . -25V to +25V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
5. For θ , the “case temp” location is taken at the package top center.
JC
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V = 5V, T = +25°C (Note 6).
CC
CC
A
Boldface limits apply over the operating temperature range, -40°C to +85°C.
TEMP
(°C)
MIN
(Note 14)
MAX
(Note 14)
PARAMETER
SYMBOL
TEST CONDITIONS
TYP
-
UNITS
V
DC CHARACTERISTICS
Driver Differential V
(No load)
V
V
Full
-
V
OUT
OD1
CC
-
Driver Differential V
(Loaded, Figure 3A)
R
R
R
R
= 100Ω (RS-422)
Full
Full
Full
Full
2.4
1.5
2.0
0.8
3.2
2.5
2.5
1.3
V
V
V
V
OUT
OD2
L
L
L
L
= 54Ω (RS-485)
V
CC
-
= 54Ω (PROFIBUS, V ≥ 5V)
CC
= 21Ω (Six 120Ω terminations for Star
-
Configurations, V ≥ 4.75V)
CC
Change in Magnitude of Driver
Differential V for
ΔV
R
= 54Ω or 100Ω (Figure 3A)
Full
-
-
0.2
V
OD
L
OUT
Complementary Output
States
Driver Differential V
OUT
Common Mode Load
(Figure 3B)
with
V
R
R
R
R
R
R
= 60Ω, -7V ≤ V ≤ 12V
CM
Full
Full
Full
Full
Full
Full
1.5
1.7
0.8
-1
2.1
V
V
V
V
V
V
V
OD3
L
L
L
L
L
L
CC
= 60Ω, -25V ≤ V ≤ 25V (V ≥ 4.75V)
CM CC
2.3
= 21Ω, -15V ≤ V ≤ 15V (V ≥ 4.75V)
CM CC
1.1
-
Driver Common-Mode V
(Figure 3)
V
= 54Ω or 100Ω
-
-
-
3
5
OUT
OC
= 60Ω or 100Ω, -20V ≤ V ≤ 20V
-2.5
-
CM
Change in Magnitude of Driver
Common-Mode V for
DV
= 54Ω or 100Ω (Figure 3A)
0.2
OC
OUT
Complementary Output
States
Driver Short-Circuit Current
I
DE = V , -25V ≤ V ≤ 25V (Note 8)
CC
Full
Full
Full
Full
Full
Full
Full
-250
-83
-13
2.5
-
-
250
83
13
-
mA
mA
mA
V
OSD
O
I
I
At First Fold-back, 22V ≤ V ≤ -22V
O
OSD1
OSD2
At Second Fold-back, 35V ≤ V ≤ -35V
O
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
V
DE, DI, RE, INV, RINV, DINV
DE, DI, RE, INV, RINV, DINV
DI
-
-
IH
V
0.8
1
V
IL
I
-1
-
µA
µA
IN1
DE, RE, INV, RINV, DINV
-15
6
15
FN7785.0
January 18, 2011
5
ISL32483E, ISL32485E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V = 5V, T = +25°C (Note 6).
CC
CC
A
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TEMP
(°C)
MIN
(Note 14)
MAX
(Note 14)
PARAMETER
SYMBOL
TEST CONDITIONS
TYP
110
-75
UNITS
µA
Input/Output Current (A/Y,
B/Z)
I
DE = 0V,
V
V
V
V
= 12V
= -7V
Full
Full
Full
Full
-
250
-
IN2
IN
IN
IN
IN
V
= 0V or 5.5V
= 0V or 5.5V
CC
CC
-200
-800
-6
µA
= ±25V
±240
±0.7
800
6
µA
= ±60V
mA
(Note 17)
Input Current (A, B)
(Full Duplex Versions Only)
I
V
V
V
V
V
= 12V
= -7V
Full
Full
Full
Full
-
90
-70
125
-
µA
µA
µA
mA
IN3
IN
IN
IN
IN
-100
-500
-3
= ±25V
= ±60V
±200
±0.5
500
3
(Note 17)
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
I
RE = 0V, DE = 0V,
= 0V or 5.5V
V
V
V
V
= 12V
= -7V
Full
Full
Full
Full
-
20
-5
200
-
µA
µA
µA
mA
OZD
IN
IN
IN
IN
V
CC
-100
-500
-3
= ±25V
= ±60V
±40
±0.15
500
3
(Note 17)
A-B if INV or RINV = 0; B-A if INV or RINV = 1,
-25V ≤ V ≤ 25V
Receiver Differential
Threshold Voltage
V
Full
-200
-
-100
-10
mV
TH
CM
Receiver Input Hysteresis
DV
-25V ≤ V ≤ 25V
25
25
4.75
4.2
-
mV
V
TH
CM
= -10mV
Receiver Output High Voltage
V
V
I
I
= -2mA
= -8mA
Full
Full
Full
Full
Full
V
- 0.5
-
OH
ID
O
CC
2.8
-
0.4
-
V
O
Receiver Output Low Voltage
Receiver Output Low Current
V
I
= 6mA, V = -200mV
O ID
-
0.27
22
V
OL
I
V
= 1V, V = -200mV
15
-1
mA
µA
OL
O ID
Three-State (High Impedance)
Receiver Output Current
I
I
0V ≤ V ≤ V (Note 16)
0.01
1
OZR
O
CC
Receiver Short-Circuit Current
SUPPLY CURRENT
0V ≤ V ≤ V
Full
±12
-
±110
mA
OSR
O
CC
No-Load Supply Current
(Note 7)
I
DE = V , RE = 0V or V , DI = 0V or V
CC CC CC
Full
Full
-
-
2.3
10
4.5
50
mA
µA
CC
Shutdown Supply Current
ESD PERFORMANCE
I
DE = 0V, RE = V , DI = 0V or V (Note 16)
CC CC
SHDN
RS-485 Pins (A, Y, B, Z, A/Y,
B/Z)
Human Body Model, 1/2 Duplex
25
25
-
-
±16.5
±15
-
-
kV
kV
From Bus Pins to
Full Duplex
GND
All Pins
Human Body Model, per JEDEC
Machine Model
25
25
-
-
±8
-
-
kV
V
±700
DRIVER SWITCHING CHARACTERISTICS
Driver Differential Output
Delay
t
t
R
= 54Ω, C = 50pF No CM Load
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
-
70
125
350
15
ns
ns
PLH, PHL
D
D
(Figure 4)
-25V ≤ V ≤ 25V
CM
-
-
Driver Differential Output
Skew
t
R
= 54Ω, C = 50pF No CM Load
-
4.5
ns
SKEW
D
D
(Figure 4)
-25V ≤ V ≤ 25V
CM
-
70
70
1
-
-
25
ns
Driver Differential Rise or Fall
Time
t , t
R
= 54Ω, C = 50pF No CM Load
170
300
400
-
ns
R
F
D
D
(Figure 4)
-25V ≤ V ≤ 25V
CM
-
4
-
ns
Maximum Data Rate
f
C
= 820pF (Figure 6)
Mbps
ns
MAX
D
Driver Enable to Output High
Driver Enable to Output Low
t
SW = GND (Figure 5), (Note 9)
350
300
120
ZH
t
SW = V (Figure 5), (Note 9)
-
-
ns
ZL
LZ
CC
SW = V (Figure 5)
Driver Disable from Output
Low
t
-
-
ns
CC
FN7785.0
January 18, 2011
6
ISL32483E, ISL32485E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V = 5V, T = +25°C (Note 6).
CC
CC
A
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TEMP
(°C)
MIN
(Note 14)
MAX
(Note 14)
PARAMETER
SYMBOL
TEST CONDITIONS
SW = GND (Figure 5)
TYP
-
UNITS
ns
Driver Disable from Output
High
t
Full
-
120
HZ
Time to Shutdown
t
(Notes 11, 16)
Full
Full
60
-
160
-
600
ns
ns
SHDN
Driver Enable from Shutdown
to Output High
t
SW = GND (Figure 5),
(Notes 11, 12, 16)
2000
ZH(SHDN)
Driver Enable from Shutdown
to Output Low
t
SW = V (Figure 5),
CC
(Notes 11, 12, 16)
Full
-
-
2000
ns
ZL(SHDN)
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
f
-25V ≤ V ≤ 25V (Figure 7)
CM
Full
Full
Full
Full
1
-
15
90
4
-
Mbps
ns
MAX
, t
Receiver Input to Output Delay
t
-25V ≤ V ≤ 25V (Figure 7)
150
10
50
PLH PHL
CM
Receiver Skew | t
- t
|
t
(Figure 7)
-
ns
PLH PHL
SKD
Receiver Enable to Output
Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 8),
CC
-
-
ns
ZL
L
L
(Notes 10, 16)
Receiver Enable to Output
High
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 8),
Full
Full
Full
-
-
-
-
-
-
50
50
50
ns
ns
ns
ZH
L
L
(Notes 10, 16)
R = 1kΩ, C = 15pF, SW = V (Figure 8)
L
(Note 16)
R = 1kΩ, C = 15pF, SW = GND (Figure 8)
L
Receiver Disable from Output
Low
t
LZ
L
CC
Receiver Disable from Output
High
t
HZ
L
(Note 16)
Time to Shutdown
t
(Notes 11, 16)
Full
Full
60
-
160
-
600
ns
ns
SHDN
Receiver Enable from
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 8),
2000
ZH(SHDN)
L
L
Shutdown to Output High
(Notes 11, 13, 16)
Receiver Enable from
t
R
= 1kΩ, C = 15pF, SW = V (Figure 8),
Full
-
-
2000
ns
ZL(SHDN)
L
L
CC
Shutdown to Output Low
(Notes 11, 13, 16)
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” beginning on page 18 for more information
9. Keep RE = 0 to prevent the device from entering SHDN.
10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
11. Transceivers (except on the ISL32485E) are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the
parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See
“Low Power Shutdown Mode” on page 12.
12. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
13. Set the RE signal high time >600ns to ensure that the device enters SHDN.
14. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
15. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15ms at a 1% duty cycle).
16. Does not apply to the ISL32485E. The ISL32485E has no Rx enable function, and thus no SHDN function.
17. See “Caution” statement in the “Recommended Operating Conditions” section on page 5.
FN7785.0
January 18, 2011
7
ISL32483E, ISL32485E
Test Circuits and Waveforms
R /2
L
R /2
375Ω
375Ω
DE
DI
L
V
DE
DI
CC
V
CC
Z
Y
Z
Y
V
CM
V
D
OD
V
D
OD
V
OC
V
R /2
L
OC
R /2
L
FIGURE 3A. V AND V
OD
FIGURE 3B. V AND V WITH COMMON MODE LOAD
OD OC
OC
FIGURE 3. DC DRIVER TEST CIRCUITS
3V
0V
DI
50%
50%
375Ω*
DE
DI
t
t
PHL
PLH
V
CC
V
OH
OUT (Z)
OUT (Y)
Z
R
C
D
D
D
V
V
CM
Y
OL
375Ω*
SIGNAL
GENERATOR
+V
-V
OD
*ONLY USED FOR COMMON
MODE LOAD TESTS
90%
10%
90%
10%
DIFF OUT (Y - Z)
OD
t
t
R
F
SKEW = |t
- t |
PLH PHL
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
DI
Z
Y
110Ω
V
CC
D
3V
GND
SW
SIGNAL
GENERATOR
DE
50%
50%
(Note 11)
C
L
0V
t
, t
ZH ZH(SHDN)
(Note 11)
t
HZ
OUTPUT HIGH
V
OH
V
- 0.5V
OH
PARAMETER
OUTPUT
Y/Z
RE
DI
SW
C (pF)
L
OUT (Y, Z)
2.3V
0V
t
X
1/0
0/1
1/0
0/1
1/0
0/1
GND
50
50
HZ
t
Y/Z
X
V
t
, t
ZL ZL(SHDN)
(Note 11)
t
LZ
LZ
CC
V
CC
t
Y/Z
0 (Note 9)
0 (Note 9)
GND
100
100
100
100
ZH
OUT (Y, Z)
2.3V
OUTPUT LOW
t
Y/Z
V
ZL
CC
V
+ 0.5V
OL
V
OL
t
Y/Z
1 (Note 12)
1 (Note 12)
GND
ZH(SHDN)
t
Y/Z
V
CC
ZL(SHDN)
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
FN7785.0
January 18, 2011
8
ISL32483E, ISL32485E
Test Circuits and Waveforms(Continued)
DE
DI
3V
0V
V
CC
+
DI
Z
Y
54Ω
C
V
D
D
OD
-
SIGNAL
GENERATOR
+V
OD
DIFF OUT (Y - Z)
0V
-V
OD
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER DATA RATE
RE
B
V
V
+ 750mV
- 750mV
CM
15pF
B
V
V
CM
CM
RO
R
A
A
CM
t
t
PHL
PLH
SIGNAL
GENERATOR
SIGNAL
GENERATOR
V
CC
50%
50%
RO
V
CM
0V
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
B
A
1kΩ
V
RE
CC
RO
3V
0V
R
(Note 11)
GND
SW
SIGNAL
GENERATOR
50%
50%
15pF
t
t
, t
ZH ZH(SHDN)
t
HZ
OUTPUT HIGH
(Note 11)
V
PARAMETER
DE
0
A
SW
GND
OH
V
- 0.5V
OH
1.5V
RO
t
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
HZ
0V
t
0
V
LZ
CC
, t
ZL ZL(SHDN)
t
LZ
t
(Note 10)
(Note 10)
0
GND
ZH
(Note 11)
V
CC
t
0
V
ZL
CC
RO
1.5V
OUTPUT LOW
V
+ 0.5V
V
OL
OL
t
(Note 13)
0
GND
ZH(SHDN)
t
(Note 13)
0
V
CC
ZL(SHDN)
FIGURE 8A. TEST CIRCUIT
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
FN7785.0
January 18, 2011
9
ISL32483E, ISL32485E
Driver (Tx) Features
Application Information
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485) and at least
2.4V across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width and to minimize
EMI, and all drivers are three-statable via the active high DE
input.
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard, which allows only one driver and up to 10 (assuming
one-unit load devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one-unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
drivers must handle bus contention without sustaining any
damage.
The driver outputs are slew rate limited to minimize EMI and to
minimize reflections in unterminated or improperly terminated
networks.
High Overvoltage (Fault) Protection
Increases Ruggedness
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000 feet, so the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
The ±60V (referenced to the IC GND) fault protection on the
RS-485 pins makes these transceivers some of the most rugged
on the market. This level of protection makes the ISL3248xE
perfect for applications where power (e.g., 24V and 48V supplies)
must be routed in the conduit with the data lines, or for outdoor
applications where large transients are likely to occur. When
power is routed with the data lines, even a momentary short
between the supply and data lines will destroy an unprotected
device. The ±60V fault levels of this family are at least five times
higher than the levels specified for standard RS-485 ICs. The
ISL3248xE protection is active whether the Tx is enabled or
disabled, and even if the IC is powered down.
The ISL3248xE is a family of ruggedized RS-485 transceivers
that improves on the RS-485 basic requirements and therefore
increases system reliability. The CMR increases to ±25V, while
the RS-485 bus pins (receiver inputs and driver outputs) include
fault protection against voltages and transients up to ±60V.
Additionally, larger-than-required differential output voltages
If transients or voltages (including overshoots and ringing)
greater then ±60V are possible, then additional external
protection is required.
(V ) increase noise immunity, while the ±16.5kV built-in ESD
OD
protection complements the fault protection.
Receiver (Rx) Features
Widest Common Mode Voltage (CMV)
Tolerance Improves Operating Range
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications.
RS-485 networks operating in industrial complexes or over long
distances are susceptible to large CMV variations. Either of these
operating environments may suffer from large node-to-node
ground potential differences or CMV pickup from external
electromagnetic sources, and devices with only the minimum
required +12V to -7V CMR may malfunction. The ISL3248xE’s
extended ±25V CMR is the widest available, allowing operation in
environments that would overwhelm lesser transceivers.
Additionally, the Rx will not phase invert (erroneously change
state), even with CMVs of ±40V or differential voltages as large
as 40V.
Receiver input (load) current surpasses the RS-422 specification
of 3mA and is four times lower than the RS-485 “Unit Load (UL)”
requirement of 1mA maximum. Thus, these products are known
as “one-quarter UL” transceivers, and there can be up to 128 of
these devices on a network while still complying with the RS-485
loading specification.
The Rx functions with common mode voltages as great as ±25V,
making them ideal for industrial or long networks where induced
voltages are a realistic concern.
Cable Invert (Polarity Reversal) Function
All the receivers include a “full fail-safe” function that guarantees
a high-level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (i.e., an idle bus).
With large node count RS-485 networks, it is common for some
cable data lines to be wired backwards during installation. When
this happens, the node is unable to communicate over the
network. Once a technician finds the miswired node, he must
then rewire the connector, which is time consuming.
Rx outputs feature high drive levels (typically 22mA @ V = 1V) to
OL
The ISL32483E and ISL32485E simplify this task by including
cable invert pins (INV, DINV, RINV) that allow the technician to
invert the polarity of the Rx input and/or the Tx output pins
simply by moving a jumper to change the state of the invert pins.
When the invert pin is low, the IC operates like any standard
RS-485 transceiver, and the bus pins have their normal polarity
definition of A and Y being noninverting and B and Z being
inverting. With the invert pin high, the corresponding bus pins
reverse their polarity, so B and Z are now noninverting, and A and
Y become inverting.
ease the design of optically coupled isolated interfaces. Except for
the ISL32485E, Rx outputs are three-statable via the active low RE
input.
The Rx includes noise filtering circuitry to reject high-frequency
signals, and typically rejects pulses narrower than 50ns
(equivalent to 20Mbps).
FN7785.0
January 18, 2011
10
ISL32483E, ISL32485E
Intersil’s unique cable invert function is superior to that found on
DE, DI = V
RE = GND
CC
competing devices, because the Rx full fail-safe function is
maintained, even when the Rx polarity is reversed. Competitor
devices implement the Rx invert function simply by inverting the
Rx output. This means that with the Rx inputs floating or shorted
together, the Rx appropriately delivers a logic 1 in normal
polarity, but outputs a logic low when the IC is operated in the
inverted mode. Intersil’s innovative Rx design guarantees that,
5.0
2.5
3.5V
2.8V
V
CC
0
5.0
2.5
0
RL = 1kΩ
RL = 1kΩ
with the Rx inputs floating or shorted together (V =0V), the Rx
ID
A/Y
ISL83088E
ISL3248XE
output remains high, regardless of the state of the invert pins.
The full duplex ISL32483E includes two invert pins that allow for
separate control of the Rx and Tx polarities. If only the Rx cable is
miswired, then only the RINV pin need be driven to a logic 1. If
the Tx cable is miswired, then DINV must be connected to a logic
high. The half-duplex version has only one logic pin (INV) that,
when high, switches the polarity of both the Tx and the Rx blocks.
5.0
2.5
RO
ISL3248XE
0
TIME (40µs/DIV)
FIGURE 9. HOT PLUG PERFORMANCE (ISL3248XE) vs ISL83088E
WITHOUT HOT PLUG CIRCUITRY
High V Improves Noise Immunity and
OD
Flexibility
ESD Protection
The ISL3248xE driver design delivers larger differential output
voltages (V ) than the RS-485 standard requires or than most
RS-485 transmitters can deliver. The typical ±2.5V V provides
OD
more noise immunity than networks built using many other
transceivers.
All pins on the ISL3248xE devices include Class 3 (>8kV)
Human Body Model (HBM) ESD protection structures that are
good enough to survive ESD events commonly seen during
manufacturing. Even so, the RS-485 pins (driver outputs and
receiver inputs) incorporate more advanced structures that
allow them to survive ESD events in excess of ±16.5kV HBM
(±15kV for full-duplex version). The RS-485 pins are particularly
vulnerable to ESD strikes, because they typically connect to an
exposed port on the exterior of the finished product. Simply
touching the port pins or connecting a cable can cause an ESD
event that might destroy unprotected ICs. The new ESD
structures protect the device whether or not it is powered up,
and without interfering with the exceptional ±25V CMR. This
built-in ESD protection minimizes the need for board-level
protection structures (e.g., transient suppression diodes) and
the associated, undesirable capacitive load they present.
OD
Another advantage of the large V is the ability to drive more
OD
than two bus terminations, which allows for utilizing the
ISL3248xE in “star” and other multi-terminated, nonstandard
network topologies.
Figure 10 details the transmitter’s V versus I
OD
characteristic,
OUT
and includes load lines for four (30Ω) and six (20Ω) 120Ω
terminations. The figure shows that the driver typically delivers
±1.3V into six terminations, and the “Electrical Specifications” on
page 5 guarantee a V of ±0.8V at 21Ω over the full
OD
temperature range. The RS-485 standard requires a minimum
1.5V V into two terminations, but the ISL3248xE delivers
OD
RS-485 voltage levels with 2x to 3x the number of terminations.
Data Rate, Cables, and Terminations
Hot Plug Function
RS-485/RS-422 are intended for network lengths up to 4000 feet,
but the maximum system data rate decreases as the transmission
length increases. These 1Mbps versions can operate at full data
rates with lengths up to 800 feet (244m). Jitter is the limiting
parameter at this data rate, so employing encoded data streams
(e.g., Manchester coded or Return-to-Zero) may allow increased
transmission distances.
When a piece of equipment powers up, there is a period of time
in which the processor or ASIC driving the RS-485 control lines
(DE, RE) is unable to ensure that the RS-485 Tx and Rx outputs
are kept disabled. If the equipment is connected to a bus, a
driver activating prematurely during power-up may crash the bus.
To avoid this scenario, the ISL3248xE devices incorporate a “Hot
Plug” function. Circuitry monitoring V ensures that, during
power-up and power-down, the Tx and Rx outputs remain disabled,
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode signals,
which are effectively rejected by the differential receivers in these
ICs.
CC
regardless of the state of DE and RE, if V is less than ≈3.5V. This
CC
gives the processor or ASIC a chance to stabilize and drive the
RS-485 control lines to the proper states. Figure 9 illustrates the
power-up and power-down performance of the ISL3248xE
compared to an RS-485 IC without the Hot Plug feature.
FN7785.0
January 18, 2011
11
ISL32483E, ISL32485E
Proper termination is imperative to minimize reflections, and
setting (≈9mA) minimizes power dissipation if the Tx is enabled
terminations are recommended unless power dissipation is an
overriding concern. In point-to-point, or point-to-multipoint (single
driver on bus like RS-422) networks, the main cable should be
terminated in its characteristic impedance (typically 120Ω) at the
end farthest from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as short as
possible. Multipoint (multi-driver) systems require that the main
cable be terminated in its characteristic impedance at both ends.
Stubs connecting a transceiver to the main cable should be kept as
short as possible.
when a fault occurs.
In the event of a major short circuit condition, devices also include
a thermal shutdown feature that disables the drivers whenever the
die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about 15°C. If the
contention persists, the thermal shutdown/re-enable cycle repeats
until the fault is cleared. Receivers stay operational during thermal
shutdown.
Low Power Shutdown Mode
These BiCMOS transceivers all use a fraction of the power
required by competitive devices, but they also include a
shutdown feature (except the ISL32485E) that reduces the
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst-case bus contentions undamaged. These
transceivers meet this requirement via driver output short circuit
current limits and on-chip thermal shutdown circuitry.
already low quiescent I to a 10µA trickle. These devices enter
CC
shutdown whenever the receiver and driver are simultaneously
The driver output stages incorporate a double foldback, short
circuit current limiting scheme, which ensures that the output
current never exceeds the RS-485 specification, even at the
common mode and fault condition voltage range extremes. The
first foldback current level (≈70mA) is set to ensure that the
driver never folds back when driving loads with common mode
voltages up to ±25V. The very low second foldback current
disabled (RE = V and DE = GND) for a period of at least 600ns.
Disabling both the driver and the receiver for less than 60ns
guarantees that the transceiver will not enter shutdown.
CC
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 9, 10, 11, 12
and 13, at the end of “Electrical Specifications” on page 5, for
more information.
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified.
CC
A
90
3.6
3.4
3.2
3.0
2.8
2.6
2.4
R
= 20Ω
D
R
= 30Ω
D
80
70
60
50
40
30
20
10
0
+25°C
+85°C
R
= 100Ω
D
R
= 54Ω
D
R
= 100Ω
D
R
= 54Ω
D
2.2
-40
0
1
2
3
4
5
-25
0
25
50
75 85
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
FN7785.0
January 18, 2011
12
ISL32483E, ISL32485E
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified. (Continued)
A
CC
70
60
50
40
30
20
10
0
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
V
, +25°C
OL
DE = V , RE = X
CC
V
, +85°C
OL
DE = GND, RE = GND
-10
-20
-30
V
, +85°C
1
OH
V
, +25°C
3
OH
-40
-25
0
25
50
75 85
0
2
4
5
TEMPERATURE (°C)
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 12. SUPPLY CURRENT vs TEMPERATURE
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
800
600
400
200
150
100
50
+85°C
Y OR Z = LOW
+25°C
0
Y or Z
0
-50
-100
-150
-200
Y OR Z = HIGH
+25°C
-400
A/Y or B/Z
+85°C
-600
-60 -50 -40 -30 -20 -10
0
10 20 30 40 50 60
-70
-50
-30
-10
0
10
30
50
70
BUS PIN VOLTAGE (V)
OUTPUT VOLTAGE (V)
FIGURE 14. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
FIGURE 15. BUS PIN CURRENT vs BUS PIN VOLTAGE
4.0
3.5
3.0
2.5
2.0
85
R
= 54Ω, C = 50pF
D
R
= 54Ω, C = 50pF
D
D
D
80
75
70
65
60
55
50
t
PLH
t
PHL
|t
- t
|
PLH PHL
-40
-25
0
25
50
75 85
-40
-25
0
25
50
75 85
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE
FIGURE 17. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
FN7785.0
January 18, 2011
13
ISL32483E, ISL32485E
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified. (Continued)
CC A
A
B
R
= 54Ω, C = 50pF
D
D
25
20
15
10
5
5
0
VID = ±1V
DI
5
0
RO
RO
RO
0
5
0
-5
3
2
1
-10
-15
-20
-25
0
-1
-2
-3
A/Y - B/Z
A
B
TIME (400ns/DIV)
TIME (400ns/DIV)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS
FIGURE 18. RECEIVER PERFORMANCE WITH ±25V CMV
Die Characteristics
SUBSTRATE POTENTIAL (Powered Up):
GND
PROCESS:
Si Gate BiCMOS
FN7785.0
January 18, 2011
14
ISL32483E, ISL32485E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
FN7785.0
CHANGE
January 18, 2011
Initial Release
Products
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accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7785.0
January 18, 2011
15
ISL32483E, ISL32485E
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
4
0.10 C A-B 2X
8.65
A
3
6
DETAIL"A"
0.22±0.03
D
14
8
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
(0.35) x 45°
4° ± 4°
5
0.31-0.51
0.25M C A-B D
B
3
6
TOP VIEW
0.10 C
H
1.75 MAX
1.25 MIN
0.25
GAUGE PLANE
SEATING PLANE
C
0.10-0.25
1.27
0.10 C
SIDE VIEW
DETAIL "A"
(1.27)
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
(1.50)
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
FN7785.0
January 18, 2011
16
ISL32483E, ISL32485E
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 2, 11/10
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
AREA
6.20 (0.244)
5.80 (0.228)
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
8°
0°
1
2
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.41 (0.095)
1
8
SEATING PLANE
0.76 (0.030)
1.27 (0.050)
1.75 (0.069)
5.00 (0.197)
4.80 (0.189)
2
3
7
6
1.35 (0.053)
-C-
4
5
0.25(0.010)
0.10(0.004)
1.27 (0.050)
0.51(0.020)
0.33(0.013)
0.200
SIDE VIEW “A
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index fea-
ture must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the seat-
ing plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
FN7785.0
January 18, 2011
17
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