ISL32483EIBZ-T7A [RENESAS]
Fault Protected, Extended CMR, RS-485/RS-422 Transceivers with Cable Invert and ±16.5kV ESD; SOIC14; Temp Range: -40° to 85°C;
| 型号： | ISL32483EIBZ-T7A |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Fault Protected, Extended CMR, RS-485/RS-422 Transceivers with Cable Invert and ±16.5kV ESD; SOIC14; Temp Range: -40° to 85°C 驱动 信息通信管理 光电二极管 驱动器 |
| 文件： | 总18页 (文件大小：1005K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL32483E, ISL32485E
Fault Protected, Extended CMR, RS-485/RS-422 Transceivers with Cable Invert
and ±16.5kV ESD
FN7785
Rev.4.00
Feb 15, 2019
The ISL32483E and ISL32485E (ISL3248xE) are fault protected,
Features
5V powered differential transceivers that exceed the RS-485 and
• Fault protected RS-485 bus pins . . . . . . . . . . . . . . up to ±60V
RS-422 standards for balanced communication. The RS-485
transceiver pins (driver outputs and receiver inputs) are fault
protected up to ±60V and are protected against ±16.5kV ESD
strikes without latch-up. Additionally, the extended common-
mode range allows these transceivers to operate in environments
with common-mode voltages up to ±25V (>2X the RS-485
requirement), making this fault-protected RS-485 family one of
the most robust on the market.
• Extended common-mode range. . . . . . . . . . . . . . . . . . . . ±25V
more than twice the range required for RS-485
• ±16.5kV HBM ESD protection on RS-485 bus pins
• Cable invert pins corrects for reversed cable connections
while maintaining Rx full fail-safe functionality
• Full fail-safe (open, short, terminated) RS-485 receivers
• 1/4 Unit Load (UL) for up to 128 devices on the bus
The transmitters (Tx) deliver an exceptional 2.5V (typical)
differential output voltage into the RS-485 specified 54Ω load.
This yields better noise immunity than standard RS-485 ICs or
allows up to six 120Ω terminations in star network topologies.
• High Rx I for opto-couplers in isolated designs
OL
• Hot plug circuitry: Tx and Rx outputs remain three-state
during power-up/power-down
The receiver (Rx) inputs feature a full fail-safe design that
ensures a logic high Rx output if the Rx inputs are floating,
shorted, or on a terminated but undriven (idle) bus.
• Slew rate limited RS-485 data rate . . . . . . . . . . . . . . . 1Mbps
• Low quiescent supply current. . . . . . . . . . . . . . . . . . . . 2.3mA
• Ultra low shutdown supply current. . . . . . . . . . . . . . . . . . 10µA
The ISL32483E and ISL32485E include cable invert functions
that reverse the polarity of the Rx and/or Tx bus pins if the
cable is misconnected. Unlike competing devices, the Rx full
fail-safe operation is maintained even when the Rx input
polarity is switched.
Applications
• Utility meters/automated meter reading systems
• High node count RS-485 systems
For fault protected RS-485 transceivers without the cable
invert function, see the ISL32470E and ISL32490E
datasheets.
• PROFIBUS™ and RS-485 based field bus networks and
factory automation
• Security camera networks
• Building lighting and environmental control systems
• Industrial/process control networks
Related Literature
For a full list of related documents, visit our website:
• ISL32483E, ISL32485E device pages
30
25
VID = ±1V
B
25
A
12
0
20
15
10
-7
-12
5
RO
0
-20
-25
-5
STANDARD RS-485
TRANSCEIVER
CLOSEST
COMPETITOR
ISL3248xE
TIME (400ns/DIV)
FIGURE 1. EXCEPTIONAL Rx OPERATES AT 1Mbps EVEN WITH
±25V COMMON-MODE VOLTAGE
FIGURE 2. TRANSCEIVERS DELIVER SUPERIOR COMMON-MODE
RANGE vs STANDARD RS-485 DEVICES
FN7785 Rev.4.00
Feb 15, 2019
Page 1 of 18
ISL32483E, ISL32485E
Typical Operating Circuits
+5V
+5V
+
0.1µF
+
0.1µF
13, 14
13, 14
D
1
V
V
RINV
RO
CC
CC
R
B
A
11
12
Y
Z
T
9
DI
2
5
R
10
3
4
RE
DE
4
3
DE
RE
R
9
Y
Z
B
A
T
11
12
RO
5
8
DI
2
R
10
D
1
8
RINV
DINV
DINV
GND
6, 7
GND
6, 7
THE IC ON THE LEFT HAS THE CABLE CONNECTIONS
SWAPPED, SO THE INV PINS (1, 8) ARE STRAPPED
HIGH TO INVERT ITS Rx AND Tx POLARITY
FIGURE 3. ISL32483E FULL DUPLEX EXAMPLE
Ordering Information
PART NUMBER
PART
TEMP. RANGE
(°C)
TAPE AND REEL
(Units) (Note 1)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
(Notes 2, 3)
MARKING
ISL32483EIBZ
ISL32483 EIBZ
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-
14 Ld SOIC
M14.15
ISL32483EIBZ-T
ISL32483EIBZ-T7A
ISL32485EIBZ
ISL32485EIBZ-T
ISL32485EIBZ-T7A
NOTES:
ISL32483 EIBZ
ISL32483 EIBZ
32485 EIBZ
2.5k
250
-
14 Ld SOIC
14 Ld SOIC
8 Ld SOIC
8 Ld SOIC
8 Ld SOIC
M14.15
M14.15
M8.15
M8.15
M8.15
32485 EIBZ
2.5k
250
32485 EIBZ
1. See TB347 for details about reel specifications.
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see the ISL32483E and ISL32485E device pages. For more information about MSL, see TB363.
TABLE 1. SUMMARY OF FEATURES
POLARITY
HALF/FULL
DUPLEX
DATA RATE SLEW-RATE
EN
PINS?
HOT
PLUG
REVERSAL
PINS?
QUIESCENT I
(mA)
LOW POWER
SHUTDOWN? PIN COUNT
CC
PART NUMBER
ISL32483E
(Mbps)
LIMITED?
Full
1
1
Yes
Yes
Yes
Yes
Yes
Yes
2.3
2.3
Yes
No
14
8
ISL32485E
Half
Yes
Tx Only
FN7785 Rev.4.00
Feb 15, 2019
Page 2 of 18
ISL32483E, ISL32485E
Pin Configurations
ISL32483E
(14 LD SOIC)
TOP VIEW
ISL32485E
(8 LD SOIC)
TOP VIEW
RINV
RO
1
2
3
4
5
6
7
14 VCC
13 VCC
12 A
RO
INV
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
R
R
D
A/Y
RE
D
GND
DE
11 B
DI
10 Z
GND
GND
9
8
Y
DINV
Pin Descriptions
PIN
ISL32483E
ISL32485E
NAME
PIN #
PIN #
DESCRIPTION
RO
2
1
Receiver output.
If INV or RINV is low, then: If A - B -10mV, RO is high; if A - B -200mV, RO is low.
If INV or RINV is high, then: If B - A -10mV, RO is high; if B - A -200mV, RO is low.
In all cases, RO = High if A and B are unconnected (floating) or shorted together or connected to an undriven,
terminated bus (Rx is always fail safe open, shorted and idle even if polarity is inverted).
RE
DE
DI
3
4
5
-
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Internally
pulled low.
3
4
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high and they are high
impedance when DE is low. Internally pulled high to V
.
CC
Driver input. If INV or DINV is low, a low on DI forces output Y low and output Z high, while a high on DI forces
output Y high and output Z low. The output states relative to DI invert if INV or DINV is high.
GND
A/Y
6, 7
-
5
6
Ground connection.
±60V fault and ±16.5kV HBM ESD protected RS-485/RS-422 level I/O pin. If INV is low than, A/Y is the
noninverting receiver input and noninverting driver output. If INV is high, than A/Y is the inverting receiver
input and the inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z
-
7
±60V fault and ±16.5kV HBM ESD protected RS-485/RS-422 level I/O pin. If INV is low, than B/Z is the
inverting receiver input and inverting driver output. If INV is high, than B/Z is the noninverting receiver input
and the noninverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
A
B
Y
Z
12
11
9
-
-
-
-
±60V fault and ±15kV HBM ESD protected RS-485/RS-422 level input. If RINV is low, then A is the
noninverting receiver input. If RINV is high, then A is the inverting receiver input.
±60V fault and ±15kV HBM ESD protected RS-485/RS-422 level input. If RINV is low, then B is the inverting
receiver input. If RINV is high, then B is the noninverting receiver input.
±60V fault and ±15kV HBM ESD protected RS-485/RS-422 level output. If DINV is low, then Y is the
noninverting driver output. If DINV is high, then Y is the inverting driver output
10
±60V fault and ±15kV HBM ESD protected RS-485/RS-422 level. If DINV is low, then Z is the inverting driver
output. If DINV is high, then Z is the noninverting driver output.
VCC
INV
13, 14
-
8
2
System power supply input (4.5V to 5.5V).
Receiver and driver polarity selection input. When driven high, this pin swaps the polarity of the driver output
and receiver input pins. If unconnected (floating) or connected low, normal RS-485 polarity conventions
apply. Internally pulled low.
RINV
DINV
1
8
-
-
Receiver polarity selection input. When driven high, this pin swaps the polarity of the receiver input pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low.
Driver polarity selection input. When driven high, this pin swaps the polarity of the driver output pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low.
FN7785 Rev.4.00
Feb 15, 2019
Page 3 of 18
ISL32483E, ISL32485E
Truth Tables
TRANSMITTING
RECEIVING
INPUTS
DE
INPUTS
DI
OUTPUTS
OUTPUT
RO
RE
DE
INV or DINV
Y
Z
RE
DE
(Half Duplex) (Full Duplex)
A-B
INV or
RINV
X
X
X
X
0
1
1
1
1
0
1
0
1
0
X
0
0
1
1
X
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
X
X
X
X
X
≥ -0.01V
≤ -0.2V
≤ 0.01V
≥ 0.2V
0
0
1
1
X
1
0
1
0
1
1
1
0
High-Z
High-Z
Inputs
Open or
Shorted
1
0
X
X
High-Z
(see Note) (see Note)
High-Z
1
1
0
1
0
1
X
X
X
High-Z
(see Note)
NOTE: Low Power Shutdown Mode (see Note 11 on page 7), except for
ISL32485E.
X
High-Z
NOTE: Low Power Shutdown Mode (see Note 11 on page 7), except for
ISL32485E.
FN7785 Rev.4.00
Feb 15, 2019
Page 4 of 18
ISL32483E, ISL32485E
Absolute Maximum Ratings
Thermal Information
V
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Thermal Resistance (Typical)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . .
14 Ld SOIC Package (Notes 4, 5) . . . . . . . .
(°C/W)
104
78
JC
(°C/W)
47
42
CC
JA
Input Voltages
DI, INV, RINV, DINV, DE, RE. . . . . . . . . . . . . . . . . . . . -0.3V to (V + 0.3V)
CC
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z (Transient Pulse Through 100Ω, see Note 15) ±80V
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .see TB493
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V +0.3V)
CC
Short-circuit Duration
Recommended Operating Conditions
Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . see “ESD PERFORMANCE” on page 6
Latch-Up (Tested per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . +125°C
Supply Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
CC
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common-Mode Voltage Range . . . . . . . . . . . . . . . . . -25V to +25V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. is measured with the component mounted on a high-effective thermal conductivity test board in free air. See TB379 for details.
JA
5. For , the “case temp” location is taken at the package top center.
JC
Electrical Specifications Test conditions: V = 4.5V to 5.5V; unless otherwise specified. Typical values are at V = 5V, T = +25°C
CC
CC
A
(Note 6). Boldface limits apply across the operating temperature range, -40°C to +85°C.
TEMP
(°C)
MIN
(Note 14)
MAX
(Note 14)
PARAMETER
SYMBOL
TEST CONDITIONS
TYP
-
UNIT
V
DC CHARACTERISTICS
Driver Differential V
(No load)
V
V
Full
-
V
OUT
OD1
CC
Driver Differential V
(Loaded, Figure 4A)
R
R
R
R
= 100Ω (RS-422)
Full
Full
Full
Full
2.4
1.5
2.0
0.8
3.2
2.5
2.5
1.3
-
V
V
V
V
OUT
OD2
L
L
L
L
= 54Ω (RS-485)
V
CC
= 54Ω (PROFIBUS, V ≥ 5V)
-
CC
= 21Ω (Six 120Ω terminations for star
-
configurations, V ≥ 4.75V)
CC
Change in Magnitude of Driver
Differential V for
V
R
= 54Ω or 100Ω (Figure 4A)
Full
-
-
0.2
V
OD
L
OUT
Complementary Output
States
Driver Differential V
OUT
Common-Mode Load
(Figure 4B)
with
V
R
R
R
R
R
R
= 60Ω, -7V ≤ V ≤ 12V
CM
Full
Full
Full
Full
Full
Full
1.5
1.7
0.8
-1
2.1
V
V
V
V
V
V
V
OD3
L
L
L
L
L
L
CC
= 60Ω, -25V ≤ V ≤ 25V (V ≥ 4.75V)
CM CC
2.3
-
= 21Ω, -15V ≤ V ≤ 15V (V ≥ 4.75V)
CM CC
1.1
-
Driver Common-Mode V
(Figure 4)
V
= 54Ω or 100Ω
-
-
-
3
5
OUT
OC
= 60Ω or 100Ω, -20V ≤ V ≤ 20V
-2.5
-
CM
Change in Magnitude of Driver
Common-Mode V for
DV
= 54Ω or 100Ω (Figure 4A)
0.2
OC
OUT
Complementary Output
States
Driver Short-Circuit Current
I
DE = V , -25V ≤ V ≤ 25V (Note 8)
CC
Full
Full
Full
Full
Full
Full
Full
-250
-83
-13
2.5
-
-
-
250
83
13
-
mA
mA
mA
V
OSD
O
I
I
At first foldback, 22V ≤ V ≤ -22V
O
OSD1
OSD2
At second foldback, 35V ≤ V ≤ -35V
-
O
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
V
DE, DI, RE, INV, RINV, DINV
DE, DI, RE, INV, RINV, DINV
DI
-
IH
V
-
0.8
1
V
IL
I
-1
-
µA
µA
IN1
DE, RE, INV, RINV, DINV
-15
6
15
FN7785 Rev.4.00
Feb 15, 2019
Page 5 of 18
ISL32483E, ISL32485E
Electrical Specifications Test conditions: V = 4.5V to 5.5V; unless otherwise specified. Typical values are at V = 5V, T = +25°C
CC
CC
A
(Note 6). Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(°C)
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
(Note 14)
TYP
110
-75
(Note 14)
UNIT
µA
Input/Output Current (A/Y,
B/Z)
I
DE = 0V,
V
V
V
V
V
V
V
V
V
V
V
V
= 12V
-
250
-
IN2
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
V
= 0V or 5.5V
CC
= -7V
-200
-800
-6
µA
= ±25V
±240
±0.7
90
800
6
µA
= ±60V (Note 17)
= 12V
mA
µA
Input Current (A, B)
(Full Duplex Versions Only)
I
V
= 0V or 5.5V
-
125
-
IN3
CC
= -7V
-100
-500
-3
-70
µA
= ±25V
±200
±0.5
20
500
3
µA
= ±60V (Note 17)
= 12V
mA
µA
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
I
RE = 0V, DE = 0V,
= 0V or 5.5V
-
200
-
OZD
V
CC
= -7V
-100
-500
-3
-5
µA
= ±25V
±40
±0.15
-100
500
3
µA
= ±60V (Note 17)
mA
mV
Receiver Differential
Threshold Voltage
V
A-B if INV or RINV = 0; B-A if INV or RINV = 1,
-25V ≤ V ≤ 25V
-200
-10
TH
CM
Receiver Input Hysteresis
DV
-25V ≤ V ≤ 25V
25
-
25
4.75
4.2
-
mV
V
TH
CM
= -10mV
Receiver Output High Voltage
V
V
I
I
= -2mA
= -8mA
Full
Full
Full
Full
Full
V
- 0.5
-
OH
ID
O
CC
2.8
-
0.4
-
V
O
Receiver Output Low Voltage
Receiver Output Low Current
V
I
= 6mA, V = -200mV
O ID
-
0.27
22
V
OL
I
V
= 1V, V = -200mV
15
-1
mA
µA
OL
O ID
Three-State (High Impedance)
Receiver Output Current
I
I
0V ≤ V ≤ V (Note 16)
0.01
1
OZR
O
CC
Receiver Short-Circuit Current
SUPPLY CURRENT
0V ≤ V ≤ V
Full
±12
-
±110
mA
OSR
O
CC
No-Load Supply Current
(Note 7)
I
DE = V , RE = 0V or V , DI = 0V or V
CC CC CC
Full
Full
-
-
2.3
10
4.5
50
mA
µA
CC
Shutdown Supply Current
ESD PERFORMANCE
I
DE = 0V, RE = V , DI = 0V or V (Note 16)
CC CC
SHDN
RS-485 Pins (A, Y, B, Z, A/Y,
B/Z)
Human Body Model, 1/2 Duplex
25
25
-
-
±16.5
±15
-
-
kV
kV
From Bus Pins to
Full Duplex
GND
All Pins
Human Body Model, per JEDEC
Machine Model
25
25
-
-
±8
-
-
kV
V
±700
DRIVER SWITCHING CHARACTERISTICS
Driver Differential Output
Delay
t
t
R
= 54Ω, C = 50pF No CM load
Full
Full
Full
Full
-
-
-
-
70
125
350
15
ns
ns
ns
ns
PLH, PHL
D
D
(Figure 5)
-25V ≤ V ≤ 25V
CM
-
4.5
-
Driver Differential Output
Skew
t
R = 54Ω, C = 50pF No CM load
D D
(Figure 5)
SKEW
-25V ≤ V ≤ 25V
25
CM
(Note 18)
Driver Differential Rise or Fall
Time
t , t
R
= 54Ω, C = 50pF No CM load
Full
Full
Full
Full
Full
Full
70
170
300
550
-
ns
ns
R
F
D
D
(Figure 5)
-25V ≤ V ≤ 25V
CM
70
-
4
-
Maximum Data Rate
f
C
= 820pF (Figure 7)
1
-
Mbps
ns
MAX
D
Driver Enable to Output High
Driver Enable to Output Low
t
SW = GND (Figure 6), (Note 9)
350
300
120
ZH
t
SW = V (Figure 6), (Note 9)
-
-
ns
ZL
LZ
CC
SW = V (Figure 6)
Driver Disable from Output
Low
t
-
-
ns
CC
FN7785 Rev.4.00
Feb 15, 2019
Page 6 of 18
ISL32483E, ISL32485E
Electrical Specifications Test conditions: V = 4.5V to 5.5V; unless otherwise specified. Typical values are at V = 5V, T = +25°C
CC
CC
A
(Note 6). Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
SW = GND (Figure 6)
(°C)
(Note 14)
TYP
-
(Note 14)
UNIT
ns
Driver Disable from Output
High
t
Full
-
120
HZ
Time to Shutdown
t
(Notes 11, 16)
Full
Full
60
-
160
-
600
ns
ns
SHDN
Driver Enable from Shutdown
to Output High
t
SW = GND (Figure 6),
(Notes 11, 12, 16)
2000
ZH(SHDN)
Driver Enable from Shutdown
to Output Low
t
SW = V (Figure 6),
CC
(Notes 11, 12, 16)
Full
-
-
2000
ns
ZL(SHDN)
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
f
-25V ≤ V ≤ 25V (Figure 8)
CM
Full
Full
Full
Full
1
-
15
90
4
-
Mbps
ns
MAX
, t
Receiver Input to Output Delay
t
-25V ≤ V ≤ 25V (Figure 8)
150
10
50
PLH PHL
CM
Receiver Skew | t
- t
|
t
(Figure 8)
-
ns
PLH PHL
SKD
Receiver Enable to Output
Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 9),
CC
-
-
ns
ZL
L
L
(Notes 10, 16)
Receiver Enable to Output
High
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 9),
Full
Full
Full
-
-
-
-
-
-
50
50
50
ns
ns
ns
ZH
L
L
(Notes 10, 16)
R = 1kΩ, C = 15pF, SW = V (Figure 9)
L
(Note 16)
R = 1kΩ, C = 15pF, SW = GND (Figure 9)
L
Receiver Disable from Output
Low
t
LZ
L
CC
Receiver Disable from Output
High
t
HZ
L
(Note 16)
Time to Shutdown
t
(Notes 11, 16)
Full
Full
60
-
160
-
600
ns
ns
SHDN
Receiver Enable from
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 9),
2000
ZH(SHDN)
L
L
Shutdown to Output High
(Notes 11, 13, 16)
Receiver Enable from
t
R
= 1kΩ, C = 15pF, SW = V (Figure 9),
Full
-
-
2000
ns
ZL(SHDN)
L
L
CC
Shutdown to Output Low
(Notes 11, 13, 16)
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” beginning on page 10 for more information.
9. Keep RE = 0 to prevent the device from entering shutdown.
10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering shutdown.
11. Transceivers (except on the ISL32485E) are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the
parts are ensured not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are ensured to enter shutdown. See “Low Power
Shutdown Mode” on page 14.
12. Keep RE = VCC and set the DE signal low time >600ns to ensure that the device enters shutdown.
13. Set the RE signal high time >600ns to ensure that the device enters shutdown.
14. Compliance to datasheet limits is assured by one or more methods: production test, characterization, and/or design.
15. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15ms at a 1% duty cycle).
16. Does not apply to the ISL32485E. The ISL32485E has no Rx enable function and thus no shutdown function.
17. See “Caution” statement in “Absolute Maximum Ratings” on page 5.
18. This parameter is not production tested.
FN7785 Rev.4.00
Feb 15, 2019
Page 7 of 18
ISL32483E, ISL32485E
Test Circuits and Waveforms
R /2
L
R /2
375Ω
375Ω
DE
DI
L
V
DE
DI
CC
V
CC
Z
Y
Z
Y
V
CM
V
D
OD
V
D
OD
V
OC
V
R /2
L
OC
R /2
L
FIGURE 4A. V AND V
OD
FIGURE 4B. V AND V WITH COMMON-MODE LOAD
OD OC
OC
FIGURE 4. DC DRIVER TEST CIRCUITS
3V
0V
DI
50%
50%
375Ω*
DE
DI
t
t
PHL
PLH
V
CC
V
OH
OUT (Z)
Z
R
C
D
D
D
V
V
OUT (Y)
CM
Y
OL
375Ω*
SIGNAL
GENERATOR
+V
-V
OD
*USED ONLY FOR COMMON
MODE LOAD TESTS
90%
10%
90%
10%
DIFF OUT (Y - Z)
OD
t
t
R
F
SKEW = |t
- t |
PLH PHL
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
DI
Z
Y
110Ω
V
CC
D
3V
GND
SW
SIGNAL
GENERATOR
DE
50%
50%
(Note 11
C
L
0V
t
, t
ZH ZH(SHDN)
(Note 11)
t
HZ
OUTPUT HIGH
V
OH
V
- 0.5V
OH
PARAMETER
OUTPUT
Y/Z
RE
DI
SW C (pF)
L
OUT (Y, Z)
2.3V
0V
t
X
1/0
0/1
1/0
0/1
1/0
0/1
GND
50
50
HZ
t
Y/Z
X
V
t
, t
t
ZL ZL(SHDN)
(Note 11
LZ
CC
LZ
V
CC
t
Y/Z
0 (Note 9)
0 (Note 9)
GND
100
100
100
100
ZH
OUT (Y, Z)
2.3V
OUTPUT LOW
t
Y/Z
V
ZL
CC
V
+ 0.5V
OL
V
OL
t
Y/Z
1 (Note 12)
1 (Note 12)
GND
ZH(SHDN)
t
Y/Z
V
CC
ZL(SHDN)
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER ENABLE AND DISABLE TIMES
FN7785 Rev.4.00
Feb 15, 2019
Page 8 of 18
ISL32483E, ISL32485E
Test Circuits and Waveforms(Continued)
DE
3V
0V
V
CC
+
DI
Z
Y
DI
54Ω
C
V
D
D
OD
-
SIGNAL
GENERATOR
+V
OD
DIFF OUT (Y - Z)
0V
-V
OD
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. DRIVER DATA RATE
RE
B
A
V
V
+ 750mV
- 750mV
CM
15pF
B
V
V
CM
CM
RO
R
A
CM
t
t
PHL
PLH
SIGNAL
GENERATOR
SIGNAL
GENERATOR
V
CC
50%
50%
RO
V
CM
0V
FIGURE 8A. TEST CIRCUIT
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
B
A
1kΩ
V
RE
CC
RO
3V
0V
R
(Note 11)
GND
SW
SIGNAL
GENERATOR
50%
50%
15pF
t
t
, t
ZH ZH(SHDN)
t
HZ
OUTPUT HIGH
(Note 11)
V
PARAMETER
DE
0
A
SW
GND
OH
V
- 0.5V
OH
1.5V
RO
t
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
HZ
0V
t
0
V
LZ
CC
, t
ZL ZL(SHDN)
t
LZ
t
(Note 10)
(Note 10)
0
GND
ZH
(Note 11)
V
CC
t
0
V
ZL
CC
RO
1.5V
OUTPUT LOW
V
+ 0.5V
V
OL
OL
t
(Note 13)
0
GND
ZH(SHDN)
t
(Note 13)
0
V
CC
ZL(SHDN)
FIGURE 9A. TEST CIRCUIT
FIGURE 9B. MEASUREMENT POINTS
FIGURE 9. RECEIVER ENABLE AND DISABLE TIMES
FN7785 Rev.4.00
Feb 15, 2019
Page 9 of 18
ISL32483E, ISL32485E
Typical Performance Curves
V
= 5V, T = +25°C; unless otherwise specified.
A
CC
3.6
90
R
= 20Ω
D
R
= 30Ω
D
80
70
60
50
40
30
20
10
0
3.4
+25°C
+85°C
R
= 100Ω
D
R
= 54Ω
D
3.2
3.0
2.8
2.6
2.4
2.2
R
= 100Ω
D
R
= 54Ω
D
0
1
2
3
4
5
-40
-25
0
25
50
75 85
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
70
60
2.45
2.40
V
, +25°C
OL
DE = V , RE = X
CC
V
, +85°C
OL
50
40
30
20
10
0
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
DE = GND, RE = GND
-10
-20
-30
V
, +85°C
1
OH
V
, +25°C
3
OH
-40
-25
0
25
50
75 85
0
2
4
5
TEMPERATURE (°C)
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
FIGURE 12. SUPPLY CURRENT vs TEMPERATURE
1000
150
+85°C
V
= 0V TO 5.5V
CC
800
600
400
200
0
100
50
Y OR Z = LOW
+25°C
0
Y or Z
-50
-100
-150
-200
-400
-600
Y OR Z = HIGH
+25°C
A/Y or B/Z
+85°C
-60 -50 -40 -30 -20 -10
0
10 20 30 40 50 60
-70 -60 -50 -40 -30 -20 -10
0
10 20 30 40 50 60 70
OUTPUT VOLTAGE (V)
BUS PIN VOLTAGE (V)
FIGURE 14. DRIVER OUTPUT CURRENT vs SHORT-CIRCUIT VOLTAGE
FIGURE 15. BUS PIN CURRENT vs BUS PIN VOLTAGE
FN7785 Rev.4.00
Feb 15, 2019
Page 10 of 18
ISL32483E, ISL32485E
Typical Performance Curves
V
= 5V, T = +25°C; unless otherwise specified. (Continued)
A
CC
4.0
85
R
= 54Ω, C = 50pF
D
R
= 54Ω, C = 50pF
D
D
D
80
75
70
65
60
55
50
3.5
3.0
2.5
2.0
t
PLH
t
PHL
|t
- t
|
PLH PHL
-40
-25
0
25
50
75 85
-40
-25
0
25
50
75 85
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 17. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE
A
R
= 54Ω, C = 50pF
D
25
D
B
5
0
VID = ±1V
20
15
10
5
DI
5
0
RO
RO
RO
0
5
0
3
2
1
-5
-10
-15
-20
-25
0
-1
-2
-3
A
B
A/Y - B/Z
TIME (400ns/DIV)
TIME (400ns/DIV)
FIGURE 18. RECEIVER PERFORMANCE WITH ±25V CMV
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS
FN7785 Rev.4.00
Feb 15, 2019
Page 11 of 18
ISL32483E, ISL32485E
Driver (Tx) Features
Application Information
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485) and at least
2.4V across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width and to minimize
EMI. All drivers are three-statable using the active high DE input.
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard that allows only one driver and up to 10 receivers
(assuming one-unit load devices) on each bus. RS-485 is a true
multipoint standard that allows up to 32 one-unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
drivers must handle bus contention without sustaining any
damage.
The driver outputs are slew rate limited to minimize EMI and
reflections in unterminated or improperly terminated networks.
High Overvoltage (Fault) Protection
Increases Ruggedness
The ±60V fault protection (referenced to the IC GND) on the
RS-485 pins makes these transceivers some of the most rugged
on the market. This level of protection makes the ISL3248xE
perfect for applications where power (such as 24V and 48V
supplies) must be routed in the conduit with the data lines, or for
outdoor applications where large transients are likely to occur.
When power is routed with the data lines, even a momentary
short between the supply and data lines destroys an unprotected
device. The ±60V fault levels of this family are at least five times
higher than the levels specified for standard RS-485 ICs. The
ISL3248xE’s protection is active whether the Tx is enabled or
disabled, and even if the IC is powered down or VCC and Ground
are floating.
An important advantage of RS-485 is the extended
Common-Mode Range (CMR) that specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000ft, so the wide CMR is necessary to handle ground potential
differences and voltages induced in the cable by external fields.
The ISL3248xE are a family of ruggedized RS-485 transceivers
that improve on the RS-485 basic requirements and increase
system reliability. The CMR increases to ±25V and the RS-485
bus pins (receiver inputs and driver outputs) include fault
protection against voltages and transients up to ±60V.
Additionally, larger-than-required differential output voltages
If transients or voltages (including overshoots and ringing)
greater than ±60V are possible, additional external protection is
required.
(V ) increase noise immunity, while the ±16.5kV built-in ESD
OD
protection complements the fault protection.
Receiver (Rx) Features
Widest Common-Mode Voltage (CMV)
Tolerance Improves Operating Range
These devices use a differential input receiver for maximum noise
immunity and common-mode rejection. Input sensitivity is better
than ±200mV, as required by the RS-422 and RS-485
specifications.
RS-485 networks operating in industrial complexes or over long
distances are susceptible to large CMV variations. Either of these
operating environments can suffer from large node-to-node ground
potential differences or CMV pickup from external electromagnetic
sources, and devices with only the minimum required +12V to -7V
CMR can malfunction. The ISL3248xE’s extended ±25V CMR is the
widest available, allowing operation in environments that would
overwhelm lesser transceivers. Additionally, the Rx does not phase
invert (erroneously change state), even with CMVs of ±40V or
differential voltages as large as 40V.
The receiver input (load) current surpasses the RS-422
specification of 3mA and is four times lower than the RS-485
Unit Load (UL) requirement of 1mA maximum. Therefore, these
products are known as one-quarter UL transceivers and there can
be up to 128 of these devices on a network while still complying
with the RS-485 loading specification.
The receivers functions with common-mode voltages as great as
±25V, making them ideal for industrial or long networks where
induced voltages are a realistic concern.
Cable Invert (Polarity Reversal) Function
Large node count RS-485 networks are commonly wired
backwards during installation. When this happens, the node is
unable to communicate over the network. When technicians find
the miswired node, the connector must be rewired, which is time
consuming.
All the receivers include a full fail-safe function that ensures a
high-level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (an idle bus).
The Rx outputs feature high drive levels (typically 22mA at
The ISL3248xE simplify this task by including cable invert pins
(INV, DINV, RINV) that allow the technician to invert the polarity of
the Rx input and/or the Tx output pins simply by moving a jumper
to change the state of the invert pins. When the invert pin is low,
the IC operates like any standard RS-485 transceiver and the bus
pins have their normal polarity definition of A and Y being
noninverting and B and Z being inverting. With the invert pin
high, the corresponding bus pins reverse their polarity, so B and Z
are now noninverting and A and Y become inverting.
V
= 1V) to ease the design of optically coupled isolated
OL
interfaces. Except for the ISL32485E, Rx outputs are
three-statable using the active low RE input.
The Rx includes noise filtering circuitry to reject high frequency
signals and typically rejects pulses narrower than 50ns
(equivalent to 20Mbps).
This unique cable invert function is superior to that found on
competing devices because the Rx full fail-safe function is
FN7785 Rev.4.00
Feb 15, 2019
Page 12 of 18
ISL32483E, ISL32485E
maintained even when the Rx polarity is reversed. Competitor
devices implement the Rx invert function simply by inverting the
Rx output. This means that with the Rx inputs floating or shorted
together, the Rx appropriately delivers a Logic 1 in normal
polarity, but outputs a Logic 0 when the IC is operated in the
inverted mode. This innovative Renesas Rx design ensures that
the Rx output remains high with the Rx inputs floating or shorted
DE, DI = V
RE = GND
CC
5.0
2.5
3.5V
2.8V
V
CC
0
5.0
2.5
0
RL = 1kΩ
RL = 1kΩ
together (V = 0V), regardless of the state of the invert pins.
ID
A/Y
ISL83088E
ISL3248XE
The full duplex ISL32483E includes two invert pins that allow for
separate control of the Rx and Tx polarities. If only the Rx cable is
miswired, only the RINV pin needs to be driven to a Logic 1. If the
Tx cable is miswired, DINV must be connected to a logic high. The
half-duplex version has only one logic pin (INV) that, when high,
switches the polarity of both the Tx and the Rx blocks.
5.0
2.5
RO
ISL3248XE
0
TIME (40µs/DIV)
FIGURE 20. HOT PLUG PERFORMANCE (ISL3248XE) vs ISL83088E
WITHOUT HOT PLUG CIRCUITRY
High V Improves Noise Immunity and
OD
Flexibility
ESD Protection
The ISL3248xE driver design delivers larger differential output
All pins on the ISL3248xE devices include Class 3 (>8kV) Human
Body Model (HBM) ESD protection structures that can survive ESD
events commonly seen during manufacturing. Even so, the RS-485
pins (driver outputs and receiver inputs) incorporate more
advanced structures that allow them to survive ESD events in
excess of ±16.5kV HBM (±15kV for the full-duplex version). The
RS-485 pins are particularly vulnerable to ESD strikes because
they typically connect to an exposed port on the exterior of the
finished product. Touching the port pins or connecting a cable can
cause an ESD event that can destroy unprotected ICs. The new ESD
structures protect the device whether or not it is powered up and
without interfering with the exceptional ±25V CMR. This built-in
ESD protection minimizes the need for board-level protection
structures (such as transient suppression diodes) and the
associated, undesirable capacitive load they present.
voltages (V ) than the RS-485 standard requirements or than
most RS-485 transmitters can deliver. The typical ±2.5V V
OD
provides more noise immunity than networks built using many
other transceivers.
OD
Another advantage of the large V is the ability to drive more
OD
than two bus terminations, which allows for using the ISL3248xE
in star topologies and other multi-terminated, nonstandard
network topologies.
Figure 10 on page 10 details the transmitter’s V versus I
OD
OUT
characteristic and includes load lines for four (30Ω) and six (20Ω)
120Ω terminations. Figure 10 shows that the driver typically
delivers ±1.3V into six terminations and the “Electrical
Specifications” on page 5 ensures a V of ±0.8V at 21Ω across
OD
the full temperature range. The RS-485 standard requires a
minimum 1.5V V into two terminations, but the ISL3248xE
delivers RS-485 voltage levels with two to three times the
number of terminations.
OD
Data Rate, Cables and Terminations
RS-485/RS-422 are intended for network lengths up to 4000ft,
but the maximum system data rate decreases as the
transmission length increases. The ISL3248xE can operate at full
data rates with lengths up to 800ft. (244m). Jitter is the limiting
parameter at this data rate, so employing encoded data streams
(such as Manchester coded or Return-to-Zero) can allow
increased transmission distances.
Hot Plug Function
When a piece of equipment powers up, there is a period of time
when the processor or ASIC driving the RS-485 control lines (DE,
RE) is unable to ensure that the RS-485 Tx and Rx outputs are
kept disabled. If the equipment is connected to a bus, a driver
activating prematurely during power-up can crash the bus. To
avoid crashes, the ISL3248xE devices incorporate a hot plug
Use twisted pair cables for RS-485/RS-422 networks. Twisted
pair cables tend to pick up noise and other electromagnetically
induced voltages as common-mode signals that are effectively
rejected by the differential receivers in these ICs.
function. Circuitry monitoring V ensures the Tx and Rx outputs
CC
remain disabled during power-up and power-down if V is less
CC
than ≈3.5V, regardless of the state of DE and RE. The disabled Tx
and Rx outputs allow the processor/ASIC to stabilize and drive
the RS-485 control lines to the proper states. Figure 20
illustrates the power-up and power-down performance of the
ISL3248xE compared to an RS-485 IC without the hot plug
feature.
Note: Proper termination is imperative to minimize reflections
and terminations are recommended unless power dissipation is
an overriding concern. In point-to-point, or point-to-multipoint
networks (single driver on bus like RS-422), terminate the main
cable in its characteristic impedance (typically 120Ω) at the end
farthest from the driver. In multireceiver applications, keep stubs
connecting receivers to the main cable should be as possible.
Multipoint (multidriver) systems require that the main cable is
terminated in its characteristic impedance at both ends. Keep
stubs connecting a transceiver to the main cable should be as
possible.
FN7785 Rev.4.00
Feb 15, 2019
Page 13 of 18
ISL32483E, ISL32485E
Built-in Driver Overload Protection
Low Power Shutdown Mode
The RS-485 specification requires that drivers survive worst-case
bus contentions undamaged. These transceivers meet this
requirement using driver output short-circuit current limits and
on-chip thermal shutdown circuitry.
These BiCMOS transceivers all use a fraction of the power
required by competitive devices, but they also include a
shutdown feature (except the ISL32485E) that reduces the
already low quiescent I to a 10µA trickle. These devices enter
CC
shutdown whenever the receiver and driver are simultaneously
The driver output stages incorporate a double foldback,
short-circuit current limiting scheme that ensures that the output
current never exceeds the RS-485 specification, even at the
common-mode and fault condition voltage range extremes. The
first foldback current level (≈70mA) is set to ensure that the
driver never folds back when driving loads with common-mode
voltages up to ±25V. The very low second foldback current
setting (≈9mA) minimizes power dissipation if the Tx is enabled
when a fault occurs.
disabled (RE = V and DE = GND) for a period of at least 600ns.
CC
Disabling both the driver and the receiver for less than 60ns
ensures that the transceiver does not enter shutdown.
Note: The receiver and driver enable times increase when the
transceiver enables from shutdown. See Notes 9 through 13 on
page 7 for more information.
Die Characteristics
In the event of a major short-circuit condition, the ISL3248xE's
thermal shutdown feature disables the drivers whenever the die
temperature becomes excessive. Thermal shutdown eliminates
the power dissipation, allowing the die to cool. The drivers
automatically re-enable after the die temperature drops about
15°C. If the contention persists, the thermal shutdown/reenable
cycle repeats until the fault is cleared. The receivers stay
operational during thermal shutdown.
SUBSTRATE POTENTIAL (POWERED UP):
GND
PROCESS:
Si Gate BiCMOS
FN7785 Rev.4.00
Feb 15, 2019
Page 14 of 18
ISL32483E, ISL32485E
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please visit our website to ensure you have the latest revision.
DATE
REVISION
FN7785.4
CHANGE
Feb 15, 2019
Updated links throughout document.
Added Related Literature section.
Updated ordering information table by adding all tape and reel information and updating notes.
Updated last sentence in first paragraph under “High Overvoltage (Fault) Protection Increases Ruggedness” on
page 12.
Removed About Intersil section.
Updated disclaimer.
May 13, 2015
Oct 28, 2014
FN7785.3
FN7785.2
-Figure 3 on page 2: Changed the title from "ISL34183E" to "ISL32483E.
-“Thermal Information” on page 5 changes are:
* 14 Ld SOIC Package: Changed Theta-ja: From 88 to 78 and Theta-jc from 39 to 42.
*8 Ld SOIC Package: Changed Theta-ja: From 108 to 104.
- Changed "MAX" on “Driver Differential Rise or Fall Time” on page 6 from 400 to 550.
On p6, in the "Driver Switching Characteristics" section, "Driver Differential Output Skew" parameter, in the
second "Test Conditions" line, added "(Note 18)" after the -25V ≤ Vcm ≤ 25V" entry. And on p7, added a new
Note 18 to the notes section saying, "This parameter is not production tested."
Updated POD M8.15 to most recent version with following changes:
Changed in Typical Recommended Land Pattern the following:
2.41(0.095) to 2.20(0.087)
0.76 (0.030) to 0.60(0.023)
0.200 to 5.20(0.205)
Changed Note 1 "1982" to "1994"
Mar 8, 2012
Jan 18, 2011
FN7785.1
FN7785.0
Page 5 - Thermal Resistance - 8 Ld SOIC package Theta JA changed from 116 to 108
Page 13 - Updated Figure 15 to show Pos breakdown between 60V and 70V.
Initial Release
FN7785 Rev.4.00
Feb 15, 2019
Page 15 of 18
ISL32483E, ISL32485E
For the most recent package outline drawing, see M14.15.
Package Outline Drawings
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
4
0.10 C A-B 2X
8.65
A
3
6
DETAIL"A"
0.22±0.03
D
14
8
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
(0.35) x 45°
4° ± 4°
5
0.31-0.51
0.25M C A-B D
B
3
6
TOP VIEW
0.10 C
H
1.75 MAX
1.25 MIN
0.25
GAUGE PLANE
SEATING PLANE
C
0.10-0.25
1.27
0.10 C
SIDE VIEW
DETAIL "A"
(1.27)
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
(1.50)
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
FN7785 Rev.4.00
Feb 15, 2019
Page 16 of 18
ISL32483E, ISL32485E
M8.15
For the most recent package outline drawing, see M8.15.
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
AREA
6.20 (0.244)
5.80 (0.228)
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
8°
0°
1
2
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
1
8
SEATING PLANE
0.60 (0.023)
1.27 (0.050)
1.75 (0.069)
5.00 (0.197)
4.80 (0.189)
2
3
7
6
1.35 (0.053)
-C-
4
5
0.25(0.010)
0.10(0.004)
1.27 (0.050)
0.51(0.020)
0.33(0.013)
5.20(0.205)
SIDE VIEW “A
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
19. Dimensioning and tolerancing per ANSI Y14.5M-1994.
20. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
21. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
22. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
23. Terminal numbers are shown for reference only.
24. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
25. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
26. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
FN7785 Rev.4.00
Feb 15, 2019
Page 17 of 18
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