HC-5509A1 [INTERSIL]
SLIC Subscriber Line Interface Circuit; SLIC用户线路接口电路
| 型号： | HC-5509A1 |
| 厂家： | 
Intersil |
| 描述： | SLIC Subscriber Line Interface Circuit |
| 文件： | 总10页 (文件大小：244K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
HC-5509A1
SLIC
PRELIMINARY
May 1997
Subscriber Line Interface Circuit
Features
Description
•
•
DI Monolithic High Voltage Process
Compatible with Worldwide PBX and CO Performance
Requirements
The HC-5509A1 telephone Subscriber Line Interface Circuit
integrates most of the BORSCHT functions on a monolithic
IC. The device is manufactured in a Dielectric Isolation (DI)
process and is designed for use as a high voltage interface
between the traditional telephone subscriber pair (Tip and
Ring) and the low voltage filtering and coding/decoding func-
tions of the line card. Together with a secondary protection
diode bridge and “feed” resistors, the device will withstand
1000V lightning induced surges, in plastic packages. The
SLIC also maintains specified transmission performance in
the presence of externally induced longitudinal currents. The
BORSCHT functions that the SLIC provides are:
•
Controlled Supply of Battery Feed Current with Programmable
Current Limit
Operates with 5V Positive Supply (VB+)
Internal Ring Relay Driver and a Utility Relay Driver
High Impedance Mode for Subscriber Loop
•
•
•
• High Temperature Alarm Output
•
•
•
•
•
Low Power Consumption During Standby Functions
Switch Hook, Ground Key, and Ring Trip Detection
Selective Power Denial to Subscriber
Voice Path Active During Power Denial
On Chip Op-Amp for 2 Wire Impedance Matching
Applications
• Battery Feed with Subscriber Loop Current Limiting
• Overvoltage Protection
•
Solid State Line Interface Circuit for PBX or Central Office
Systems, Digital Loop Carrier Systems
Hotel/Motel Switching Systems
• Ring Relay Driver
•
•
•
•
Direct Inward Dialing (DID) Trunks
Voice Messaging PBX’s
• Supervisory Signaling Functions
• Hybrid Functions (with External Op-Amp)
• Test (or Battery Reversal) Relay Driver
High Voltage 2W/4W, 4W/2W Hybrid
In addition, the SLIC provides selective denial of power to
subscriber loops, a programmable subscriber loop current
limit from 20 to 60mA, a thermal shutdown with an alarm out-
put and line fault protection. Switch hook detection, ring trip
detection and ground key detection functions are also incor-
porated in the SLIC device.
Ordering Information
PART NUMBER
HC1-5509A1-5
HC1-5509A1-9
HC3-5509A1-5
HC3-5509A1-9
HC4P5509A1-5
HC4P5509A1-9
HC9P5509A1-5
TEMP. RANGE
PACKAGE
28 Lead Ceramic DIP
28 Lead Ceramic DIP
28 Lead Plastic DIP
28 Lead Plastic DIP
44 Lead PLCC
0o to +75oC
-40o to +85oC
0o to +75oC
-40o to +85oC
0o to +75oC
-40o to +85oC
0o to +75oC
The HC-5509A1 SLIC is ideally suited for line card designs
in PBX and CO systems, replacing traditional transformer
solutions.
44 Lead PLCC
28 Lead SOIC
Pinouts
HC-5509A1 (PLCC)
HC-5509A1 (PDIP, CDIP, SOIC)
TOP VIEW
TOP VIEW
TRUTH TABLE
AG
1
2
28
27
26
25
C2
VB+
C1
VB-
RF
6
5
4
3
2
1
44 43 42 41 40
F1
0
F0
ACTION
Normal Loop Feed
RD Active
3
7
39
38
37
36
35
34
33
32
31
30
29
TF2
VFB
RD
N/C
F1
0
1
0
X
F1
8
4
TF
0
9
F0
5
24
23
22
21
20
19
18
17
16
15
F0
RS
VFB
RD
BG
10
11
12
13
14
15
16
17
BG
DG
RS
1
Power Down Latch
RESET
6
SHD
7
SHD
GKD
TST
PR
GKD
TST
ALM
N/C
PRI
VTX
LAO
1
1
0
1
Power on RESET
8
PR
9
PRI
Loop Power
Denial Active
N/C
N/C
N/C
N/C
10
11
12
ALM
ILMT
OUT 1
VTX
LAO
VRX
RFS
RING
18 19 20 21 22 23 24 25 26 27 28
-IN 1 13
14
TIP
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
File Number 3567.1
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
8-131
,
Specifications HC-5509A1
Absolute Maximum Ratings (Note 1)
Operating Conditions
Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15V
Maximum Supply Voltages
Operating Temperature Range
HC-5509A1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +75oC
HC-5509A1-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC
Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to +12V
Positive Power Supply (VB+). . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%
Negative Power Supply (VB-) . . . . . . . . . . . . . . . . . . . . -42V to -58V
Loop Resistance (RL) . . . . . . . . . . . . . . . . . 200Ω to 1750Ω (Note 2)
(VB+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
(VB+)-(VB-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V
Junction Temperature Ceramic . . . . . . . . . . . . . . . . . . . . . . +175oC
Junction Temperature Plastic. . . . . . . . . . . . . . . . . . . . . . . . +150oC
Lead Temperature (Soldering 10 Sec.) . . . . . . . . . . . . . . . . +300oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at TA = +25oC, Min-Max Parameters are over
Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are
specified at 600Ω 2-Wire terminating impedance.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
A.C. TRANSMISSION PARAMETERS
RX Input Impedance
300Hz to 3.4kHz (Note 3)
-
-
100
-
20
-
kΩ
Ω
TX Output Impedance
300Hz to 3.4kHz (Note 3)
-
-
4W Input Overload Level
300Hz to 3.4kHz RL = 1200Ω,
600Ω Reference
+1.5
VPEAK
2W Return Loss
SRL LO
Matched for 600Ω (Note 3)
26
30
30
58
35
40
40
63
-
-
-
-
dB
dB
dB
dB
ERL
SRL HI
2W Longitudinal to Metallic Balance
Off Hook
Per ANSI/IEEE STD 455-1976 (Note 3)
300Hz to 3400Hz
4W Longitudinal Balance
Off Hook
300Hz to 3400Hz (Note 3)
50
55
-
dB
Low Frequency Longitudinal Balance
R.E.A. Test Circuit
-
-
-
-
-
-
-67
23
30
dBmp
dBrnC
mArms
I
LINE = 40mA TA = +25oC (Note 3)
LINE = 40mA TA = +25oC (Note 3)
Longitudinal Current Capability
Insertion Loss
2W/4W
I
0dBm at 1kHz, Referenced 600Ω
-
-
-
-
±0.05
±0.05
-
±0.2
±0.2
dB
dB
dB
dB
4W/2W
4W/4W
±0.12
±0.05
Frequency Response
300Hz to 3400Hz (Note 3) Referenced to
Absolute Level at 1kHz, 0dBm Referenced
600Ω
±0.02
Level Linearity
Referenced to -10dBm (Note 3)
+3 to -40dBm
2W to 4W and 4W to 2W
-
-
-
-
-
-
±0.05
±0.1
±0.3
dB
dB
dB
-40 to -50dBm
-50 to -55dBm
Absolute Delay
(Note 3)
8-132
Specifications HC-5509A1
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at TA = +25oC, Min-Max Parameters are over
Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are
specified at 600Ω 2-Wire terminating impedance. (Continued)
PARAMETER
TEST CONDITIONS
300Hz to 3400Hz
MIN
TYP
MAX
1
UNITS
µs
2W/4W
-
-
-
-
-
-
-
4W/2W
300Hz to 3400Hz
300Hz to 3400Hz
(Note 3) See Figure 1
1
µs
4W/4W
-
1.5
-
µs
Transhybrid Loss, THL
40
-
dB
Total Harmonic Distortion
2W/4W, 4W/2W, 4W/4W
Reference Level 0dBm at 600Ω
300Hz to 3400Hz (Note 3)
-52
dB
Idle Channel Noise
2W and 4W
(Note 3)
C-Message
Psophometric
3kHz Flat
-
-
-
-
-
-
5
dBrnC
dBmp
dBrn
-85
15
Power Supply Rejection Ratio
VB+ to 2W
(Note 3)
30Hz to 200Hz, RL = 600Ω
20
20
20
20
30
30
20
20
50
29
29
29
29
-
-
dB
dB
dB
dB
dB
dB
dB
dB
µs
VB+ to 4W
VB- to 2W
VB- to 4W
VB+ to 4W
-
-
-
(Note 3)
200Hz to 16kHz, RL = 600Ω
-
VB- to 2W
-
-
V
B- to 4W
B- to 4W
25
25
-
-
-
V
Ring Sync Pulse Width
D.C. PARAMETERS
Loop Current Programming
Limit Range
500
20
10
-
40
-
60
-
mA
%
Accuracy
Loop Current During Power Denial
Fault Currents
RL = 200Ω
±3
±5
mA
TIP to Ground
-
-
30
60
90
12
12
-
-
-
mA
mA
mA
mA
mA
oC
RING to Ground
TIP and RING to Ground
Switch Hook Detection Threshold
Ground Key Detection Threshold
Thermal ALARM Output
Ring Trip Comparator Threshold
-
-
-
15
16
160
17.5
8
Safe Operating Die Temperature Exceeded
140
9.5
See Typical Applications for more informa-
tion
13.5
mA
Dial Pulse Distortion
-
0.1
0.5
ms
8-133
Specifications HC-5509A1
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at TA = +25oC, Min-Max Parameters are over
Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are
specified at 600Ω 2-Wire terminating impedance. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Relay Driver Outputs
On Voltage VOL
IOL (PR) = 60mA, IOL (RD) = 30mA
-
-
0.2
0.5
V
Off Leakage Current
V
OH = 13.2V
±10
±100
µA
TTL/CMOS Logic Inputs (F0, F1, RS, TEST,
PRI)
Logic ‘0’ VIL
Logic ‘1’ VIH
-
2.0
-
-
-
-
0.8
5.5
V
V
Input Current (F0, F1, RS, TEST, PRI)
Logic Outputs
0V ≤ VIN ≤ 5V
±100
µA
Logic ‘0’ VOL
ILOAD = 800µA
-
2.7
-
0.1
0.5
V
V
Logic ‘1’ VOH
ILOAD = 40µA
-
-
-
Power Dissipation On Hook
IB+
Relay Drivers Off
200
mW
mA
mA
VB+ = +5.25V, VB- = -58V, RLOOP = ∞
VB+ = +5.25V, VB- = -58V, RLOOP = ∞
-
-
-
6
-
IB-
-6
UNCOMMITED OP AMP PARAMETERS
Input Offset Voltage
Input Offset Current
Differential Input Resistance
Output Voltage Swing
Small Signal GBW
NOTES:
-
-
-
-
-
±5
±10
1
-
-
-
-
-
mV
nA
(Note 2)
RL = 10kΩ
(Note 2)
MΩ
VP-P
MHz
±3
1
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func-
tional operability under any of these conditions is not necessarily implied.
2. May Be Extended to 1900Ω With Application Circuit.
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon
initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and spec-
ification compliance.
Pin Descriptions
DIP/SOIC
PLCC
SYMBOL
DESCRIPTION
1
2
AG
Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output
and receive input terminals.
2
3
3
4
VB+
C1
Positive Voltage Source - Most Positive Supply.
Capacitor #C1 - An external capacitor to be connected between this terminal and analog ground.
Required for proper operation of the loop current limiting function.
4
8
F1
Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to
externally select logic functions. The three selectable functions are mutually exclusive. See Truth
Table on page1. F1 should be toggled high after power is applied.
8-134
HC-5509A1
Pin Descriptions (Continued)
DIP/SOIC
PLCC
SYMBOL
DESCRIPTION
5
9
F0
Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to
externally select logic functions. The three selectable functions are mutually exclusive. See Truth
Table on page 1.
6
10
RS
Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a
positive pulse (50 - 500µs) occurs on the zero crossing of the ring voltage source, as it appears
at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative
going zero crossing and for Ring injected systems, on the positive going zero crossing. This en-
sures that the ring delay activates and deactivates when the instantaneous ring voltage is near
zero. If synchronization is not required, the pin should be tied to +5.
7
8
9
11
12
13
SHD
GKD
TST
Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output.
Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output.
A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until
the proper F1, F0 state is set and will keep ALM low. See Truth Table on page 1.
10
14
ALM
A LS TTL compatible active low output which responds to the thermal detector circuit when a safe
operating die temperature has been exceeded. When TST is forced low by an external control
signal, ALM is latched low until the proper F1, F0 state and TST input is brought high. The ALM
can be tied directly to the TST pin to power down the part when a thermal fault is detected and
then reset with F0, F1. See Truth Table on page 1. It is possible to ignore transient thermal over-
load conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be
exercised in attempting this as continued thermal overstress may reduced component life.
11
18
ILMT
Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a re-
sistive voltage divider.
12
13
14
19
20
22
OUT1
-IN1
TIP
The analog output of the spare operational amplifier.
The inverting analog input of the spare operational amplifier.
An analog input connected to the TIP (more positive) side of the subscriber loop through a feed
resistor and ring relay contact. Functions with the RING terminal to receive voice signals from
the telephone and for loop monitoring purpose.
15
16
24
25
RING
RFS
An analog input connected to the RING (more negative) side of the subscriber loop through a
feed resistor. Functions with the TIP terminal to receive voice signals from the telephone and for
loop monitoring purposes.
Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected
ringing the ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing,
the RF and RFS pins must be shorted.
17
18
19
27
31
32
VRX
LAO
VTX
Receive Input, Four Wire Side - A high impedance analog input. AC signals appearing at this in-
put drive the Tip Feed and Ring Feed amplifiers differentially.
Longitudinal Amplifier Output - A low impedance output to be connected to C2 through a low pass
filter. Output is proportional to the difference in ITIP and IRING
.
Transmit Output, Four Wire Side - A low impedance analog output which represents the differ-
ential voltage across TIP and RING. Transhybrid balancing must be performed beyond this out-
put to completely implement two to four wire conversion. This output is referenced to analog
ground. Since the D.C. level of this output varies with loop current, capacitive coupling to the next
stage is necessary.
20
21
33
34
35
PRI
PR
DG
A TTL compatible input used to control PR. PRI active High = PR active low.
An active low open collector output. Can be used to drive a Polarity Reversal Relay.
NA
Digital Ground - To be connected to zero potential - serves as reference for all digital inputs and
outputs on the SLIC.
22
36
BG
Battery Ground - Tube connected to zero potential. All loop current and some quiescent current
flows into this terminal.
8-135
HC-5509A1
Pin Descriptions (Continued)
DIP/SOIC
PLCC
SYMBOL
DESCRIPTION
23
37
RD
Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ring-
ing signals onto the 2-Wire line.
24
25
38
39
VFB
TF2
Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal
and the spare op-amp to accommodate 2W line impedance matching.
Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor.
Functions with the RF terminal to provide loop current, and to feed voice signals to the telephone
set and to sink longitudinal currents. Must be tied to TF1.
NA
26
40
41
TF1
RF1
Tie directly to TF2 in the PLCC application.
Ring Feed - A low impedance analog output connected to the RING terminal through a feed re-
sistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone
set, and to sink longitudinal currents. Tie directly to RF2.
NA
27
28
42
43
44
RF2
VB-
C2
Tie directly to RF1 in the PLCC application.
The battery voltage source. The most negative supply.
Capacitor #2 - An external capacitor to be connected between this terminal and ground. It pre-
vents false ring trip detection from occurring when longitudinal currents are induced onto the sub-
scriber loop from power lines and other noise sources. This capacitor should be nonpolarized.
1, 5, 6, 7,
15, 16,
NC
No internal connection.
17, 21,
23, 26,
28, 29, 30
NOTE:
1. All grounds (AG, BG, DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
8-136
HC-5509A1
Functional Diagram
DIP OR SOIC
-IN 1
13
VFB
24
VRX
17
OUT 1
12
VTX
19
VB
R
2R
OP AMP
+
R/2
2R
2R
RF1
SHD
TA
+
2R
THERM
LTD
25k
RTD
GKD
LA
+
25k
FAULT
DET
90k
RF2
11
VB/2
REF
GM
+
3
18
LAO
28
C2
C1
ILMT
High voltage surge conditions are as specified in Table 1.
Die Characteristics
The SLIC will withstand longitudinal currents up to a maxi-
mum or 30mArms, 15mArms per leg, without any perfor-
mance degradation
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Diode Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 x 120
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . Connected
.
TABLE 1.
TEST
CONDITION
PERFORMANCE
(MAX)
Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
o
PARAMETER
UNITS
VPEAK
VPEAK
VPEAK
VPEAK
VPEAK
VPEAK
Thermal Constants ( C/W)
θ
θ
JA
JC
Ceramic DIP . . . . . . . . . . . . . . . . . . . .
Plastic DIP. . . . . . . . . . . . . . . . . . . . . .
PLCC. . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC . . . . . . . . . . . . . . . . . . . . . . . . . .
48
51
47
72
12
21
17
22
Longitudinal
Surge
10µs Rise/
1000µs Fall
10µs Rise/
1000µs Fall
10µs Rise/
1000µs Fall
±1000 (Plastic)
±500 (Ceramic)
±1000 (Plastic)
±500 (Ceramic)
±1000 (Plastic)
±500 (Ceramic)
Metallic Surge
Overvoltage Protection and Longitudinal
Current Protection
T/GND
R/GND
The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line crosses.
50/60Hz Current
T/GND
11 Cycles
700 (Plastic)
VRMS
VRMS
R/GND
Limited to
10Arms
350 (Ceramic)
8-137
HC-5509A1
Functional Diagram (Continued)
PLCC
OUT 1
19
VRX
27
-IN 1
20
VTX
VB
VFB
38
32
R
2R
R/2
2R
2R
OP AMP
+
RF1
SHD
TA
+
2R
THERM
LTD
25k
RTD
GKD
LA
+
25k
FAULT
DET
90k
RF2
18
VB/2
REF
GM
+
44
C2
4
31
LAO
C1
ILMT
8-138
HC-5509A1
Logic Diagram
RELAY
DRIVER
THERMAL
SHUT DOWN
RMAL
T
WN
CH
INJ
A
B
C
A
B
C
KEY
NOTE: PRI is an independent switch driven by TTL input lev-
8-139
HC-5509A1
Applications Diagram
+5V
SYSTEM CONTROLLER
+5V
K1
SHD GKD PRI RS TEST F1 ALARM F0
RD
K2
R
C
S1
S1
RL2
ILIMIT
PR
K1A
TIP
TIP
VRX+
R
R
B2
B1
FROM PCM
FILTER/CODER
RL1
TF1**
TF2**
VFB
*SECONDARY
PROTECTION
C
AC
C5
VB-
SLIC
HC-5509A1
VTX
-IN1
PRIMARY
PROTECTION
KR
F
0
RF2**
RF1**
KIB
R
C
S2
S2
KZ
RFS
OUT1
LAO
TO HYBIRD
BALANCE
NETWORK
RB4
V
RING
150VPEAK(MAX)
R
B3
RING
RING
VB- BG
***
C2 DG AG VB+ C1
PTC
Z
1
CF2
C3
C4
+5V
RF1
RF2
CF1
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
TYPICAL COMPONENT VALUES
C1 = 0.5µF, 30V
KR = 20kΩ, RF = 2(R + R ), K = Scaling Factor = 100)
F
B2
B4
RF1 = RF2 = 210kΩ, 1%
RB = RB = RB = RB = 50Ω (1% absolute, matching
1
2
3
4
requirements covered in a Tech Brief)
CF1 = CF2 = 0.22µF, 10%, 20V Nonpolarized
C3 = 0.01µF, 100V, ±20%
C4 = 0.01µF, 100V, ±20%
C5 = 0.01µF, 100V, ±20%
R
= R = 1kΩ typically
S1
S2
CS1 = CS2 = 0.1µF, 200V typically, depending on V
line length.
and
Ring
Z
= 150V to 200V transient protector. PTC used as ring
1
C
= 0.5µF, 20V
AC
generator ballast.
KZ = 60kΩ, (Z = 600Ω, K = Scaling Factor = 100)
0
0
* Secondary protection diode bridge recommended is 3A, 200V
type.
RL1, RL2; Current Limit Setting Resistors:
**TF1, TF2 and RF1, RF2 are on PLCC only and should be con-
nected together as shown.
***Not Present on DIP or SOIC packages.
RL1 + RL2 > 90kΩ → offset
I
= (0.6) (RL1 + RL2)/(200 x RL2), RL1 typically 100kΩ
LIMIT
NOTES:
1. All grounds (AG, BG, & DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
2. Application shows Ring Injected Ringing, a Balanced or Tip injected configuration may be used.
Additional information is contained in Application Note 549, “The HC-550X Telephone SLICs” By Geoff Phillips
8-140
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