HC-5509B [INTERSIL]
SLIC Subscriber Line Interface Circuit; SLIC用户线路接口电路
| 型号： | HC-5509B |
| 厂家： | 
Intersil |
| 描述： | SLIC Subscriber Line Interface Circuit |
| 文件： | 总10页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HC-5509B3999-003
S E M I C O N D U C T O R
SLIC
Subscriber Line Interface Circuit
March 1996
Features
Description
• DI Monolithic High Voltage Process
The HC-5509B3999-003 telephone Subscriber Line Inter-
• Compatible with Worldwide PBX and CO Performance
Requirements
face Circuit integrates most of the BORSCHT functions on a
monolithic IC. The device is manufactured in a Dielectric Iso-
lation (DI) process and is designed for use as a high voltage
interface between the traditional telephone subscriber pair
(Tip and Ring) and the low voltage filtering and cod-
ing/decoding functions of the line card. Together with a sec-
ondary protection diode bridge and “feed” resistors, the
device will withstand 1000V lightning induced surges, in
plastic packages. The SLIC also maintains specified trans-
mission performance in the presence of externally induced
longitudinal currents. The BORSCHT functions that the SLIC
provides are:
• Controlled Supply of Battery Feed Current with Pro-
grammable Current Limit
• Operates with 5V Positive Supply (V
B+
)
• Internal Ring Relay Driver and a Utility Relay Driver
• High Impedance Mode for Subscriber Loop
• High Temperature Alarm Output
• Low Power Consumption During Standby Functions
• Switch Hook, Ground Key, and Ring Trip Detection
• Selective Power Denial to Subscriber
• Voice Path Active During Power Denial
• Battery Feed with Subscriber Loop Current Limiting
• Overvoltage Protection
• On-Chip Op Amp for 2-Wire Impedance Matching
• Ring Relay Driver
Applications
• Supervisory Signaling Functions
• Hybrid Functions (with External Op-Amp)
• Test (or Battery Reversal) Relay Driver
• Solid State Line Interface Circuit for PBX or Central
Office Systems, Digital Loop Carrier Systems
• Hotel/Motel Switching Systems
• Direct Inward Dialing (DID) Trunks
• Voice Messaging PBXs
In addition, the SLIC provides selective denial of power to
subscriber loops, a programmable subscriber loop current
limit from 20mA to 60mA, a thermal shutdown with an alarm
output and line fault protection. Switch hook detection, ring
trip detection and ground key detection functions are also
incorporated in the SLIC device.
• High Voltage 2-Wire/4-Wire, 4-Wire/2-Wire Hybrid
Ordering Information
TEMP.
RANGE ( C)
PKG.
NO.
o
The HC-5509B3999-003 SLIC is ideally suited for line card
designs in PBX and CO systems, replacing traditional
transformer solutions.
PART NUMBER
PACKAGE
HC9P5509B3999-003
0 to +75
28 Ld SOIC
M28.3
Pinout
HC-5509B3999-003 (SOIC)
TRUTH TABLE
TOP VIEW
F1
0
F0
0
ACTION
Normal Loop Feed
AG
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
BG
VB-
RF
VB+
0
1
RD Active
C
1
3
1
0
Power Down Latch RESET
Power on RESET
F1
4
TF
1
0
5
F0
RS
VFB
6
RD
DG
1
1
Loop Power
Denial Active
7
SHD
GKD
TST
8
PR
9
PRI
10
11
12
VTX
ALM
ILMT
OUT 1
C
2
VRX
RFS
RING
-IN 1 13
14
TIP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 4126
Copyright © Harris Corporation 1996
1
Specifications HC-5509B3999-003
Absolute Maximum Ratings (Note 1)
Operating Conditions
Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15V Operating Temperature Range
o
o
Maximum Supply Voltages
(V ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
HC-5509B3999-003. . . . . . . . . . . . . . . . . . . . . . . . . 0 C to +75 C
Storage Temperature Range. . . . . . . . . . . . . . . . . .-65 C to +150 C
Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to +12V
o
o
B+
(V )-(V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V
B+ B-
o
Junction Temperature Ceramic. . . . . . . . . . . . . . . . . . . . . . . +175 C
Junction Temperature Plastic . . . . . . . . . . . . . . . . . . . . . . . . +150 C
Positive Power Supply (V ) . . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%
B+
o
Negative Power Supply (V ) . . . . . . . . . . . . . . . . . . . . -42V to -58V
B-
o
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300 C
Loop Resistance (R ) . . . . . . . . . . . . . . . . . 200Ω to 1750Ω (Note 2)
L
(For SOIC - Lead Tips Only)
Thermal Information
o
Thermal Resistance (Typical)
θ
( C/W)
75
JA
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . .
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
o
Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T = +25 C, Min-Max Parameters are Over
A
Operating Temperature Range, V = -48V, V = +5V, AG = DG = BG = 0V. All AC Parameters are
B-
B+
specified at 600Ω 2-Wire Terminating Impedance.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
AC TRANSMISSION PARAMETERS
RX Input Impedance
300Hz to 3.4kHz (Note 3)
300Hz to 3.4kHz (Note 3)
-
-
100
-
20
-
kΩ
TX Output Impedance
-
-
Ω
4-Wire Input Overload Level
300Hz to 3.4kHz R = 1200Ω,
+1.5
V
PEAK
L
600Ω Reference
2-Wire Return Loss
SRL LO
Matched for 600Ω (Note 3)
26
30
30
58
35
40
40
63
-
-
-
-
dB
dB
dB
dB
ERL
SRL HI
2-Wire Longitudinal to Metallic Balance
Off Hook
Per ANSI/IEEE STD 455-1976 (Note 3)
300Hz to 3400Hz
4-Wire Longitudinal Balance
Off Hook
300Hz to 3400Hz (Note 3)
50
55
-
dB
Low Frequency Longitudinal Balance
R.E.A. Test Circuit
o
-
-
-
-
-
-
-67
23
30
dBmp
I
= 40mA T = +25 C (Note 3)
A
dBrnC
LINE
o
Longitudinal Current Capability
Insertion Loss
I
= 40mA T = +25 C (Note 3)
mA
RMS
LINE
A
0dBm at 1kHz, Referenced 600Ω
2-Wire/4-Wire
-
-
-
-
±0.05
±0.05
-
±0.2
±0.2
dB
4-Wire/2-Wire
dB
dB
dB
4-Wire/4-Wire
±0.2
Frequency Response
300Hz to 3400Hz (Note 3) Referenced to
Absolute Level at 1kHz, 0dBm Referenced
600Ω7
±0.02
±0.05
Level Linearity
Referenced to -10dBm (Note 3)
+3 to -40dBm
2-Wire to 4-Wire and 4-Wire to 2-Wire
-
-
-
-
-
-
±0.05
±0.1
±0.3
dB
dB
dB
-40 to -50dBm
-50 to -55dBm
2
Specifications HC-5509B3999-003
o
Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T = +25 C, Min-Max Parameters are Over
A
Operating Temperature Range, V = -48V, V = +5V, AG = DG = BG = 0V. All AC Parameters are
B- B+
specified at 600Ω 2-Wire Terminating Impedance. (Continued)
PARAMETER
TEST CONDITIONS
(Note 3)
MIN
TYP
MAX
UNITS
Absolute Delay
2-Wire/4-Wire
4-Wire/2-Wire
4-Wire/4-Wire
300Hz to 3400Hz
300Hz to 3400Hz
300Hz to 3400Hz
-
-
-
-
1
1
µs
µs
µs
dB
dB
-
-
1.5
-
Transhybrid Loss, THL
(Note 3) See Figure 1, V = 1V
IN
at 1kHz
32
-
40
-
P-P
Total Harmonic Distortion
Reference Level 0dBm at 600Ω
-52
2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire
300Hz to 3400Hz (Note 3)
Idle Channel Noise
2-Wire and 4-Wire
(Note 3)
C-Message
Psophometric
3kHz Flat
(Note 3)
-
-
-
-
-
-
5
dBrnC
dBmp
dBrn
-85
15
Power Supply Rejection Ratio
30Hz to 200Hz, R = 600Ω
L
V
V
V
V
V
V
V
V
to 2-Wire
to 4-Wire
to 2-Wire
to 4-Wire
to 4-Wire
to 2-Wire
to 4-Wire
to 4-Wire
20
20
20
20
30
30
20
20
50
29
29
29
29
-
-
dB
dB
dB
dB
dB
dB
dB
dB
µs
B+
B+
B-
B-
B+
B-
B-
B-
-
-
-
(Note 3)
-
200Hz to 16kHz, R = 600Ω
L
-
-
25
25
-
-
-
Ring Sync Pulse Width
DC PARAMETERS
500
Loop Current Programming
Limit Range
20
10
-
40
-
60
-
mA
%
Accuracy
Loop Current During Power Denial
Fault Currents
R = 200Ω
±3
±5
mA
L
TIP to Ground
-
-
30
60
90
12
10
-
-
-
mA
mA
mA
mA
mA
RING to Ground
TIP and RING to Ground
Switch Hook Detection Threshold
Ground Key Detection Threshold
Thermal ALARM Output
-
-
9.0
14.5
140
15
25.5
160
o
Safe Operating Die Temperature Exceeded
C
3
Specifications HC-5509B3999-003
o
Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T = +25 C, Min-Max Parameters are Over
A
Operating Temperature Range, V = -48V, V = +5V, AG = DG = BG = 0V. All AC Parameters are
B- B+
specified at 600Ω 2-Wire Terminating Impedance. (Continued)
PARAMETER
Ring Trip Detection Threshold
Ring Trip Detection Period
Dial Pulse Distortion
TEST CONDITIONS
MIN
TYP
10
MAX
-
UNITS
mA
V
= 105V
, f
RMS RING
= 20Hz
-
-
-
RING
100
0.1
150
0.5
ms
ms
Relay Driver Outputs
On Voltage V
OL
I
(PR) = 60mA, I (RD) = 30mA
OL
-
-
0.2
0.5
V
OL
Off Leakage Current
V
= 13.2V
±10
±100
µA
OH
TTL/CMOS Logic Inputs (F0, F1, RS, TEST, PRI)
Logic ‘0’ V
Logic ‘1’ V
-
2.0
-
-
-
-
0.8
5.5
V
V
IL
IH
Input Current (F0, F1, RS, TEST, PRI)
Logic Outputs
0V ≤ V ≤ 5V
IN
±100
µA
Logic ‘0’ V
Logic ‘1’ V
I
I
= 800µA
= 40µA
-
2.7
-
0.1
0.5
V
V
OL
LOAD
-
-
-
OH
LOAD
Power Dissipation On Hook
Relay Drivers Off
200
mW
mA
mA
I
V
V
= +5.25V, V = -58V, R
= ∞
= ∞
-
-
-
6
-
B+
B+
B+
B-
LOOP
I
= +5.25V, V - = -58V, R
B
-6
B-
LOOP
UNCOMMITED OP AMP PARAMETERS
Input Offset Voltage
-
-
-
-
-
±5
±10
1
-
-
-
-
-
mV
nA
Input Offset Current
Differential Input Resistance
Output Voltage Swing
Small Signal GBW
(Note 3)
MΩ
R = 10kΩ
±3
1
V
L
P-P
(Note 3)
MHz
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired.
Functional operability under any of these conditions is not necessarily implied.
2. May Be Extended to 1900Ω With Application Circuit.
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon
initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and
specification compliance.
4
HC-5509B3999-003
Pin Descriptions
SOIC
SYMBOL
DESCRIPTION
1
AG
Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive
input terminals.
2
3
VB+
Positive Voltage Source - most positive supply.
C
Capacitor #C - An external capacitor to be connected between this terminal and analog ground. Required for
1
1
proper operation of the loop current limiting function.
4
F1
Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally se-
lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on page1. F1 should
be toggled high after power is applied.
5
6
F0
Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally se-
lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on page 1.
RS
Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse
(50 - 500µs) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip
side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected
systems, on the positive going zero crossing. This ensures that the ring delay activates and deactivates when
the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5.
7
8
9
SHD
GKD
TST
Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output.
Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output.
A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper
F1, F0 state is set and will keep ALM low. See Truth Table on page 1.
10
ALM
A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating
die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low
until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to
power down the part when a thermal fault is detected and then reset with F0, F1. See Truth Table on page 1.
It is possible to ignore transient thermal overload conditions in the SLIC by delaying the response to the TST
pin from the ALM. Care must be exercised in attempting this as continued thermal overstress may reduced
component life.
11
I
Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage
divider.
LMT
12
13
14
OUT1
-IN1
TIP
The analog output of the spare operational amplifier.
The inverting analog input of the spare operational amplifier.
An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and
ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop
monitoring purpose.
15
16
RING
RFS
An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor.
Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes.
Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the
ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins
must be shorted.
17
18
VRX
Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip
Feed and Ring Feed amplifiers differentially.
C
Capacitor #C - An external capacitor to be connected between this terminal and ground. It prevents false ring
2
2
trip detection from occurring when longitudinal currents are induced onto the subscriber loop from power lines
and other noise sources. This capacitor should be nonpolarized.
19
VTX
Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across
TIP and RING. Transhybrid balancing must be performed beyond this output to completely implement 2-Wire
to 4-Wire conversion. This output is referenced to analog ground. Since the DC level of this output varies with
loop current, capacitive coupling to the next stage is necessary.
5
HC-5509B3999-003
Pin Descriptions (Continued)
SOIC
20
SYMBOL
PRI
DESCRIPTION
A TTL compatible input used to control PR. PRI active High = PR active low.
An active low open collector output. Can be used to drive a Polarity Reversal Relay.
21
PR
22
DG
Digital Ground - To be connected to zero potential. Serves as a reference for all digital inputs and outputs on
the SLIC.
23
24
25
RD
Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ringing signals onto
the 2-Wire line.
VFB
Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal and the spare
op amp to accommodate 2-Wire line impedance matching.
TF
Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor. Functions
with the RF terminal to provide loop current, and to feed voice signals to the telephone set and to sink longitu-
2
dinal currents. Must be tied to TF .
1
NA
26
TF
Tie directly to TF in the PLCC application.
2
1
RF
RF
Ring Feed - A low impedance analog output connected to the RING terminal through a feed resistor. Functions
with the TF terminal to provide loop current, feed voice signals to the telephone set, and to sink longitudinal
1
currents. Tie directly to RF .
2
NA
27
28
Tie directly to RF in the PLCC application.
1
2
VB-
BG
The battery voltage source. The most negative supply.
Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this
ground terminal.
NC
No internal connection.
NOTE:
1. All grounds (AG, BG, DG) must be applied before V or V . Failure to do so may result in premature failure of the part. If a user wishes
B+ B-
to run separate grounds off a line card, the AG must be applied first.
6
HC-5509B3999-003
Functional Diagram
SOIC
R
-IN 1
VRX
17
OUT 1
12
VFB
24
VTX
19
DG
AG
VB+
13
2
22
1
R
28
27
25
-
BG
TF
TF
2R
-
+
+
OP AMP
BIAS
NETWORK
R/2
2R
2R
VB-
RF
1
4
5
R
R
R
F1
F0
RS
-
SHD
TA
SW
14
6
TIP
+
R
2R
THERM
LTD
TSD
9
TST
PRI
4.5k
20
21
23
7
25k
100k
100k
100k
100k
RTD
GKD
15
GK
PR
RING
RFS
-
90k
LA
+
RD
25k
16
FAULT
DET
SHD
GKD
ALM
4.5k
8
90k
90k
RFC
10
-
26
90k
-
RF
RF
RF
11
2
VB/2
REF
+
GM
+
R = 108kΩ
18
3
C
C
2
I
1
LMT
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Diode Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .174 x 120
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Connected
Process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
TABLE 1.
TEST
PERFOR-
PARAMETER
CONDITION MANCE (MAX) UNITS
Longitudinal Surge
10µs Rise/
1000µs Fall
±1000 (Plastic)
±1000 (Plastic)
±1000 (Plastic)
700 (Plastic)
V
V
V
PEAK
PEAK
PEAK
Overvoltage Protection and Longitudinal
Current Protection
Metallic Surge
10µs Rise/
1000µs Fall
T/GND
R/GND
10µs Rise/
1000µs Fall
The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line crosses.
50/60Hz Current
T/GND
11 Cycles
Limited to
V
RMS
R/GND
10A
High voltage surge conditions are as specified in Table 1.
The SLIC will withstand longitudinal currents up to a
RMS
maximum or 30mA
, 15mA per leg, without any
RMS
RMS
performance degradation.
7
HC-5509B3999-003
Logic Diagram
RS
2
TTL TO I L
RELAY
DRIVER
RD
2
TTL TO I L
F0
2
I L TO TTL
GKD
GK
2
I L TO TTL
SHD
THERMAL
SHUT DOWN
2
I L TO TTL
2
TTL TO I L
ALM
F1
PD
SH
THERMAL
SHUT
DOWN
TO BIAS
NETWORK
2
LATCH
TTL TO I L
TEST
INJ
A
B
C
A
B
C
KEY
8
HC-5509B3999-003
Applications Diagram
+5V
SYSTEM CONTROLLER
+5V
K
1
SHD GKD PRI RS TEST F1 ALARM F0
RD
K
R
C
S1
2
S1
K
R
L2
I
LIMIT
PR
1A
TIP
TIP
VRX+
VFB
R
R
B2
B1
FROM PCM
FILTER/CODER
R
L1
SECONDARY
PROTECTION
(NOTE 3)
C
AC
C
5
VB-
SLIC
HC-5509B3999-003
VTX
-IN1
PRIMARY
PROTECTION
K
RF
K
IB
R
C
S2
K
Z0
S2
RFS
OUT1
TO HYBRID
BALANCE
NETWORK
R
(MAX)
V
B4
RING
R
B3
150V
PEAK
RING
RING
VB- BG
C
DG AG VB+ C
2 1
PTC
Z
1
C
C
4
3
+5V
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
TYPICAL COMPONENT VALUES
R
I
+ R > 90kΩ → offset
L2
L1
= (0.6) (R + R )/(200 x R ), R typically 100kΩ
L1 L2 L2 L1
C = 0.5µF, 30V
LIMIT
1
K
= 20kΩ, RF = 2(R + R ), K = Scaling Factor = 100)
B2 B4
C = 0.5µF-1.0µF ±10%, 20V (Should be nonpolarized)
RF
2
R
= R
= R
= R = 50Ω (1% absolute, matching
C = 0.01µF, 100V, ±20%
B1
B2
B3
B4
3
requirements covered in a Tech Brief)
C = 0.01µF, 100V, ±20%
4
R
C
= R = 1kΩ typically
S2
S1
C = 0.01µF, 100V, ±20%
5
= C = 0.1µF, 200V typically, depending on V
and
S1
S2 Ring
C
= 0.5µF, 20V
AC
KZ = 60kΩ, (Z = 600Ω, K = Scaling Factor = 100)
line length.
0
0
Z
= 150V to 200V transient protector. PTC used as ring
1
R
, R ; Current Limit Setting Resistors:
L1 L2
generator ballast.
NOTES:
1. All grounds (AG, BG, & DG) must be applied before V + or V -. Failure to do so may result in premature failure of the part. If a user wishes
B
B
to run separate grounds off a line card, the AG must be applied first.
2. Application shows Ring Injected Ringing, a Balanced or Tip injected configuration may be used.
3. Secondary protection diode bridge recommended is 3A, 200V type.
Additional information is contained in Application Note 549, “The HC-550X Telephone SLICs” By Geoff Phillips
9
HC-5509B3999-003
Small Outline Plastic Packages (SOIC)
M28.3 (JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
M
M
B
0.25(0.010)
H
INCHES MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
MAX
2.65
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
-
0.30
-
1
2
3
L
0.51
9
SEATING PLANE
A
0.0091
0.6969
0.2914
0.32
-
-A-
0.7125 17.70
18.10
7.60
3
o
D
h x 45
0.2992
7.40
4
-C-
0.05 BSC
1.27 BSC
-
α
H
h
0.394
0.01
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
0.016
6
M
M
S
B
0.25(0.010)
C
A
N
α
28
28
7
o
o
o
o
0
8
0
8
-
NOTES:
Rev. 0 12/93
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
Sales Office Headquarters
For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS
NORTH AMERICA
EUROPE
ASIA
Harris Semiconductor
P. O. Box 883, Mail Stop 53-210
Melbourne, FL 32902
TEL: 1-800-442-7747
(407) 729-4984
Harris Semiconductor
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
Harris Semiconductor PTE Ltd.
No. 1 Tannery Road
Cencon 1, #09-01
Singapore 1334
TEL: (65) 748-4200
FAX: (65) 748-0400
FAX: (407) 729-5321
S E M I C O N D U C T O R
10
相关型号：
©2020 ICPDF网 联系我们和版权申明