IRFS7440TRLPBF [INFINEON]

Applications; 应用
IRFS7440TRLPBF
型号: IRFS7440TRLPBF
厂家: Infineon    Infineon
描述:

Applications
应用

晶体 晶体管 开关 脉冲
文件: 总11页 (文件大小:326K)
中文:  中文翻译
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StrongIRFET™  
IRFS7440PbF  
IRFSL7440PbF  
Applications  
l Brushed Motor drive applications  
l BLDC Motor drive applications  
l Battery powered circuits  
l Half-bridge and full-bridge topologies  
l Synchronous rectifier applications  
l Resonant mode power supplies  
l OR-ing and redundant power switches  
l DC/DC and AC/DC converters  
l DC/AC Inverters  
HEXFET® Power MOSFET  
D
VDSS  
40V  
RDS(on) typ.  
2.0m  
2.5m  
208A  
max.  
G
ID  
S
ID  
120A  
(Package Limited)  
D
D
Benefits  
l Improved Gate, Avalanche and Dynamic dV/dt  
Ruggedness  
l Fully Characterized Capacitance and Avalanche  
SOA  
l Enhanced body diode dV/dt and dI/dt Capability  
l Lead-Free  
S
S
D
G
G
D2Pak  
TO-262  
IRFS7440PbF  
IRFSL7440PbF  
l RoHS Compliant containing no Lead, no Bromide,  
and no Halogen  
G
Gate  
D
Drain  
S
Source  
Ordering Information  
Base Part Number  
Package Type  
Standard Pack  
Complete Part Number  
Form  
Quantity  
IRFS7440PbF  
IRFS7440PbF  
IRFSL7440PbF  
D2-Pak  
D2-Pak  
TO-262  
Tube  
Tape and Reel Left  
Tube  
50  
800  
50  
IRFS7440PbF  
IRFS7440TRLPbF  
IRFSL7440PbF  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
240  
200  
160  
120  
80  
I
= 100A  
D
Limited By Package  
T
= 125°C  
J
40  
T
= 25°C  
J
0
4
6
8
10 12 14  
16 18 20  
25  
50  
75  
100  
125  
150  
175  
T
, Case Temperature (°C)  
C
V
Gate -to -Source Voltage (V)  
GS,  
Fig 2. Maximum Drain Current vs. Case Temperature  
Fig 1. Typical On-Resistance vs. Gate Voltage  
www.irf.com  
1
October 10, 2012  
IRFS/SL7440PbF  
Absolute Maximum Ratings  
Symbol  
Parameter  
Max.  
208  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
ID @ TC = 25°C  
IDM  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)  
Pulsed Drain Current  
147  
A
120  
772  
208  
PD @TC = 25°C  
Maximum Power Dissipation  
W
1.4  
Linear Derating Factor  
W/°C  
V
± 20  
VGS  
TJ  
Gate-to-Source Voltage  
-55 to + 175  
Operating Junction and  
°C  
TSTG  
Storage Temperature Range  
300  
Soldering Temperature, for 10 seconds (1.6mm from case)  
Avalanche Characteristics  
EAS (Thermally limited)  
Single Pulse Avalanche Energy  
238  
298  
mJ  
EAS (tested)  
IAR  
Single Pulse Avalanche Energy Tested Value  
Avalanche Current  
See Fig. 14, 15, 22a, 22b  
A
Repetitive Avalanche Energy  
EAR  
mJ  
Thermal Resistance  
Symbol  
Parameter  
Typ.  
–––  
–––  
Max.  
0.72  
40  
Units  
R  
R  
Junction-to-Case  
JC  
°C/W  
Junction-to-Ambient (PCB Mount)  
JA  
Static @ TJ = 25°C (unless otherwise specified)  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
40  
–––  
–––  
V
VGS = 0V, ID = 250μA  
V(BR)DSS/TJ  
RDS(on)  
––– 0.035 –––  
V/°C Reference to 25°C, ID = 5.0mA  
mVGS = 10V, ID = 100A  
mVGS = 6.0V, ID = 50A  
–––  
–––  
2.2  
2.0  
3.0  
2.5  
–––  
3.9  
VGS(th)  
IDSS  
Gate Threshold Voltage  
3.0  
V
VDS = VGS, ID = 100μA  
Drain-to-Source Leakage Current  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
2.6  
1.0  
μA VDS = 40V, VGS = 0V  
150  
100  
-100  
–––  
V
DS = 40V, VGS = 0V, TJ = 125°C  
IGSS  
RG  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Internal Gate Resistance  
nA VGS = 20V  
VGS = -20V  
Notes:  
 Calculated continuous current based on maximum allowable junction  
temperature. Bond wire current limit is 120A. Note that current  
limitations arising from heating of the device leads may occur with  
Pulse width 400μs; duty cycle 2%.  
† Coss eff. (TR) is a fixed capacitance that gives the same charging time  
as Coss while VDS is rising from 0 to 80% VDSS  
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as  
.
some lead mounting arrangements. (Refer to AN-1140)  
‚ Repetitive rating; pulse width limited by max. junction  
temperature.  
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.048mH  
RG = 50, IAS = 100A, VGS =10V.  
Coss while VDS is rising from 0 to 80% VDSS  
.
ˆ Ris measured at TJ approximately 90°C.  
‰ This value determined from sample failure population,  
starting TJ = 25°C, L= 0.048mH, RG = 50, IAS = 100A, VGS =10V.  
„ ISD 100A, di/dt 1330A/μs, VDD V(BR)DSS, TJ 175°C.  
2
www.irf.com  
October 10, 2012  
IRFS/SL7440PbF  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
gfs  
Qg  
Forward Transconductance  
88  
–––  
–––  
135  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
S
VDS = 10V, ID = 100A  
Total Gate Charge  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
90  
nC ID = 100A  
VDS =20V  
Qgs  
Qgd  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Total Gate Charge Sync. (Qg - Qgd)  
Turn-On Delay Time  
23  
32  
VGS = 10V  
Qsync  
td(on)  
tr  
58  
ID = 100A, VDS =0V, VGS = 10V  
24  
ns VDD = 20V  
ID = 30A  
Rise Time  
68  
td(off)  
tf  
Turn-Off Delay Time  
115  
68  
RG = 2.7  
VGS = 10V  
Fall Time  
Ciss  
Coss  
Crss  
Input Capacitance  
4730  
680  
460  
845  
980  
pF VGS = 0V  
Output Capacitance  
VDS = 25V  
Reverse Transfer Capacitance  
Effective Output Capacitance (Energy Related)  
Effective Output Capacitance (Time Related)  
ƒ = 1.0 MHz  
C
oss eff. (ER)  
VGS = 0V, VDS = 0V to 32V  
VGS = 0V, VDS = 0V to 32V  
Coss eff. (TR)  
Diode Characteristics  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
D
S
IS  
Continuous Source Current  
–––  
–––  
193  
A
A
V
MOSFET symbol  
(Body Diode)  
Pulsed Source Current  
showing the  
integral reverse  
G
ISM  
–––  
–––  
772  
(Body Diode)  
p-n junction diode.  
TJ = 25°C, IS = 100A, VGS = 0V  
VSD  
Diode Forward Voltage  
Peak Diode Recovery  
Reverse Recovery Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
0.9  
6.8  
24  
28  
17  
20  
1.3  
1.3  
–––  
–––  
–––  
–––  
–––  
–––  
dv/dt  
trr  
V/ns TJ = 175°C, IS = 100A, VDS = 40V  
ns TJ = 25°C  
TJ = 125°C  
VR = 34V,  
IF = 100A  
di/dt = 100A/μs  
Qrr  
Reverse Recovery Charge  
Reverse Recovery Current  
nC TJ = 25°C  
TJ = 125°C  
IRRM  
A
TJ = 25°C  
www.irf.com  
3
October 10, 2012  
IRFS/SL7440PbF  
1000  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
VGS  
15V  
TOP  
TOP  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
100  
10  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
1
60μs PULSE WIDTH  
Tj = 25°C  
60μs PULSE WIDTH  
Tj = 175°C  
0.1  
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 3. Typical Output Characteristics  
Fig 4. Typical Output Characteristics  
1000  
100  
10  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
I
= 100A  
= 10V  
D
V
GS  
T
= 175°C  
J
T
= 25°C  
J
V
= 10V  
DS  
60μs PULSE WIDTH  
1.0  
3
4
5
6
7
8
9
-60 -40 -20 0 20 40 60 80 100120140160180  
, Junction Temperature (°C)  
T
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 6. Normalized On-Resistance vs. Temperature  
Fig 5. Typical Transfer Characteristics  
100000  
10000  
1000  
14.0  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I = 100A  
D
C
C
C
+ C , C  
SHORTED  
iss  
gs  
gd  
ds  
12.0  
= C  
rss  
oss  
gd  
= C + C  
V
= 32V  
= 20V  
DS  
ds  
gd  
V
10.0  
8.0  
6.0  
4.0  
2.0  
0.0  
DS  
C
C
iss  
oss  
rss  
C
100  
1
10  
, Drain-to-Source Voltage (V)  
100  
0
20  
40  
60  
80  
100  
120  
V
Q , Total Gate Charge (nC)  
DS  
G
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage  
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage  
4
www.irf.com  
October 10, 2012  
IRFS/SL7440PbF  
1000  
100  
10  
10000  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
T
= 175°C  
J
100μsec  
1msec  
Limited by  
package  
T
= 25°C  
J
10msec  
DC  
1
1
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
GS  
0.1  
0.1  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
0.1  
1
10  
100  
V
, Source-to-Drain Voltage (V)  
V
, Drain-to-Source Voltage (V)  
SD  
DS  
Fig 10. Maximum Safe Operating Area  
Fig 9. Typical Source-Drain Diode  
Forward Voltage  
0.8  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
Id = 5.0mA  
V
= 0V to 32V  
DS  
0.6  
0.4  
0.2  
0.0  
0
5
10 15 20 25 30 35 40 45  
Drain-to-Source Voltage (V)  
-60 -40 -20 0 20 40 60 80 100120140160180  
, Temperature ( °C )  
T
J
V
DS,  
Fig 11. Drain-to-Source Breakdown Voltage  
Fig 12. Typical COSS Stored Energy  
40  
V
V
V
V
V
= 5.5V  
GS  
= 6.0V  
= 7.0V  
= 8.0V  
=10V  
GS  
GS  
GS  
GS  
30  
20  
10  
0
0
100 200 300 400 500 600 700 800  
I , Drain Current (A)  
D
Fig 13. Typical On-Resistance vs. Drain Current  
www.irf.com  
5
October 10, 2012  
IRFS/SL7440PbF  
1
D = 0.50  
0.20  
0.1  
0.10  
0.05  
0.02  
0.01  
0.01  
Notes:  
SINGLE PULSE  
( THERMAL RESPONSE )  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 150°C and  
Tstart =25°C (Single Pulse)  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming  j = 25°C and  
Tstart = 150°C.  
1
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 15. Typical Avalanche Current vs.Pulsewidth  
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of Tjmax. This is validated for every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.  
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as  
25°C in Figure 14, 15).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
250  
200  
150  
100  
50  
TOP  
BOTTOM 1.0% Duty Cycle  
= 100A  
Single Pulse  
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
Iav = 2DT/ [1.3·BV·Zth]  
0
25  
50  
75  
100  
125  
150  
175  
EAS (AR) = PD (ave)·tav  
Starting T , Junction Temperature (°C)  
J
Fig 16. Maximum Avalanche Energy vs. Temperature  
6
www.irf.com  
October 10, 2012  
IRFS/SL7440PbF  
5.0  
4.0  
3.0  
2.0  
1.0  
8
7
6
5
4
3
2
1
I = 60A  
F
V
= 34V  
R
T = 25°C  
J
T = 125°C  
J
I
I
I
= 100μA  
= 1.0mA  
= 1.0A  
D
D
D
0
200  
400  
600  
800  
1000  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T , Temperature ( °C )  
di /dt (A/μs)  
F
J
Fig. 18 - Typical Recovery Current vs. dif/dt  
Fig 17. Threshold Voltage vs. Temperature  
8
110  
I = 100A  
F
I = 60A  
F
7
100  
V
= 34V  
V
= 34V  
R
R
T = 25°C  
T = 25°C  
J
J
6
5
4
3
2
1
90  
80  
70  
60  
50  
40  
T = 125°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di /dt (A/μs)  
di /dt (A/μs)  
F
F
Fig. 19 - Typical Recovery Current vs. dif/dt  
Fig. 20 - Typical Stored Charge vs. dif/dt  
100  
I = 100A  
F
V
= 34V  
R
80  
60  
40  
20  
0
T = 25°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
di /dt (A/μs)  
F
Fig. 21 - Typical Stored Charge vs. dif/dt  
www.irf.com  
7
October 10, 2012  
IRFS/SL7440PbF  
Driver Gate Drive  
P.W.  
P.W.  
Period  
D.U.T  
Period  
D =  
+
ƒ
-
*
=10V  
V
GS  
Circuit Layout Considerations  
 Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
-
+
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
VDD  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor Current  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
VGS  
0.01  
t
p
I
AS  
Fig 22b. Unclamped Inductive Waveforms  
Fig 22a. Unclamped Inductive Test Circuit  
RD  
VDS  
V
DS  
90%  
VGS  
D.U.T.  
RG  
+
VDD  
-
VGS  
10%  
Pulse Width µs  
Duty Factor   
V
GS  
t
t
r
t
t
f
d(on)  
d(off)  
Fig 23a. Switching Time Test Circuit  
Fig 23b. Switching Time Waveforms  
Id  
Current Regulator  
Same Type as D.U.T.  
Vds  
Vgs  
50K  
.2F  
12V  
.3F  
+
V
DS  
D.U.T.  
-
Vgs(th)  
V
GS  
3mA  
I
I
D
G
Qgs1  
Qgs2  
Qgd  
Qgodr  
Current Sampling Resistors  
Fig 24a. Gate Charge Test Circuit  
Fig 24b. Gate Charge Waveform  
8
www.irf.com  
October 10, 2012  
IRFS/SL7440PbF  
D2Pak (TO-263AB) Package Outline  
Dimensions are shown in millimeters (inches)  
D2Pak (TO-263AB) Part Marking Information  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
www.irf.com  
9
October 10, 2012  
IRFS/SL7440PbF  
TO-262 Package Outline  
Dimensions are shown in millimeters (inches)  
TO-262 Part Marking Information  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
10  
www.irf.com  
October 10, 2012  
IRFS/SL7440PbF  
D2Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches)  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
1.50 (.059)  
4.10 (.161)  
3.90 (.153)  
0.368 (.0145)  
0.342 (.0135)  
FEED DIRECTION  
TRL  
11.60 (.457)  
11.40 (.449)  
1.85 (.073)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS TO EIA-418.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION MEASURED @ HUB.  
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/  
Qualification information  
Qualification level  
Industrial††  
(per JEDEC JESD47F††† guidelines)  
Moisture Sensitivity Level  
RoHS compliant  
D2Pak  
TO-262  
MS L1  
†††  
(per JEDEC J-S TD-020D  
Not applicable  
)
Yes  
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/  
†† Higher qualification ratings may be available should the user have such requirements. Please contact your  
International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/  
††† Applicable version of JEDEC standard at the time of product release.  
Data and specifications subject to change without notice.  
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information. 10/2012  
www.irf.com  
11  
October 10, 2012  

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