IRFS7534TRL7PP [INFINEON]
Power Field-Effect Transistor;型号: | IRFS7534TRL7PP |
厂家: | Infineon |
描述: | Power Field-Effect Transistor 开关 脉冲 晶体管 |
文件: | 总11页 (文件大小:309K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
StrongIRFET™
IRFS7534-7PPbF
HEXFET® Power MOSFET
Application
Brushed motor drive applications
BLDC motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC inverters
VDSS
RDS(on) typ.
max
60V
1.60m
1.95m
255A
ID (Silicon Limited)
ID (Package Limited)
240A
Benefits
Improved gate, avalanche and dynamic dV/dt ruggedness
Fully characterized capacitance and avalanche SOA
Enhanced body diode dV/dt and dI/dt capability
Lead-free, RoHS compliant
G
D
S
Gate
Drain
Source
Base Part Number
Package Type
Standard Pack
Complete Part Number
Form
Tube
Quantity
50
IRFS7534-7PPbF
IRFS7534TRL7PP
IRFS7534-7PPbF
D2Pak-7PIN
Tape and Reel Left
800
8
6
4
2
0
300
250
200
150
100
50
I
= 100A
D
Limited By Package
T
J
= 125°C
J
T
= 25°C
0
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
175
T
, Case Temperature (°C)
C
V
Gate -to -Source Voltage (V)
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
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IRFS7534-7PPbF
Absolute Maximum Rating
Symbol
Parameter
Max.
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
255
180
240
790
290
2.0
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
PD @TC = 25°C
Maximum Power Dissipation
W
W/°C
V
Linear Derating Factor
VGS
Gate-to-Source Voltage
± 20
TJ
TSTG
Operating Junction and
Storage Temperature Range
-55 to + 175
300
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
Symbol
Max
370
535
Units
Parameter
EAS (Thermally limited)
mJ
Single Pulse Avalanche Energy
EAS (tested)
IAR
Single Pulse Avalanche Energy Tested Value
Avalanche Current
A
mJ
See Fig 15, 16, 23a, 23b
EAR
Repetitive Avalanche Energy
Thermal Resistance
Symbol
Parameter
Typ.
Max.
Units
Junction-to-Case
–––
0.51
RJC
RJA
°C/W
Junction-to-Ambient
–––
40
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
60
––– –––
V
VGS = 0V, ID = 250µA
–––
46 ––– mV/°C Reference to 25°C, ID = 1mA
V(BR)DSS/TJ
RDS(on)
––– 1.60 1.95
––– 2.00 –––
VGS = 10V, ID = 100A
VGS = 6.0V, ID = 50A
VDS = VGS, ID = 250µA
m
V
VGS(th)
IDSS
Gate Threshold Voltage
2.1
–––
–––
–––
–––
–––
–––
–––
3.7
1.0
Drain-to-Source Leakage Current
µA VDS = 60V, VGS = 0V
––– 150
––– 100
––– -100
VDS = 60V,VGS = 0V,TJ =125°C
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
nA VGS = 20V
V
GS = -20V
1.9
–––
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A.
Note that current limitations arising from heating of the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 74µH, RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 1240A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
.
R is measured at TJ approximately 90°C.
This value determined from sample failure population, starting TJ =25°C, L= 74µH, RG = 50, IAS =100A, VGS =10V.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994.please refer to application note to AN-994:
http://www.irf.com/technical-info/appnotes/an-994.pdf
2
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IRFS7534-7PPbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 10V, ID =100A
ID = 100A
190 ––– –––
––– 200 300
S
Qg
Qgs
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
–––
–––
50
59
–––
–––
VDS = 30V
nC
Qgd
VGS = 10V
Qsync
td(on)
tr
––– 141 –––
––– 140 –––
––– 120 –––
VDD = 30V
ID = 100A
Rise Time
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
––– 195 –––
RG= 2.7
VGS = 10V
–––
86
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 9990 –––
––– 915 –––
––– 590 –––
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
pF
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 900 –––
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Coss eff.(TR) Output Capacitance (Time Related)
––– 1150 –––
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
––– ––– 255
A
––– ––– 790
G
ISM
S
VSD
Diode Forward Voltage
––– –––
1.2
V
TJ = 25°C,IS = 100A,VGS = 0V
dv/dt
Peak Diode Recovery dv/dt
–––
–––
–––
–––
–––
–––
9.4
45
48
64
78
2.4
––– V/ns TJ = 175°C,IS =100A,VDS = 60V
–––
–––
–––
–––
–––
TJ = 25°C
VDD = 51V
IF = 100A,
trr
Reverse Recovery Time
ns
TJ = 125°C
TJ = 25°C di/dt = 100A/µs
Qrr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
TJ = 125°C
IRRM
TJ = 25°C
3
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IRFS7534-7PPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
1
4.5V
4.5V
0.1
0.01
60µs PULSE WIDTH
Tj = 175°C
60µs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 100A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60µs PULSE WIDTH
0.1
2.0
3.0
4.0
5.0 6.0 7.0 8.0
-60 -40 -20
T
0
20 40 60 80 100120140160180
V
, Gate-to-Source Voltage (V)
, Junction Temperature (°C)
GS
J
Fig 5. Typical Transfer Characteristics
Fig 6. Normalized On-Resistance vs. Temperature
14.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 100A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
12.0
= C
rss
oss
gd
V
V
V
= 48V
= 30V
= 12V
DS
DS
DS
= C + C
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
oss
C
rss
100
0
50
100
150
200
250
1
10
, Drain-to-Source Voltage (V)
100
Q , Total Gate Charge (nC)
G
V
DS
Fig 7. Typical Capacitance vs.
Fig 8. Typical Gate Charge vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
4
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IRFS7534-7PPbF
1000
100
10
100µsec
1msec
T
= 175°C
100
10
1
J
Limited by
package
OPERATION
IN THIS
T
= 25°C
J
AREA
LIMITED BY
R
(on)
DS
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
, Source-to-Drain Voltage (V)
0.1
1
10
V
V
, Drain-toSource Voltage (V)
SD
DS
Fig 9. Typical Source-Drain Diode Forward Voltage
Fig 10. Maximum Safe Operating Area
1.6
1.2
0.8
0.4
0.0
78
Id = 1.0mA
76
74
72
70
68
66
64
-10
0
10
20
30
40
50
60
-60 -40 -20
0
20 40 60 80 100120140160180
, Temperature ( °C )
T
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
4.0
Vgs = 5.5V
Vgs = 6.0V
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
3.5
3.0
2.5
2.0
1.5
0
20 40 60 80 100 120 140 160 180 200
, Drain Current (A)
I
D
Fig 13. Typical On-Resistance vs. Drain Current
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IRFS7534-7PPbF
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
Fig 15. Avalanche Current vs. Pulse width
400
300
200
100
0
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
TOP
BOTTOM 1.0% Duty Cycle
= 100A
Single Pulse
I
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
J
I
av = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)· av
t
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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IRFS7534-7PPbF
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
15
10
5
I
= 60A
= 51V
F
V
R
T = 25°C
J
T = 125°C
J
I
I
I
= 250µA
= 1.0mA
= 1.0A
D
D
D
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
400
600
800
1000
T
, Temperature ( °C )
di /dt (A/µs)
J
F
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
20
400
300
200
100
0
I
= 100A
= 51V
I
= 60A
= 51V
F
F
V
V
R
R
T = 25°C
J
T = 125°C
J
T = 25°C
J
T = 125°C
J
15
10
5
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
400
I
= 100A
= 51V
F
V
R
T = 25°C
J
T = 125°C
J
300
200
100
0
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
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IRFS7534-7PPbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
20V
I
0.01
t
p
AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
8
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IRFS7534-7PPbF
D2Pak-7Pin Package Outline (Dimensions are shown in millimeters (inches))
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRFS7534-7PPbF
D2Pak-7Pin Part Marking Information
D2Pak-7Pin Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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November 27, 2013
IRFS7534-7PPbF
Qualification Information†
Qualification Level
Industrial
(per JEDEC JESD47F) ††
D2Pak-7Pin
MSL1
Yes
Moisture Sensitivity Level
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
†† Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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