IRFS7534TRLPBF [INFINEON]
Power Field-Effect Transistor;型号: | IRFS7534TRLPBF |
厂家: | Infineon |
描述: | Power Field-Effect Transistor 开关 脉冲 晶体管 |
文件: | 总12页 (文件大小:649K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
StrongIRFET™
IRFB7534PbF
IRFS7534PbF
IRFSL7534PbF
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
VDSS
60V
RDS(on) typ.
max
2.0m
2.4m
232A
ID (Silicon Limited)
ID (Package Limited)
195A
D
D
S
Benefits
S
S
D
G
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant
D
G
G
G
D
S
Gate
Drain
Source
Base part number
Package Type
Standard Pack
Form
Orderable Part Number
Quantity
50
IRFB7534PbF
IRFSL7534PbF
TO-220
TO-262
Tube
IRFB7534PbF
IRFSL7534PbF
IRFS7534PbF
Tube
50
Tube
50
IRFS7534PbF
D2-Pak
Tape and Reel Left
800
IRFS7534TRLPbF
15
12
9
250
200
150
100
50
I
= 100A
Limited by package
D
6
T
T
= 125°C
= 25°C
J
3
J
0
0
2
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
175
T
, Case Temperature (°C)
C
V
Gate -to -Source Voltage (V)
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
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IRFB/S/SL7534PbF
Absolute Maximum Rating
Symbol
Parameter
Max.
232
164
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
195
944*
294
PD @TC = 25°C
Maximum Power Dissipation
W
W/°C
V
Linear Derating Factor
1.96
± 20
VGS
Gate-to-Source Voltage
TJ
TSTG
Operating Junction and
Storage Temperature Range
-55 to + 175
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics
EAS (Thermally limited)
EAS (tested)
IAR
373
536
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
mJ
A
mJ
See Fig 15, 16, 23a, 23b
EAR
Repetitive Avalanche Energy
Thermal Resistance
Symbol
Parameter
Typ.
–––
0.50
–––
–––
Max.
0.51
–––
62
Units
Junction-to-Case
RJC
RCS
RJA
RJA
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient (TO-220)
°C/W
Junction-to-Ambient (PCB Mount) (D2-Pak)
40
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
60
––– –––
V
VGS = 0V, ID = 250µA
–––
–––
–––
2.1 –––
––– –––
––– ––– 150
––– ––– 100
––– ––– -100
24
2.0
2.6
––– mV/°C Reference to 25°C, ID = 1mA
V(BR)DSS/TJ
RDS(on)
2.4
–––
3.7
1.0
VGS = 10V, ID = 100A
VGS = 6.0V, ID = 50A
VDS = VGS, ID = 250µA
m
V
VGS(th)
IDSS
Gate Threshold Voltage
VDS = 60 V, VGS = 0V
Drain-to-Source Leakage Current
µA
VDS = 60V,VGS = 0V,TJ =125°C
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
V
V
GS = 20V
GS = -20V
IGSS
RG
nA
–––
1.9
–––
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A by
source bonding technology. Note that current limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 75µH, RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 1135A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
oss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
R is measured at TJ approximately 90°C.
.
C
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf
*
This value determined from sample failure population, starting TJ =25°C, L= 75µH, RG = 50, IAS =100A, VGS =10V.
Pulse drain current is limited at 780A by source bonding technology.
2
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IRFB/S/SL7534PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min.
498
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
VDS = 10V, ID =100A
ID = 100A
–––
186
43
–––
279
–––
–––
–––
–––
–––
S
Qg
Qgs
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
VDS = 30V
nC
Qgd
56
VGS = 10V
Qsync
td(on)
tr
130
20
VDD = 30V
ID = 100A
Rise Time
134
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
118
93
–––
–––
RG= 2.7
VGS = 10V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 10034 –––
VGS = 0V
–––
–––
921
594
–––
–––
VDS = 25V
ƒ = 1.0MHz, See Fig.7
pF
Effective Output Capacitance
(Energy Related)
Coss eff.(ER)
Coss eff.(TR)
–––
–––
892
–––
–––
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Output Capacitance (Time Related)
1145
Diode Characteristics
Symbol
Parameter
Min.
Typ. Max. Units
Conditions
MOSFET symbol
D
Continuous Source Current
(Body Diode)
IS
–––
––– 232
showing the
A
G
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
ISM
–––
–––
–––
–––
944*
S
VSD
Diode Forward Voltage
1.2
V
TJ = 25°C,IS = 100A,VGS = 0V
dv/dt
Peak Diode Recovery dv/dt
–––
–––
–––
–––
–––
–––
9.2
46
49
71
83
2.6
––– V/ns TJ = 175°C,IS =100A,VDS = 60V
–––
–––
–––
–––
–––
TJ = 25°C
VDD = 51V
IF = 100A,
trr
Reverse Recovery Time
ns
TJ = 125°C
TJ = 25°C di/dt = 100A/µs
Qrr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
TJ = 125°C
TJ = 25°C
IRRM
3
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IRFB/S/SL7534PbF
1000
100
10
1000
100
10
4.5V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
60µs
Tj = 25°C
PULSE WIDTH
60µs
PULSE WIDTH
BOTTOM
BOTTOM
Tj = 175°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
2.4
2.0
1.6
1.2
0.8
0.4
1000
100
10
I
= 100A
= 10V
D
V
GS
T
= 25°C
J
T
= 175°C
J
1
V
= 25V
DS
60µs PULSE WIDTH
0.1
2
4
6
8
-60
-20
T
20
60
100
140
180
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
10000
1000
14.0
V
C
= 0V,
f = 1 MHZ
GS
= C + C , C SHORTED
I
= 100A
iss
gs
gd ds
D
C
= C
12.0
10.0
8.0
rss
gd
V
= 48V
= 30V
DS
C
= C + C
oss
ds
gd
V
DS
C
VDS= 12V
iss
C
oss
6.0
C
rss
4.0
2.0
100
0.0
0.1
1
10
100
0
50
100
150
200
250
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 8. Typical Gate Charge vs.
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
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Gate-to-Source Voltage
4
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IRFB/S/SL7534PbF
1000
100
10
1000
100
10
100µsec
T
= 175°C
J
Limited by Package
1msec
T
= 25°C
J
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
1
10msec
DC
1
0.1
0.01
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
1
10
0.1
0.4
V
0.7
1.0
1.3
1.6
1.9
V
, Drain-toSource Voltage (V)
DS
, Source-to-Drain Voltage (V)
SD
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
77
Id = 1.0mA
74
71
68
65
0
10
20
30
40
50
60
-60
-20
20
60
100
140
180
T
, Temperature ( °C )
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
12
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
9
6
3
0
0
100
I
200
300
400
500
, Drain Current (A)
D
Fig 13. Typical On-Resistance vs. Drain Current
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IRFB/S/SL7534PbF
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
400
350
300
250
200
150
100
50
TOP
BOTTOM 1.0% Duty Cycle
= 100A
Single Pulse
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
I
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 15, 16).
0
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
25
50
75
100
125
150
175
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
I
av = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)· av
t
Fig 16. Maximum Avalanche Energy vs. Temperature
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IRFB/S/SL7534PbF
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
15
10
5
I
= 60A
= 51V
F
V
R
T = 25°C
J
T = 125°C
J
ID = 250µA
ID = 1.0mA
ID = 1.0A
0
-75 -50 -25
T
0
25 50 75 100 125 150 175
, Temperature ( °C )
0
200
400
600
800
1000
di /dt (A/µs)
J
F
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
15
300
I
= 100A
= 51V
I
= 60A
= 51V
F
F
V
V
R
R
250
200
150
100
50
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
10
5
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
300
I
= 100A
= 51V
F
V
R
250
200
150
100
50
T = 25°C
J
T = 125°C
J
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
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IRFB/S/SL7534PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
I
0.01
t
p
AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
8
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IRFB/S/SL7534PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
E X A M P L E :
T H IS IS A N IR F 1 0 1 0
L O C O D E 1 7 8 9
A S S E M B L E D
IN T H A S S E M B L Y L IN
P A R T N U M B E R
D A T E C O D E
T
IN T E R N A T IO
R E C T IF IE R
L O
N A L
O
N
W
W
1 9 , 2 0 0 0
"C "
G
O
E
E
Y E A R
E E K 1 9
L IN
0
=
2 0 0 0
N
o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d F r e e "
A S S E M B L Y
L O C O D E
W
-
T
E
C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRFB/S/SL7534PbF
TO-262 Package Outline (Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
ASSEMBLED ON WW19, 1997
RECTIFIER
IN THE ASSEMBLYLINE "C"
LOGO
DATE CODE
YEAR7 = 1997
WEEK 19
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR7 = 1997
ASSEMBLY
LOT CODE
WEEK 19
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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November 27, 2013
IRFB/S/SL7534PbF
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
D2Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
ASSEMBLY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
ASSEMBLY
LOT CODE
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFB/S/SL7534PbF
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Qualification Information†
Industrial
(per JEDEC JESD47F) ††
Qualification Level
TO-220
D2Pak
N/A
MSL1
N/A
Moisture Sensitivity Level
TO-262
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
†† Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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