IRF8010SPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET型号: | IRF8010SPBF |
厂家: | Infineon |
描述: | HEXFET Power MOSFET |
文件: | 总10页 (文件大小:221K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 95433
IRF8010SPbF
SMPS MOSFET
IRF8010LPbF
Applications
HEXFET® Power MOSFET
l High frequency DC-DC converters
l UPS and Motor Control
l Lead-Free
VDSS
RDS(on) max
ID
80A
100V
15mΩ
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
D2Pak
IRF8010S
TO-262
IRF8010L
l Typical RDS(on) = 12mΩ
Absolute Maximum Ratings
Parameter
Max.
80
Units
A
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
@ T = 25°C
C
D
D
@ T = 100°C
C
57
320
260
DM
P
@T = 25°C
Power Dissipation
C
W
D
Linear Derating Factor
Gate-to-Source Voltage
1.8
W/°C
V
V
± 20
GS
dv/dt
T
J
Peak Diode Recovery dv/dt
Operating Junction and
16
V/ns
-55 to + 175
T
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Thermal Resistance
Parameter
Typ.
–––
Max.
0.57
0.80
–––
Units
RθJC
RθJC
RθCS
RθJA
Junction-to-Case
Junction-to-Case (end of life)
–––
°C/W
Case-to-Sink, Flat, Greased Surface
0.50
–––
Junction-to-Ambient (PCB Mount, steady state)
40
Notes through are on page 8
www.irf.com
1
06/21/04
IRF8010S/LPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
100
–––
0.11
12
–––
V
VGS = 0V, ID = 250µA
∆
∆
V(BR)DSS/ TJ
Breakdown Voltage Temp. Coefficient –––
––– V/°C Reference to 25°C, ID = 1mA
mΩ
RDS(on)
VGS(th)
IDSS
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
15
4.0
V
GS = 10V, ID = 45A
VDS = VGS, ID = 250µA
µA VDS = 100V, VGS = 0V
–––
–––
–––
–––
–––
V
Drain-to-Source Leakage Current
–––
–––
–––
–––
20
250
200
-200
VDS = 100V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA VGS = 20V
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
gfs
82
–––
81
–––
120
–––
–––
–––
–––
–––
–––
V
VDS = 25V, ID = 45A
ID = 80A
Qg
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
22
nC
VDS = 80V
26
VGS = 10V
VDD = 50V
ID = 80A
15
130
61
td(off)
tf
Ω
RG = 39
Turn-Off Delay Time
Fall Time
ns
120
VGS = 10V
VGS = 0V
VDS = 25V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 3830 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
480
59
–––
–––
pF ƒ = 1.0MHz
––– 3830 –––
V
GS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
–––
280
530
–––
–––
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
–––
Max.
310
45
Units
mJ
A
EAS
IAR
Avalanche Current
Repetitive Avalanche Energy
EAR
26
mJ
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
I
I
Continuous Source Current
–––
–––
80
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
–––
–––
320
SM
S
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
99
1.3
150
700
V
T = 25°C, I = 80A, V = 0V
J S GS
SD
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
ns T = 150°C, I = 80A, VDD = 50V
J F
rr
di/dt = 100A/µs
Q
t
460
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
www.irf.com
IRF8010S/LPbF
10000
1000
100
10
1000
100
10
VGS
15V
12V
VGS
15V
12V
TOP
TOP
10V
10V
6.0V
5.5V
5.0V
4.5V
4.0V
6.0V
5.5V
5.0V
4.5V
BOTTOM
BOTTOM 4.0V
4.0V
4.0V
1
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
1
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.5
1000
80A
=
I
D
T
= 175°C
3.0
2.5
2.0
1.5
1.0
0.5
0.0
J
100
10
1
T
= 25°C
J
V
= 50V
DS
20µs PULSE WIDTH
V
= 10V
GS
2.0
4.0
V
6.0
8.0
10.0
12.0
14.0
16.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
T , Junction Temperature
( C)
, Gate-to-Source Voltage (V)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF8010S/LPbF
100000
12
10
8
V
= 0V,
f = 1 MHZ
I = 80A
GS
D
C
= C + C , C SHORTED
iss
gs gd ds
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
C
= C
gd
rss
C
= C + C
oss
ds gd
10000
1000
100
C
iss
6
C
oss
4
2
C
rss
0
10
0
20
40
60
80
100
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
°
T = 175
J
C
100µsec
1msec
°
T = 25
J
C
1
1
Tc = 25°C
10msec
Tj = 175°C
Single Pulse
V
= 0 V
GS
0.1
0.1
0.0
0.5
1.0
1.5
2.0
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF8010S/LPbF
RD
80
60
40
20
0
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
P
DM
0.1
t
1
0.10
0.05
t
2
SINGLE PULSE
0.02
Notes:
(THERMAL RESPONSE)
0.01
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF8010S/LPbF
600
500
400
300
200
100
0
15V
I
D
TOP
18A
32A
45A
DRIVER
+
L
BOTTOM
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting Tj, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
10 V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRF8010S/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRF8010S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
AS S EMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
Note: "P" in ass embly line
pos i ti on indi cates "L ead-F r ee"
ASSEMBLY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DAT E CODE
P = DE S IGNAT E S L E AD-F RE E
PRODUCT (OPTIONAL)
YEAR 0 = 2000
AS S E MB L Y
LOT CODE
WE E K 02
A = AS S E MB L Y S IT E CODE
8
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IRF8010S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
DATE CODE
YEAR 7 = 1997
WEEK 19
Note: "P" in as sembly line
pos ition indicates "L ead-F ree"
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
INT ERNAT IONAL
RECTIFIER
LOGO
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
ASSEMBLY
LOT CODE
WEEK 19
A = ASSEMBLYSITE CODE
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9
IRF8010S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
26.40 (1.039)
24.40 (.961)
4
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Notes:
Coss eff. is a fixed capacitance that gives the same
Repetitive rating; pulse width limited by max. junction
temperature.
charging time as Coss while VDS is rising from 0 to 80%
Starting TJ = 25°C, L = 0.31mH, RG = 25Ω, IAS = 45A.
ISD ≤ 45A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Rth(jc) (end of life) is the maximum measured value
after 1000 temperature cycles from -55 to 150°C and
is accounted for by the physical wearout of the die attach
medium in worse case PCB mounting condition of
material (solder/substrate), process and re-flow
temperature.
VDSS
.
Calculated continuous current based on maximum
allowable junction temperature. Package limitation
current is 75A.
When mounted on 1" square PCB ( FR-4 or G-10
Material ). For recommended footprint and soldering
techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/04
10
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