IRF6665PBF [INFINEON]

Latest MOSFET Silicon technology; 最新的MOSFET硅技术
IRF6665PBF
型号: IRF6665PBF
厂家: Infineon    Infineon
描述:

Latest MOSFET Silicon technology
最新的MOSFET硅技术

文件: 总10页 (文件大小:238K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PD - 97230A  
IRF6665PbF  
DIGITAL AUDIO MOSFET  
IRF6665TRPbF  
Key Parameters  
Features  
Latest MOSFET Silicon technology  
VDS  
100  
V
Key parameters optimized for Class-D audio amplifier  
applications  
Low RDS(on) for improved efficiency  
Low Qg for better THD and improved efficiency  
Low Qrr for better THD and lower EMI  
Low package stray inductance for reduced ringing and lower  
EMI  
m:  
nC  
RDS(on) typ. @ VGS = 10V  
Qg typ.  
53  
8.7  
1.9  
RG(int) typ.  
Can deliver up to 100W per channel into 8with no heatsink Š  
Dual sided cooling compatible  
· Compatible with existing surface mount technologies  
· RoHS compliant containing no lead or bromide  
·Lead-Free (Qualified up to 260°C Reflow)  
DirectFET™ ISOMETRIC  
SH  
Applicable DirectFET Outline and Substrate Outline (see p. 6, 7 for details)  
SQ  
SX  
ST  
SH  
MQ  
MX  
MT  
MN  
Description  
This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes the  
latest processing techniques to achieve low on-resistance per silicon area. Furthermore, gate charge, body-diode reverse  
recovery and internal gate resistance are optimized to improve key Class-D audio amplifier performance factors such as  
efficiency, THD, and EMI.  
The IRF6665PbF device utilizes DirectFETTM packaging technology. DirectFETTM packaging technology offers lower parasitic  
inductance and resistance when compared to conventional wirebonded SOIC packaging. Lower inductance improves EMI  
performance by reducing the voltage ringing that accompanies fast current transients. The DirectFETTM package is compatible  
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection  
soldering techniques, when application note AN-1035 is followed regarding the manufacturing method and processes. The  
DirectFETTM package also allows dual sided cooling to maximize thermal transfer in power systems, improving thermal resis-  
tance and power dissipation. These features combine to make this MOSFET a highly efficient, robust and reliable device for  
Class-D audio amplifier applications.  
Absolute Maximum Ratings  
Parameter  
Drain-to-Source Voltage  
Max.  
100  
Units  
V
VDS  
VGS  
Gate-to-Source Voltage  
± 20  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current  
I
I
@ TC = 25°C  
@ T = 25°C  
A
19  
4.2  
D
D
A
I
I
@ T = 70°C  
A
3.4  
34  
D
DM  
P
P
P
@TC = 25°C  
@TA = 25°C  
@TA = 70°C  
Maximum Power Dissipation  
Power Dissipation  
42  
2.2  
1.4  
W
D
D
D
Power Dissipation  
Linear Derating Factor  
Operating Junction and  
0.017  
-40 to + 150  
W/°C  
°C  
T
J
T
Storage Temperature Range  
STG  
Thermal Resistance  
Parameter  
Junction-to-Ambient  
Typ.  
Max.  
Units  
Rθ  
JA  
–––  
12.5  
20  
58  
°C/W  
Rθ  
JA  
Junction-to-Ambient  
–––  
–––  
3.0  
Rθ  
JA  
Junction-to-Ambient  
Rθ  
JC  
Junction-to-Case  
–––  
1.4  
Rθ  
J-PCB  
Junction-to-PCB Mounted  
–––  
Notes  through Š are on page 2  
www.irf.com  
1
08/25/06  
IRF6665PbF  
Static @ TJ = 25°C (unless otherwise specified)  
Conditions  
VGS = 0V, ID = 250µA  
Reference to 25°C, ID = 1mA  
GS = 10V, ID = 5.0A  
VDS = VGS, ID = 250µA  
Parameter  
Min.  
100  
–––  
–––  
3.0  
Typ.  
–––  
0.12  
53  
Max.  
–––  
–––  
62  
Units  
V
V(BR)DSS  
V(BR)DSS/TJ  
RDS(on)  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
V/°C  
mΩ  
V
V
VGS(th)  
–––  
–––  
–––  
–––  
–––  
1.9  
5.0  
V
V
V
V
DS = 100V, VGS = 0V  
DS = 80V, VGS = 0V, TJ = 125°C  
GS = 20V  
IDSS  
Drain-to-Source Leakage Current  
–––  
–––  
–––  
–––  
–––  
20  
µA  
250  
100  
-100  
2.9  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Internal Gate Resistance  
nA  
GS = -20V  
RG(int)  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Conditions  
VDS = 10V, ID = 5.0A  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min.  
6.6  
Typ.  
–––  
8.4  
2.2  
0.64  
2.8  
2.8  
3.4  
7.4  
2.8  
14  
Max.  
–––  
13  
Units  
S
gfs  
Qg  
VDS = 50V  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
Qgs1  
VGS = 10V  
Pre-Vth Gate-to-Source Charge  
Post-Vth Gate-to-Source Charge  
Gate-to-Drain Charge  
Gate Charge Overdrive  
Switch Charge (Qgs2 + Qgd)  
Turn-On Delay Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
Qgs2  
Qgd  
ID = 5.0A  
nC  
See Fig. 6 and 17  
Qgodr  
Qsw  
td(on)  
tr  
td(off)  
tf  
VDD = 50V  
ID = 5.0A  
Rise Time  
RG = 6.0Ω  
Turn-Off Delay Time  
ns  
VGS = 10V  
VGS = 0V  
Fall Time  
4.3  
530  
110  
29  
Ciss  
Coss  
Crss  
Coss  
Coss  
Coss eff.  
Input Capacitance  
V
DS = 25V  
Output Capacitance  
ƒ = 1.0MHz  
Reverse Transfer Capacitance  
Output Capacitance  
pF  
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz  
510  
67  
V
V
GS = 0V, VDS = 80V, ƒ = 1.0MHz  
GS = 0V, VDS = 0V to 80V  
Output Capacitance  
Effective Output Capacitance  
130  
Avalanche Characteristics  
Typ.  
–––  
–––  
Max.  
11  
Parameter  
Units  
mJ  
EAS  
IAR  
Single Pulse Avalanche Energy  
Avalanche Current  
5.0  
A
Diode Characteristics  
Conditions  
Parameter  
Min.  
Typ.  
Max.  
Units  
D
S
MOSFET symbol  
I
I
Continuous Source Current  
–––  
–––  
38  
S
showing the  
(Body Diode)  
A
G
integral reverse  
p-n junction diode.  
Pulsed Source Current  
(Body Diode)  
–––  
–––  
34  
SM  
T = 25°C, I = 5.0A, V = 0V  
V
t
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
–––  
–––  
–––  
–––  
31  
1.3  
–––  
–––  
V
J
S
GS  
SD  
T = 25°C, I = 5.0A, VDD = 25V  
ns  
nC  
J
F
rr  
di/dt = 100A/µs  
Q
37  
rr  
Notes:  
† Used double sided cooling , mounting pad.  
‡ Mounted on minimum footprint full size board with  
metalized back and with small clip heatsink.  
ˆ TC measured with thermal couple mounted to top  
(Drain) of part.  
 Repetitive rating; pulse width limited by  
max. junction temperature.  
‚ Starting TJ = 25°C, L = 0.89mH, RG = 25, IAS = 5.0A.  
ƒ Surface mounted on 1 in. square Cu board.  
„ Pulse width 400µs; duty cycle 2%.  
Coss eff. is a fixed capacitance that gives the same  
‰ R is measured at TJ of approximately 90°C.  
θ
Š Based on testing done using a typical device & evaluation board  
at Vbus=±45V, fSW=400KHz, and TA=25°C. The delta case  
temperature TC is 55°C.  
charging time as Coss while VDS is rising from 0 to 80% VDSS  
.
2
www.irf.com  
IRF6665PbF  
100  
10  
1
100  
10  
1
VGS  
15V  
10V  
9.0V  
8.0V  
7.0V  
6.0V  
VGS  
15V  
10V  
9.0V  
8.0V  
7.0V  
6.0V  
TOP  
TOP  
BOTTOM  
BOTTOM  
6.0V  
6.0V  
60µs PULSE WIDTH  
Tj = 150°C  
60µs PULSE WIDTH  
Tj = 25°C  
0.1  
0.1  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
1000  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
100  
2.0  
I
= 5.0A  
D
V
= 10V  
GS  
10  
1
1.5  
1.0  
0.5  
T
T
T
= -40°C  
= 25°C  
= 150°C  
J
J
J
V
= 25V  
DS  
60µs PULSE WIDTH  
10  
, Gate-to-Source Voltage (V)  
0.1  
2
4
6
8
12  
-60 -40 -20  
0
20 40 60 80 100 120 140 160  
T
J
, Junction Temperature (°C)  
V
GS  
Fig 4. Normalized On-Resistance vs. Temperature  
Fig 3. Typical Transfer Characteristics  
12.0  
10000  
1000  
100  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I = 5.0A  
D
C
C
C
+ C , C  
SHORTED  
iss  
gs  
gd  
ds  
= C  
10.0  
rss  
oss  
gd  
V
V
V
= 80V  
= 50V  
= 20V  
DS  
DS  
DS  
= C + C  
ds  
gd  
8.0  
6.0  
4.0  
2.0  
0.0  
C
iss  
C
oss  
C
rss  
10  
0
2
4
6
8
10  
1
10  
, Drain-to-Source Voltage (V)  
100  
Q
Total Gate Charge (nC)  
V
G
DS  
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage  
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage  
www.irf.com  
3
IRF6665PbF  
100  
1000  
100  
10  
Tc = 25°C  
Tj = 150°C  
Single Pulse  
OPERATION IN THIS AREA  
LIMITED BY R (on)  
DS  
100µsec  
10  
T
T
T
= -40°C  
= 25°C  
= 150°C  
1msec  
10msec  
1
J
J
J
DC  
0.1  
0.01  
V
= 0V  
GS  
1
0.4  
0.6  
V
0.8  
1.0  
1.2  
1.4  
1.6  
0
1
10  
100  
1000  
, Source-to-Drain Voltage (V)  
V
, Drain-to-Source Voltage (V)  
SD  
DS  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode Forward Voltage  
5
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
4
3
2
1
0
I
I
I
= 250µA  
= 1.0mA  
= 1.0A  
D
D
D
-75 -50 -25  
0
25  
50  
75 100 125 150  
25  
50  
75  
100  
125  
150  
T
, Temperature ( °C )  
T
, Ambient Temperature (°C)  
J
A
Fig 10. Threshold Voltage vs. Temperature  
Fig 9. Maximum Drain Current vs. Ambient Temperature  
100  
D = 0.50  
0.20  
10  
0.10  
0.05  
R1  
Ri (°C/W) τi (sec)  
R2  
R2  
R3  
R3  
R4  
R4  
R5  
R5  
0.02  
0.01  
R1  
1.6195  
2.1406  
0.000126  
0.001354  
1
0.1  
τ
τ
J τJ  
AτA  
τ
1 τ1  
τ
τ
τ
τ
2 τ2  
22.2887 0.375850  
20.0457 7.410000  
3 τ3  
4 τ4  
5 τ5  
Ci= τi/Ri  
Ci= τi/Ri  
11.9144  
99  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthja + Tc  
0.01  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
t
, Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient ƒ  
4
www.irf.com  
IRF6665PbF  
120  
100  
80  
200  
180  
160  
140  
120  
100  
80  
I
= 5.0A  
D
T
= 125°C  
J
T
= 125°C  
J
T
= 25°C  
60  
J
60  
40  
T
= 25°C  
12  
J
Vgs = 10V  
8
20  
40  
0
0
2
4
6
10  
4
6
8
10  
14  
16  
18  
I , Drain Current (A)  
D
V
Gate -to -Source Voltage (V)  
GS,  
Fig 13. On-Resistance vs. Drain Current  
Fig 12. On-Resistance vs. Gate Voltage  
50  
15V  
I
D
TOP  
0.86A  
1.3A  
DRIVER  
L
40  
30  
20  
10  
0
V
DS  
BOTTOM 5.0A  
D.U.T  
AS  
R
G
+
-
V
DD  
I
A
V
20V  
GS  
0.01Ω  
t
p
Fig 15a. Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
25  
50  
75  
100  
125  
150  
Starting T , Junction Temperature (°C)  
J
Fig 14. Maximum Avalanche Energy vs. Drain Current  
I
AS  
Fig 15b. Unclamped Inductive Waveforms  
RD  
VDS  
VDS  
90%  
VGS  
D.U.T.  
RG  
+VDD  
-
10%  
VGS  
10V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
td(on)  
td(off)  
tr  
tf  
Fig 16b. Switching Time Waveforms  
Fig 16a. Switching Time Test Circuit  
www.irf.com  
5
IRF6665PbF  
Current Regulator  
Same Type as D.U.T.  
Id  
Vds  
50KΩ  
Vgs  
.2µF  
12V  
.3µF  
+
V
DS  
D.U.T.  
-
V
GS  
Vgs(th)  
3mA  
I
I
D
G
Current Sampling Resistors  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 17a. Gate Charge Test Circuit  
Fig 17b. Gate Charge Waveform  
D.U.T  
+
ƒ
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
-
+
‚
„
-
+
-

VDD  
di/dt controlled by RG  
RG  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
+
-
Driver Gate Drive  
P.W.  
P.W.  
Period  
Period  
D =  
*
=10V  
V
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
Re-Applied  
Voltage  
Body Diode  
InductorCurrent  
Forward Drop  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
6
www.irf.com  
IRF6665PbF  
DirectFETSubstrate and PCB Layout, SH Outline  
(Small Size Can, H-Designation).  
Please see DirectFET application note AN-1035 for all details regarding PCB assembly using DirectFET. This  
includes all recommendations for stencil and substrate designs.  
G = GATE  
D = DRAIN  
S = SOURCE  
D
D
D
D
G
S
www.irf.com  
7
IRF6665PbF  
DirectFET™ Outline Dimension, SH Outline  
(Small Size Can, H-Designation).  
Please see DirectFET application note AN-1035 for all details regarding PCB assembly using DirectFET. This  
includes all recommendations for stencil and substrate designs.  
DIMENSIONS  
IMPERIAL  
MIN  
METRIC  
MAX  
CODE  
MIN  
4.75  
3.70  
2.75  
0.35  
0.58  
0.58  
0.63  
0.83  
0.99  
2.29  
0.616  
0.020  
0.08  
MAX  
0.191  
0.156  
0.112  
0.018  
0.024  
0.024  
0.026  
0.034  
0.041  
0.092  
0.0274  
0.0031  
0.007  
4.85  
3.95  
2.85  
A
B
C
D
E
F
0.187  
0.146  
0.108  
0.45 0.014  
0.62 0.023  
0.62 0.023  
0.67  
0.87  
1.03  
G
H
K
L
0.025  
0.033  
0.039  
2.33 0.090  
0.676 0.0235  
0.080 0.0008  
M
R
P
0.17  
0.003  
DirectFET™ Part Marking  
8
www.irf.com  
IRF6665PbF  
DirectFET™ Tape & Reel Dimension (Showing component orientation).  
NOTE: Controlling dimensions in mm  
Std reel quantity is 4800 parts. (ordered as IRF6665TRPBF). For 1000 parts on 7"  
reel, order IRF6665TR1PBF  
REEL DIMENSIONS  
STANDARD OPTION (QTY 4800)  
TR1 OPTION (QTY 1000)  
METRIC  
MAX  
IMPERIAL  
METRIC  
MIN MAX  
IMPERIAL  
CODE  
MIN  
12.992  
0.795  
0.504  
0.059  
3.937  
N.C  
MAX  
N.C  
MIN  
6.9  
MAX  
N.C  
N.C  
0.50  
N.C  
N.C  
0.53  
N.C  
N.C  
MIN  
A
B
C
D
E
F
330.0  
20.2  
12.8  
1.5  
N.C  
N.C  
13.2  
N.C  
N.C  
18.4  
14.4  
15.4  
177.77 N.C  
0.75  
0.53  
0.059  
2.31  
N.C  
N.C  
19.06  
13.5  
1.5  
N.C  
0.520  
N.C  
12.8  
N.C  
100.0  
N.C  
58.72  
N.C  
N.C  
N.C  
0.724  
0.567  
0.606  
13.50  
12.01  
12.01  
G
H
0.488  
0.469  
0.47  
0.47  
12.4  
11.9  
11.9  
11.9  
Loaded Tape Feed Direction  
DIMENSIONS  
METRIC  
IMPERIAL  
CODE  
MIN  
0.311  
MIN  
7.90  
3.90  
11.90  
5.45  
4.00  
5.00  
1.50  
1.50  
MAX  
MAX  
0.319  
0.161  
0.484  
0.219  
0.165  
0.205  
N.C  
A
B
C
D
E
F
8.10  
4.10  
12.30  
5.55  
4.20  
5.20  
N.C  
0.154  
0.469  
0.215  
0.158  
0.197  
0.059  
0.059  
G
H
1.60  
0.063  
Data and specifications subject to change without notice.  
This product has been designed and qualified for the Consumer market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information.08/06  
www.irf.com  
9
Note: For the most current drawings please refer to the IR website at:  
http://www.irf.com/package/  

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