IRAUDAMP9 [INFINEON]
Class D Audio Power Amplifier;
| 型号： | IRAUDAMP9 |
| 厂家： | 
Infineon |
| 描述： | Class D Audio Power Amplifier |
| 文件： | 总39页 (文件大小：4434K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRAUDAMP9
1.7 kW / 2-Ω Single Channel
Class D Audio Power Amplifier
Using the IRS2092S and IRFB4227
By
Israel Serrano and Jun Honda
CAUTION:
International Rectifier recommends the following guidelines for safe operation and
handling of IRAUDAMP9 demo board:
• Always wear safety glasses when operating demo board
• Avoid physical contact with exposed metal surfaces when operating the demo board
• Turn off demo board when placing or removing measurement probes
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IRAUDAMP9 REV 2.0
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TABLE OF CONTENTS
PAGE
INTRODUCTION............................................................................................................................................... 3
SPECIFICATIONS............................................................................................................................................ 3
CONNECTION SETUP AND DESCRIPTION ...............................................................................................5-6
TEST PROCEDURES ...................................................................................................................................... 6
PERFORMANCE AND TEST GRAPHS .......................................................................................................7-9
IRAUDAMP9 OVERVIEW .............................................................................................................................. 10
FUNCTIONAL DESCRIPTIONS................................................................................................................... 100
CLASS D OPERATION................................................................................................................................... 100
Gate Driver Buffer Stage………………………………………………………………………………………… 11
POWER SUPPLIES AND PSRR........................................................................................................................ 12
BUS PUMPING ............................................................................................................................................... 12
HOUSE KEEPING POWER SUPPLY................................................................................................................... 13
INPUT............................................................................................................................................................ 13
OUTPUT ........................................................................................................................................................ 13
HIGH OUTPUT PEAK SHUTDOWN (HOPS) CIRCUIT ......................................................................................... 13
GAIN SETTING / VOLUME CONTROL ................................................................................................................ 14
EFFICIENCY................................................................................................................................................... 14
OUTPUT FILTER DESIGN AND PREAMPLIFIER................................................................................................... 15
SELF-OSCILLATING PWM MODULATOR .......................................................................................................... 16
ADJUSTMENTS OF SELF-OSCILLATING FREQUENCY......................................................................................... 16
SWITCHES AND INDICATORS........................................................................................................................... 16
STARTUP AND SHUTDOWN ............................................................................................................................. 17
STARTUP AND SHUTDOWN SEQUENCING ........................................................................................................ 17
PROTECTION SYSTEM OVERVIEW................................................................................................................... 20
Ouput Over-Current Protection (OCP).................................................................................................... 20
Low-side Current Sensing ................................................................................................................. 20
High-side Current Sensing ................................................................................................................ 21
Input Bus Over-Voltage Protection (OVP) .............................................................................................. 21
Input Bus Under-Voltage Protection (UVP)............................................................................................. 22
Speaker DC-Offset- Protection (DCP) .................................................................................................... 21
Offset Null (DC Offset) Adjustment......................................................................................................... 21
Over-Temperature Protection (OTP) ...................................................................................................... 22
Thermal Considerations.......................................................................................................................... 22
SHORT CIRCUIT PROTECTION RESPONSE ....................................................................................................... 23
SCHEMATIC DIAGRAMS .................................................................................................................................. 25
IRAUDAMP9 FABRICATION BILL OF MATERIALS (BOM)....................................................................... 30
IRAUDAMP9 PCB SPECIFICATIONS........................................................................................................... 34
REVISION CHANGES DESCRIPTIONS........................................................................................................ 39
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IRAUDAMP9 REV 2.0
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Introduction
The IRAUDAMP9 reference design is a single-channel 1.7-kW ( @ 2Ω load) half-bridge Class D audio
power amplifier. This reference design demonstrates how to use the IRS2092S Class D audio controller and
external gate buffer, to implement protection circuits, and design an optimum PCB layout using the
IRFB4227 (x 2 Pairs) TO-220 MOSFETs. This reference design may require additional heatsink or fan for
normal operation (one-eighth of continuous rated power). The reference design provides all the required
housekeeping power supplies for ease of use. The 1-channel design is capable of delivering higher than its
rated power with provision of larger heat sink ( Rth <2° C / W).
Applications
•
•
•
Pro-Audio amplifiers
Powered speakers
Active Sub-woofers
•
•
•
P.A. Systems
Car audio amplifier
Musical Instrument Amplifier
Features
Output Power:
Residual Noise:
Distortion:
1.7 kW Single channel (2 Ω load, 1kHz, THD+N=10%),
290μV, IHF-A weighted, AES-17 filter
0.07% THD+N @ 600W, 2Ω
Efficiency:
97% @ 1.7 kW, 2Ω
Multiple Protection Features:
Output Over-current protection (OCP), high side and low side
Input Over-voltage protection (OVP),
Input Under-voltage protection (UVP),
Output DC-offset protection (DCP),
Over-temperature protection (OTP)
PWM Modulator:
Self-oscillating half-bridge topology with optional clock synchronization
Specifications
General Test Conditions (unless otherwise noted)
Notes / Conditions
Supply Voltages
±75V
2Ω
300kHz
33dB
Load Impedance
Self-Oscillating Frequency
Gain Setting
No input signal, Adjustable
1Vrms
input
yields
1-kW
sinusoidal output power
Electrical Data
Typical
Notes / Conditions
IR Devices Used
IRS2092S Audio Controller and Gate-Driver,
IRFB4227 (x 2 Pairs) TO-220 MOSFETs
Modulator
Self-oscillating, second order sigma-delta modulation, analog input
Power Supply Range
± 48V to ±80V
1200W
1700W
2 Ω
+67mA , -105mA
13.2 W
Bipolar power supply
1kHz Sinewave
1kHz Sinewave
Non-inductive Resistive load
No input signal
No input signal
@ +/- 75V 1.7 kW, 2Ω
@ +/- 75V 1.2 kW, 2Ω
@ +/- 75V 125 W (1/8 Po-rated), 2Ω
Output Power CH1: (1% THD+N)
Output Power CH1: (10% THD+N)
Rated Load Impedance
Idling Supply Current
Total Idle Power Consumption
System Efficiency
97%
94%
74 %
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IRAUDAMP9 REV 2.0
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Audio Performance
Class D
Output
0.024%
0.025%
0.025%
0.049%
1.0 %
Notes / Conditions
THD+N, @ 1W
THD+N, @ 125W
THD+N, @ 250W
THD+N, @ 500W
THD+N, @ 1250W
THD+N, @ 1700W
1kHz, +/-75Vbus,
2-ohm load
10.0%
A-weighted, AES-17 filter,
Single-channel operation
Self-oscillating – 300kHz
AP BW:<10Hz- 20kHz AES17
IHF-A weighted
Dynamic Range
99.4 dB
Residual Noise, 22Hz - 20kHz AES17
290μV
Damping Factor
Frequency Response : 20Hz-20kHz
81.9
±1dB
1kHz, relative to 2Ω load
1W, 2Ω Load
Thermal Performance
Typical
TC = 56°C
Notes / Conditions
No signal input, TA=25°C, after 5
min
Idling
125W (1/8 rated power)
1.2 kW
TC = 104°C
Continuous @ TA=25°C
*requires larger heatsink design
for continuous operation
At OTP shutdown after 130 sec,
TA=25°C
TC = 118°C
Physical Specifications
Dimensions
7.76”(L) x 5.86”(W) x 2.2”(H)
192 mm (L) x 149mm (W) x 56mm(H)
0.54kgm
Weight
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IRAUDAMP9 REV 2.0
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Connection Setup
75V, 18ADC supply
75V,18A DC supply
3000W,Non-inductive Resistors
2-Ohm
J1
G
S3
CH1 Output
J3
J8
VS pins (CH1-O)
S2
Normal
Protection
J6
J7
CH1
Input
R100
Volume
R130
S1
Audio Signal Generator
Figure 1 Typical Test Setup
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Connector Description
CH1 IN
J7
J3
J1
J6
J8
Analog input for CH1
Positive and negative supply (+B / -B)
Output for CH1
External clock sync
DC protection relay output
POWER
CH1 OUT
EXT CLK
DCP OUT
Test Procedures
Test Setup:
1. Connect 2Ω - 3000 W dummy loads to the output connectors (J1 as shown on Figure 1).
2. Connect the Audio Precision Analyzer (AP) signal Generator output to J7.
3. Initially set the voltages of the dual power supplies to ±75V with current limits to 0.5 A.
4. Make sure to TURN OFF the dual power supplies before connecting to the unit under test
(UUT).
5. Set switch S1 to middle position (self oscillating).
6. Set volume level knob R130 fully counter-clockwise (minimum volume).
7. Connect the dual power supply to J3 as shown in Figure 1.
Power up:
8. Turn ON the dual power supply. The ±B supplies must be applied and removed at the
same time.
9. Red LED (Protection) should turn on almost immediately and turn off after about 3s.
10. Green LED (Normal) then turns on after the red LED is extinguished and should stay ON.
11. Note the quiescent current for the positive supply should be 67mA ±10mA at +75V.
12. Quiescent current for the negative supply should be 105mA ±15mA at –75V.
13. Push switch S3 (Trip and Reset push-button) to restart the LEDs sequence, which should
be the same as noted above in steps 9 and 10.
Switching Frequency test
14. Monitor switching waveform at VS1/J4 (pins 9-12) of CH1 on Daughter Board using an
oscilloscope.
15. For IRAUDAMP9, the self-oscillating switching frequency is pre-calibrated to 300 kHz.
To modify the IRAUDAMP9 frequency, adjust the potentiometer P1 for CH1.
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Audio Functional Tests:
16. Set the current limit of the dual power supplies to ~18A. Make sure the volume control
potentiometer is turned to full counterclockwise position. Apply 1V rms @ 1 kHz from the
Audio Signal Generator to the audio input connector J7.
17. Turn control volume, R130 clock-wise to obtain an output reading of 1.0 kW. For all the
subsequent tests as shown on the Audio Precision graphs below, measurements are taken
across J1 with an AES-17 Filter. Observe that a 1 VRMS input generates an output voltage
of ~44.8 VRMS. Alternatively, a 100-mVrms input would give an output of ~ 10.03W that
corresponds to 4.48Vrms across a 2-ohm load.
18. Using an oscilloscope monitor the output signals at J1 while sweeping the audio input
signal from 10 mVRMS to 2 VRMS. The waveform must be a non distorted sinusoidal signal.
Test Setup using Audio Precision Analyzer (Ap):
19. Use an unbalanced-floating signal from the generator outputs.
20. Use balanced inputs taken across output terminal J1.
21. Connect Ap chasis ground to GND at terminal J7.
22. Select the AES-17 filter (pull-down menu) for all the testing except frequency response.
23. Use input signal ranging from 15 mVRMS to 1 VRMS
.
24. Run Ap test programs for all subsequent tests as shown in Figure 2 below.
Performance and test graphs
±B Supply = ± 75V, 2 Ω Load
Figure 2 THD+N vs. Power
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IRAUDAMP9 REV 2.0
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4-ohm
2-ohm
Figure 3 Frequency response
Figure 4 THD+N vs. Frequency at 10W and 125W
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IRAUDAMP9 REV 2.0
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No signal, Self Oscillator @ 300kHz
Figure 5 Noise Floor
.
Figure 6. 1-VRMS output Frequency Spectrum
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IRAUDAMP9 REV 2.0
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IRAUDAMP9 Overview
The IRAUDAMP9 features a single-channel self-oscillating PWM modulator. This topology results
in the lowest component count, highest performance and robust design. It represents an analog
version of a second-order sigma-delta modulation having a Class D switching stage inside the
loop. The benefit of the sigma-delta modulation, in comparison to the carrier-signal based
modulation, is that all the error in the audible frequency range is shifted to the inaudible upper-
frequency range by nature of its operation. Also, sigma-delta modulation allows a designer to
apply a sufficient amount of error correction.
The IRAUDAMP9 self-oscillating topology incorporates the following functional blocks.
•
•
•
•
•
Front-end integrator
PW Modulator and Level shifters
Gate driver and buffer
Power MOSFETs
Output LPF
R-FB
Rfb filter
.
Cfbfilter
pF
+B
Raa
Caa
GNDD
AGND
0V
+VAA
Hi-side buffer
0V
AGND
C1integrator
Q1n
C2integrator
nF
VB
Q4A
Q4B
COMP
IRS2092S
e
Rgate
HO
pF
0V
IRFB4227
IRFB4227
AGND
AGND
0V
Rin
IN-
Q1p
np
INPUT
-
Modulator
and
Shift level
Vo
Vs
VS
L-out
AGND
Lo-side buffer
+
GND
VCC
LO
AGND
LP Filter
Cout
Integrator
Q2n
Q3A
Q3B
CSD
e
AGND
GNDD
Heatsink
IRFB4227
IRFB4227
+VCC
Q2
-VSS
COM
Css
.
AGND
-B
Rss
.
Green
Red
LEDs
Trip
D
(TO-220
Case Temp.)
OTP
HOPS
DCP
RESET
OVP / UVP
Fig. 7 Functional block diagram
Functional Description
Class-D Operation
The C2integrator, C1integrator, R21 + potentiometer P1 form a front-end second-order integrator. This
integrator receives a rectangular feedback signal from the Class D switching stage and outputs a
quadratic oscillatory waveform as a carrier signal. To create the modulated PWM signal, the input
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signal shifts the average value of this quadratic waveform (through gain relationship between
[(R38+R39) / (R154+R40)] ratio) so that the duty varies according to the instantaneous value of
the analog input signal. The IRS2092S input comparator processes the signal to create the
required PWM signal. This PWM signal is internally level-shifted down to the negative supply rail
where it is split into two signals, with opposite polarity and added dead time, for high-side and low-
side MOSFET gate signals, respectively. The IRS2092S drives 2 pairs of IRFB4227 TO-220
MOSFETs in the power stage to provide the amplified PWM waveform. The amplified analog
output is re-created by demodulating the amplified PWM. This is done by means of the LC low-
pass filter (LPF) formed by L4 and C34, which filters out the switching carrier signal.
Gate Driver Buffer Stage
High power designs such as IRAUDAMP9 that use multiple mosfets in parallel connection to
handle large amount of switching current often require far more than +/-1A drive current even for a
brief moment due to mosfets’ gate drive requirement (high total gate charge, Qg). In order to
facilitate this high drive current, a buffer stage is devised to source and sink this high gate charge.
This stage consists of NPN-PNP BJT transistors in totem pole configuration. It serves as a high-
speed buffer amplifier that receives input from IRS2092S HO / LO to drive the power mosfet stage
through Rg (1A,1B,2A,2B) for low side mosfets Q4(A,B) and for high-side Q3 (A,B) mosfets.
Theoretically, the switching time is reduced by such amount (hfe) as compared to that high-Qg
design that uses the divided output current capacity of the driver IC. This buffering action is very
necessary to speed-up the switching times of each mosfets in order not to exceed the OCP
voltage monitor time. The IC commences drain-to-source voltage monitoring as soon as the HO /
LO go to high state but after the leading edge blanking time.
+B
VB
Q1n
Cvcc1
BJT buffer
Hi-side
Rg1A
Q3A
Rg1B Q3B
HO
Q1p
Rgs3A
Rgs3B
Vout
Vs
L out filter
VCC
Cout filter
R Load
Cvcc2
Q2n
LO
Rg2B
Rg2A
Q4A
Q4B
GND
Q2p
Rgs4A
Rgs4B
BJT buffer
Low side
-B
Fig. 8 Simplified diagram for gate-buffering of 2 x IRFB4227 mosfets
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Power Supplies
The IRAUDAMP9 has all the necessary housekeeping power supplies onboard and only requires
a pair of symmetric power supplies ranging from ±38 V to ±82 V (+B, GND, -B) for operation. The
internally-generated housekeeping power supplies include a ±5 V supply for analog signal
processing (preamp, etc.), and a +12 V supply (Vcc), referenced to –B, to supply the Class D
gate-driver stage.
For the externally-applied power, a regulated power supply is preferable for performance
measurements, but not always necessary. The bus capacitors, C45 ~ C48 on the motherboard,
along with high-frequency bypass-capacitors C19 ~ C26 on daughter board, address the high-
frequency ripple current that result from switching action. In designs involving unregulated power
supplies, the designer should place a set of bus capacitors, having enough capacitance to handle
the audio-ripple current, externally. Overall regulation and output voltage ripple for the power
supply design are not critical when using the IRAUDAMP9 Class D amplifier as the power supply
rejection ratio (PSRR) of the IRAUDAMP9 is excellent as shown in Figure 9 below.
-75Vbus
Fig. 9 IRAUDAMP9 Power Supply Rejection Ratio (PSRR)
Bus Pumping
Since the IRAUDAMP9 is a half-bridge configuration, bus pumping does occur. Under normal
operation during the first half of the cycle, energy flows from one supply through the load and into
the other supply, thus causing a voltage imbalance by pumping up the bus voltage of the receiving
power supply. In the second half of the cycle, this condition is reversed, resulting in bus pumping
of the other supply.
The following conditions worsen bus pumping:
– Lower frequencies (bus-pumping duration is longer per half cycle)
– Higher power output voltage and/or lower load impedance (more energy transfers
between supplies)
– Smaller bus capacitors (the same energy will cause a larger voltage increase)
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The IRAUDAMP9 has protection features that will shutdown the switching operation if the bus
voltage becomes too high (>82 V) or too low (<38 V). One brute countermeasure is to put a large
electrolytic-capacitors between the power supply and the input terminals. Bus voltage detection is
only done on the –B supply as the effect of the bus pumping on the supplies is assumed to be
symmetrical in amplitude (although opposite in phase).
House Keeping Power Supplies
The internally-generated power supplies include ±5V for analog signal processing, and +12V
supply (Vcc) referred to the negative supply rail -B for TO-220 gate drive. The gate driver section
of the IRS2092S uses Vcc to drive gates of the TO-220s. Vcc is referenced to –B (negative power
supply). The D6, R26 and C5 form a bootstrap floating supply for the HO gate driver.
Input
Input signal is an analog signal ranging from 20Hz to 20kHz with up to 2 VRMS amplitude with a
source impedance of no more than 600 Ω. Input signal with frequencies around 20kHz may cause
LC resonance in the output LPF and may result to a large reactive current flow through the
switching stage, especially if the amplifier is not connected to any load - this can activate OC
protection.
Output
The IRAUDAMP9 has single output and therefore have terminals labeled (+) and (-) with the (-)
terminal connected to power ground. Each channel is optimized for a 2 Ω speaker load for a rated
output power of 1200 W @ 1% THD+N.
Figure 10 Output Low Pass Filter
High Output Peak Shutdown (HOPS) circuit
It is common in amplifier design to have a RC snubber called Zobel network that is used to damp
the resonance and prevent peaking frequency response with high load impedance. Instead, the
IRAUDAMP9 has a simple detection circuit in placed, which consist of a NPN transistor, blocking
diode and a current limiting resistor to detect the output peak status from exceeding –B supply
during resonance of the output LC filter. This circuit pulls the Cstart capacitor (C66) down to output
(+) that sends a signal to IRS2092S to inhibit the power stage from switching. As the output
returns to unclipped level, the base-to-emitter voltage is reduced and releases the CSD cap to
start charging. This would allow the IRS2092S to resume driving operation of the power stage.
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The HOPS function is not expected to be triggered in normal operating conditions. It is use to halt
the output going too negative ( < -B rail) during the natural resonance of output LC filter. The
HOPS circuit is intended for higher than nominal impedance or open load conditions.
Fig. 11 Shutdown circuit diagram when output goes lower than negative rail.
Gain Setting / Volume Control
The IRAUDAMP9 has an internal volume control (potentiometer R130 labeled, “VOLUME”) for
gain adjustment. Gain setting is tracked and controlled by the volume control IC (U_2) setting the
gain from the microcontroller IC (U_3). The total gain is a product of the power-stage gain, which
is constant (+33 dB), and the input-stage gain that is directly-controlled by the volume adjustment.
The volume range is about 100 dB with minimum volume setting to mute the system with an
overall gain of less than -60 dB. For best performance in testing, the internal volume control
should be set to 1 Vrms which results in rated output power (1 kW into 2 Ω).
Efficiency
Figure 12 shows efficiency characteristics of the IRAUDAMP9. The high efficiency is achieved by
the following major factors:
1) Low conduction loss due to the low RDS(ON) of the IRFB4227 mosfets
2) Low switching loss due to the high gate drive output for fast rise and fall times
3) Secure dead-time provided by the IRS2092S, avoiding cross-conduction
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IRAUDAMP9 w/ 2-Pair of IRFB4227 @ +/-75Vdc 2-ohm Rload
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
Total System Efficiency
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
Total Output Power (W)
Fig.12 Efficiency plots.
Output Filter and Preamplifier
Output filter:
The amplified PWM output is reconstructed back to an analog signal by the output LC LPF.
This LPF is formed by L4 and C34, provides pass band for the audio frequencies while filtering out
the switching carrier signal. A single stage output filter can be used with switching frequencies of
around 300 kHz ; a design with a lower switching frequency may require an additional stage of
filtering.
Since the output filter is not included in the control loop of the IRAUDAMP9, the reference design
cannot compensate for performance deterioration due to the output filter. Therefore, it is important
to select filter components with the following characteristics in mind.
1) The DC resistance of the inductor should be minimized to 6 mΩ or less.
2) The linearity of the output inductor and capacitor should be high with respect to load
current and voltage.
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Preamplifier
The preamp allows partial gain of the input signal. It is possible to evaluate the performance
without the preamp and volume control, by removing R154 and feeding the input signal directly
through R46 resistors (IN-1). This effectively bypasses the preamp and connects the RCA inputs
directly to the Class D power stage input. Improving the preamp noise performance and the output
filter, will improve the overall system performance approaching that of the stand-alone Class D
power stage.
Self-Oscillating PWM Modulator
The IRAUDAMP9 features a self-oscillating type PWM modulator for the lowest component count
and robust design. This topology represents an analog version of a second-order sigma-delta
modulation having a Class D switching stage inside the loop. The benefit of the sigma-delta
modulation, in comparison to the carrier-signal based modulation, is that all the error in the audible
frequency range is shifted to the inaudible upper-frequency range by nature of its operation. Also,
sigma-delta modulation allows a designer to apply a sufficient amount of correction.
The self-oscillating frequency is determined by the total delay time inside the control loop of the
system. The delay of the logic circuits, propagation delay of IRS2092S gate-driver, delay caused
by the external buffer, IRFB4227 (x 2 pairs) switching speed, time-constant of front-end integrator
and variations in the supply voltages are critical factors of the self-oscillating frequency. Under
normal conditions, the switching-frequency is around 300 kHz with no audio input signal and a
+/-75 V supply.
Adjustments of Self-Oscillating Frequency
The PWM switching frequency in this type of self-oscillating switching scheme greatly impacts the
audio performance, both in absolute frequency and frequency relative to the other channels. In
absolute terms, at higher frequencies, distortion due to switching-time becomes significant, while
at lower frequencies, the bandwidth of the amplifier suffers. Most importantly, higher switching
frequency results in higher switching loss of the power stage, hence the thermal performance
degrades, especially with those that having a limited-size heatsink design.
Potentiometers for adjusting self-oscillating frequency
P1 potentiometer + R21 Switching frequency for CH1*
*Adjustments have to be done in idle condition with no input signal.
Switches and Indicators
There are two different indicators on the reference design:
–
–
A red LED, signifying a fault / shutdown condition when lit.
A green LED on the motherboard, signifying conditions are normal and no fault condition is
present.
There are three switches on the reference design:
Switch S1 is an oscillator selector. This three-position switch is selectable for internal self-
oscillator (middle position – “SELF”), or either internal (“INT”) or external (“EXT”) clock
synchronization.
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–
Switch S3 is a trip and reset push-button. Pushing this button has the same effect of a fault
condition. The circuit will restart about three seconds after the shutdown button is released.
Startup and Shutdown
One of the most important aspects of any audio amplifier is the startup and shutdown procedures.
Typically, transients occurring during these intervals can result in audible pop- or click-noise on the
output speaker. Traditionally, these transients have been kept away from the speaker through the
use of a series relay that connects the speaker to the audio amplifier only after the startup
transients have passed and disconnects the speaker prior to shutting down the amplifier. It is
interesting to note that the audible noise of the relay opening and closing is not considered “click
noise”, although in some cases, it can be louder than the click noise of non-relay-based solutions.
The IRAUDAMP9 does not use any series relay to disconnect the speaker from the audible
transient noise, but rather depends on IRS2092S’s on-chip noise reduction circuit that yields
audible noise levels that are far less than those generated by the relays they replace. This results
in a more reliable, superior performance system.
Startup and Shutdown Sequencing
The IRAUDAMP9 sequencing is achieved through the charging and discharging of the CStart
capacitor C66. This, coupled to the charging and discharging of the voltage of CSD (C10 on
daughter board for CH1) of the IRS2092S, is all that is required for complete sequencing. The
conceptual startup and shutdown timing diagrams are show in Figure 13.
CStart Ref1
CStart Ref2
+B
CSD= 2/3VDD
CSD
CStart
+5 V
-5 V
Time
VCC
UVP@-38 V
-B
CH1_O
Audio MUTE
Class D startup
Music startup
Figure 13, Conceptual Startup Sequencing of Power Supplies and Audio Section Timing
For startup sequencing, +/-B supplies startup at different intervals. As +/-B supplies reach +5 V
(Vaa) and -5 V (Vss) respectively, the analog supplies (Vaa, Vss) start charging and, once +B
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reaches ~16 V, Vcc charges. Once –B reaches -38 V, the UVP is released and CSD and CStart
start charging. As CSD reaches two-thirds Vaa, the Class D stage starts oscillating. The Class D
amplifier is now operational, but the preamp output remains muted until CStart reaches Ref2. At this
point, normal operation begins. The entire process takes less than three seconds.
CStart Ref2
CStart Ref1
CSD= 2/3VDD
+B
CSD
CStart
+5 V
-5 V
Time
VCC
-B
UVP@-38 V
CH1_O
Audio MUTE
Class D shutdown
Music shutdown
Figure 14. Conceptual Shutdown Sequencing of Power Supplies and Audio Section Timing.
Shutdown sequencing is initiated once UVP is activated. As long as the supplies do not discharge
too quickly, the shutdown sequence can be completed before the IRS2092S trips UVP. Once UVP
is activated, CSD and Cstart are discharged at different rates. In this case, threshold Ref2 is
reached first and the preamp audio output is muted. Once CStart reaches threshold Ref1, the click-
noise reduction circuit is activated. It is then possible to shutdown the Class D stage (CSD
reaches two-thirds VDD). This process takes less than 200 ms.
For any external fault condition (OTP, OVP, UVP or DCP – see “Protection”) that does not lead to
power supply shutdown, the system will trip in a similar manner as described above. Once the
fault is cleared, the system will reset (similar sequence as startup).
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IRAUDAMP9 REV 2.0
Page 18 of 39
CStart Ref2
CStart Ref1
CSD= 2/3VDD
CStart Ref1
CStart Ref2
CSD
CStart
Time
External trip
Reset
CH1_O
Audio MUTE
Class D shutdown
Class D startup
Music shutdown
Music startup
Figure 15. Conceptual Click Noise Reduction Sequencing at Trip and Reset
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IRAUDAMP9 REV 2.0
Page 19 of 39
Protection System Overview
The IRS2092S integrates over current protection (OCP) inside the IC. The rest of the protections,
such as over-voltage protection (OVP), under-voltage protection (UVP), and over temperature
protection (OTP), are detected externally to the IRS2092S.
.
IRS2092S
D1
R43
CSH
+B
BAV19
Q1n
npn
+
VB
Q4A
Q4B
1.2V
Rgate
HO
Hi-side buffer
IRFB4227
IRFB4227
0V
Rgate
0V
Q1p
pnp
Vo
Vs
VS
.
CSD
L-out
LP Filter
CSD
VCC
LO
Cout
npn
Q2n
Q3A
Q3B
Rgate
GNDD
OCREF
Heatsink
Lo-side buffer
IRFB4227
IRFB4227
Rgate
Q2
R19
R17
pnp
5.1V
OCREF
-B
OCSET
Trip
COM
.
TO-220
(Case Temp.)
OTP
Green
Yellow
LEDs
HOPS
UVP / OVP
DCP
RESET
Figure 16. Functional Block Diagram of Protection Circuit Implementation
The external shutdown circuit will disable the output by pulling down CSD pins . If the fault
condition persists, the protection circuit stays in shutdown until the fault is removed.
Over-Current Protection (OCP)
The OCP internal to the IRS2092S shuts down the IC if an OCP is sensed in either of the output
MOSFETs. For a complete description of the OCP circuitry, please refer to the application note
AN1138. Here is a brief description:
Low-Side Current Sensing
The low-side current sensing feature protects the low side MOSFET from an overload condition
from negative load current by measuring drain-to-source voltage across RDS(ON) during its on state.
OCP shuts down the switching operation if the drain-to-source voltage exceeds a preset trip level.
An external resistive divider R17 and R19 on the daughter board are used to program the low-side
OCP trip point.
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IRAUDAMP9 REV 2.0
Page 20 of 39
The voltage setting on the OCSET pin programs the threshold for low-side over-current sensing.
When the VS voltage becomes higher than the OCSET voltage during low-side conduction, the
IRS2092S turns the outputs OFF and pulls CSD down to -VSS.
High-Side Current Sensing
The high-side current sensing protects the high side MOSFET from an overload condition from
positive load current by measuring drain-to-source voltage across RDS(ON) during its on state. OCP
shuts down the switching operation if the drain-to-source voltage exceeds a preset trip level.
High-side over-current sensing monitors drain-to-source voltage of the high-side MOSFET during
the on state through the CSH and VS pins. The CSH pin detects the drain voltage with reference
to the VS pin, which is the source of the high-side MOSFET. In contrast to the low-side current
sensing, the threshold of the CSH pin to trigger OC protection is internally fixed at 1.2V. An
external resistive divider, R41 and R43 are used to program a hi-side OCP trip point. An external
reverse blocking diode D8 is required to block high voltage feeding into the CSH pin during low-
side conduction. By subtracting a forward voltage drop of 0.6V at D1, the minimum threshold
which can be set for the high-side is 0.6V across the drain-to-source.
Input Bus Over-Voltage Protection (OVP)
OVP is provided externally to the IRS2092S. OVP shuts down the amplifier if the bus voltage
between GND and -B exceeds 82V. The threshold is determined by a Zener diode Z9. OVP
protects the board from harmful excessive supply voltages, such as due to bus pumping at very
low frequency-continuous output in stereo mode.
Input Bus Under-Voltage Protection (UVP)
UVP is provided externally to the IRS2092S. UVP prevents unwanted audible noise output from
unstable PWM operation during power up and down. UVP shuts down the amplifier if the bus
voltage between GND and -B falls below a voltage set by Zener diode Z8.
Speaker DC-offset Protection (DCP)
DCP protects speakers against DC output current feeding to its voice coil. DC offset detection
detects abnormal DC offset and shuts down PWM. If this abnormal condition is caused by a
MOSFET failure because one of the high-side or low-side MOSFETs short circuited and remained
in the on state, the power supply needs to be cut off in order to protect the speakers. Output DC
offset greater than ±2.1V triggers DCP.
Offset Null (DC Offset) Adjustment
The IRAUDAMP9 is designed such that no output-offset nullification is required. DC offsets are
tested to be less than ±50 mV.
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IRAUDAMP9 REV 2.0
Page 21 of 39
Over-Temperature Protection (OTP)
An external NTC resistor is placed in close proximity to the low-side Q5A IRFB4227 TO-220
MOSFET. If the thermistor temperature rises above 100 °C, the OTP is activated. The OTP
protection will shut down switching by pulling the CSD pin low and will recover once the
temperature at the NTC has dropped sufficiently. This temperature protection limit yields a PCB
temperature at the MOSFET of about 100 °C. This setting is limited by the PCB material and not
by the operating range of the MOSFET.
Thermal Considerations
Due to limited heat sink size, the IRAUDAMP9 is designed for high efficiency to deliver 1 kW rated
power for 1 minute at open-air room temperature ( starting w/ Tamb: ~22 - 25C)
However, the IRAUDAMP9 requires larger heatsink design to handle one-eighth of the continuous
rated power, which is generally considered to be a normal operating condition for safety
standards. If the user decides to increase the size of the heatsink or have a minimum forced air-
cooling, the daughter board can handle continuous rated power.
Figure 17. Thermal image of the heatsink assembly during 1/8 rated power burn-in test.
www.irf.com
IRAUDAMP9 REV 2.0
Page 22 of 39
Short Circuit Protection Response
Figures 18-19 show over current protection reaction time of the IRAUDAMP9 in a short circuit
event. As soon as the IRS2092S detects an over current condition, it shuts down PWM. After one
second, the IRS2092S tries to resume the PWM. If the short circuit persists, the IRS2092S repeats
try and fail sequences until the short circuit is removed.
Figure 18. Positive-side OCP waveforms during short circuit test at 10W load condition.
High side OCP Calculation :
Given:
Vf = 0.7V, RdsON : 9.85 mohm : 2 // IRFB4227
VdsON = Idtrip * RdsON = 0.985 V
Let R43 = 2.2 kohm, R41 = 5.6 kohm
Vth
*(R41+ R43)
R41
OCH
(
) −Vf )
Idtrip _ Hi−side
=
= Calculated OCP current limit: ~99 Apk
RdsON
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IRAUDAMP9 REV 2.0
Page 23 of 39
Figure 19 Negative-side OCP waveforms during short circuit test at clipping condition.
Lo- side OCP Calculation :
Given: Vref = 5.1V
RdsON ( for 2 // IRFB4227) : 9.85 mohm
Let R19 = 8.2 kohm, R17 = 2.0 kohm
VOCset = Vref * R17 / (R17+R19)
I
dtrip_Lo-side * Rds
= VOCset
ON
R17
Vref *(
)
(R17 + R19)
RdsON
Idtrip _ Lo−side
=
= Calculated OCP current limit: ~101 Apk
www.irf.com
IRAUDAMP9 REV 2.0
Page 24 of 39
Schematic Diagrams
U_AMP9_PROT_VOL
IRAUDAMP9_PROT_VOL Rev_2.0.Schdoc
U_AMP9_PWM_Ch1 only
IRAUDAMP9_PWM_HOPS Rev_2.0.Schdoc
GND
POWERGND
+5V
GND
POWER GND
+5V
-5V
-5V
-B
-B
+B
+B
SD
SD
CH1 O
INLEFT
INLEFT_1
CH1 O
INLEFT
INLEFT_1
Tri p Rest art
Tri p Rest art
VCC
U_AMP9_SYNC_PS
IRAUDAMP9_SYNC_PSRev_2.0.Schdoc
GND
POWERGND
+5V
-5V
Figure 20 System Connection Diagram
-B
+B
VCC
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IRAUDAMP9 REV 2.0
Page 25 of 39
opti onal f or A MP9
R80
U13
1CLK
+B
+5V
R81
33K
R82
47R
100R
VCC
2CLK
2CLR
2QA
2QB
C62
C64
10uF, 16V
C63
C65
10uF, 16V
1CLR
1QA
1QB
1QC
1QD
0.1uF, 16V
SW
U14
OE
0.1uF, 16V
+5V
R84
10K
VDD
R85
68k
S1A
R86
47K
Z7
18V
Z8
R90
100R
D19
1N4148
GND OUT
CSX750P
36V
R87
D20
R89
4.7k
100K
Z9
82V
OT
R91
CStart
1N4148
100K
SW-3WAY_A-B
SW-3WAY_A-B
2QC
D21
1N4148
C66
100uF, 16V
+5V
DCP
R92
10k
GND
2QD
UVP
R88
47R
S1B
SW
R94
100R
SN74LV393A
Q8
MMBT5551
Q9
MMBT5551
U_1
1A
C67
0.1uF, 100V
S3
SW-PB
VCC
R95
47K
R96
47K
R97
68k
1Y
2A
2Y
3A
3Y
6A
6Y
5A
5Y
4A
4Y
R98
100R
R99
10k
OVP
-B
Trip and restart
SYNC
+B
-B
+B
R100
R101
47R
J6
BNC
5K POT
R102
C68
C69
-B
R103
82k
10uF, 16V
0.1uF, 16V
-5V
+5V
-5V
330R
C70
100pF, 50V
EXT. CLK
GND
+5V
74HC14
POWERGND
CLK1
+5V
+B
R104
1K
GND
S2A
S
NORMAL1
O
T
R105
47K
Q10
MMBT5401
R106
1K
R111
SW-3WAY_A-B
PROTECTION1
R107
47K
CLK2
R108
100K
MUTE
47R
R110
5.76k
Q12
MMBT5551
R132
open
J9
1418-ND
CH2
R112
100K
R113
5.76k
DC protection
GND
unst uff f or A MP9
DCP
R116
100K
R120
R117
100K
R118 R119
100K 100K
IRAUDAMP9_PROT_VOL Rev_2.0.Schdoc
R131
open
C71
330uF, 16V
R156
open
R121
1k
U_3
ZCEN
CS
5.76k
R123
47K
Q13
AINL
INRIGHT_1
MMBT5401
R133 47R
R134 47R
CS
CS
AGNDL
C77
+5V
R124
5.76k
SDATAI SDATAI
+5V
SDATAI AOUTL
INRIGHT
R126
5.76k
10uF, 50V
-5V
R115 10R
R128 0R0
R122 0R0
C78
C79
0.1uF, 16V
U_2
R127
VD+
VA-
VA+
-5V
C1
Q14
MMBT5551
R153
0R0
10uF, 16V
5.76k
10uF, 50V
R135
P1
DGRD
SCLK
+5V
8
7
6
5
1
VSS
VDD
CS
1
2
3
6
5
4
J8
C75
10uF, 50V
+5V
R130
R129
47K
SCLK
AOUTR
INLEFT
2 CS
VR0
CS
2
1
CT2265
47R
SDATAI
SDATAO AGNDR
3
4
VR1
SDATA
SIMUL
SDATAI
C80
10nF, 50V
-B
PVT412 Photorelay
N/A
MUTE
MUTE
AINR
INLEFT_1
R157
CLK
R114
CS3310
100R
open
3310IR02
SCLK
SCLK
R109
100K
J7
CH1
1418-ND
Figure 21 Mother Board Schematic Diagram
Housekeeping Protection and Volume Control Circuit
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IRAUDAMP9 REV 2.0
Page 26 of 39
IRAUDAMP9_PWM_HOPS Rev_2.0.Schdoc
R152 0R0
IN1 for AMP9
C32
L4
22uH
150pF
CH1 OUT
C33
J1
R38 100K
R39 1K
R154
1K
R40
CH1 IN
INLEFT
1
2
3.3K
C37
10uF, 50V
C34
2.2uF, 275V
R43
2.2k
OPEN 277-1022
C72
2.2nF
R45A
47K
Optional for AMP9
+5V
-B
R41
22k
Q9A
MMBT5551
R46
470R
2.2uF, 16V
D5A
C39
C40
33pF
High Output Peak Shutdown (HOPS) ckt.
R56
47R
CLK1
U8
74AHC1G04
IN1 for AMP9
1
J2
PWM1
2
VSS
SIGNAL GND1
SIGNAL GND1
SIGNAL GND1
NC
-5V
VSS for AMP 9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CH2 O
CH2 O
CH2O
CH2 O
-B
-B
-B
3
+B
4
C45
C46
5
1200uF, 100V
1200uF, 100V
-B
R58
R59
6
VSS for AMP9
-5V
-B
200K 200K
CH1 O
CH1 O
CH1 O
CH1 O
+B
+B
+B
+B
D23
7
VCC
VCC
C47
C48
RS1DB
J3
1200uF, 100V
1200uF, 100V
8
3
SIGNAL GND2
SIGNAL GND2
VAA
2
1
-B
9
VAA for AMP9
+5V
277-1272
10
11
12
J4
SD
SD
PWM2
J10
Figure 22 Mother Board Schematic Diagram
Input / Output Power Connection
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IRAUDAMP9 REV 2.0
Page 27 of 39
+B
-B
+B
+B
Q1
FZT855TA
R1
10R
-B
For AMP9
R2
10K
C
E
+B
VCC
-5V
VCC
-5V
+5V
SYNC
+5V
Z1
15V
R3
10K
SYNC
POWERGND
C3
C4
1uF, 100V
R4
10R
For AMP9
Z2
56V
4.7uF, 100V
Q18
PZT2222A
R147
10R
Q2
C
E
+5V
R5
10K
GND
For AMP9
Q3
FZT855TA
MMBTA92
SD3
B
R6
C2
10uF, 16V
+B
20k
Z10
R7
10K
5.6V
Z3
56V
Z4
5V
C6
4.7uF, 100V
C7
1uF, 100V
U3
VCC
BST
C11
0.022uF, 50V
-B
SD
PRE
SW
IS
L2
R141
0R0
R146
47.5k
7V
R15
VIN
SYNC3
C10
0.470uF, 16V
U2
470uH
R12
47R
R14
10R
SYNC
VCC
BST
PRE
SW
IS
4.7k 1%
D2
B180
SD3
C9
0.022uF, 50V
COMP PGND
SD
C16
4.7uF, 50V
C86
4.7uF, 100V
L1
12V
R151
0R0
R150
4.7R
R17
18.7k
FB
RT
OUT
SS
VIN
VCC
SYNC1
470uH
R8
R18
1.00k 1%
R144
47.5k
R9
R10
8.66k
SYNC
C13
0.470uF, 16V
10R
D1
B180
47R
RAMP AGND
LM5574
COMP PGND
R19
20.5k
C19
0.0082uF, 50V
C20
330pF, 100V
R11
18.7k
C12
C84
C35
C83
FB
RT
OUT
SS
C21
0.0068uF, 50V
R13
1.00k
4.7uF, 50V 4.7uF, 100V 10uF, 16V 10uF, 16V
C22
0.0022uF, 100V
RAMP AGND
LM5574
R16
20.5k
C14
0.0082uF, 50V
C15
330pF, 100V
C17
0.0068uF, 50V
C18
0.0022uF, 100V
-B
D3
B1100
C23
4.7uF, 100V
C24
1uF, 100V
U4
VCC
BST
PRE
SW
IS
C25
SD
0.022uF, 50V
L3
R148
0R0
R145
47.5k
VIN
SYNC2
470uH
R29
47R
R30
10R
R31
4.7k 1%
SYNC
D4
B180
COMP PGND
C27
C85
R32
18.7k
4.7uF, 50V
4.7uF, 100V
FB
RT
OUT
SS
R36
1.00k 1%
Q20
PZT2907AT1
R149
C26
0.470uF, 16V
-5V
10R
RAMP AGND
LM5574
R37
20.5k
C28
0.0082uF, 50V
C29
330pF, 100V
For AMP9
C30
0.0068uF, 50V
R142
20k
C31
0.0022uF, 100V
-B
C82
10uF, 16V
Z12
5.6V
-7V -Vout_PS
Figure 23 Mother Board Schematic Diagram
DCDC converter for Vaa, Vss and Vcc power supplies
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IRAUDAMP9 REV 2.0
Page 28 of 39
IRAUDAMP9-1.7-kW Single Channel Daughter Board
IRS2092S -TO220 Buffered Module Schematic Diagram
MMBT5551
Q100
SD
SCH_AMP9_DB_2092_BUF-TO220-Rev 2.0
Drawn by: ISRAEL SERRANO 2012-0308
VSS
VSS
ZXTP25100BFH
R103
715R
+B
+75VBus
R107
100R
+75V Bus
R52
75k
R104
4.7k
Q101
C33
OTP1
0.47 uF250V
C100
TH1
R45
0R
Rp1
0 R
ZXTN25100BFH
Q9
C34
OPTIONAL-
(Unst uff for
1kW-AMP9)
R40
33k
0.1uF
R105 10k
0.47 uF250V
TH2.2k
C18
3.3uF
CH1 Output
to LPF
R101 4.7k
R43
2.2k
R102 10K
C32
2.2uF
VSS
+5V
D1
CH1 O
C37
1 nF
J2-A
+B
R7
10R
R25
10K
1
2
3
4
5
6
7
8
16
R41
5.6k
VAA
VAA
GND
IN-
CSH
Q6A
R23B Q6B
4.7R
R23C Q6C
4.7R
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1K
P1
R23A
4.7R
VB
Audio Gnd 1
R21 470
15
14
13
12
11
10
9
GND1
VB
HO
VS
Q8
R37
10R
0R
CH1- input
IRFB4227
R22A
IRFB4227
R22B
IRFB4227
R22C
IN-1
R46
R32
C5
22uF
C21 C23
1nF 1nF
C1
1nF
D6
10K
10K
ZXTP25100BFH
10K
3.01k
J1-A
C30
A26578-ND
COMP
CSD
10nF
Heatsink
1
2
3
4
5
6
R1
R26
4.7R
D4
VCC
LO
VCC
0R
R44
100R
C36
1 nF
C10
10uF
ZXTN25100BFH
Q3
C31
2.2uF
-5V
A26568-ND
R3
J2-B
-B
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
0R
R21A
4.7R
R21B
Q5B
4.7R
R21C
Q5C
4.7R
Q5A
R19
10R
VREF
OCSET
COM
DT
VSS
R36
10R
8.2k
R30
-B
C12
3.3uF
R9
10R
VCC
VAA
IRFB4227
R20A
IRFB4227
R20B
IRFB4227
R20C
C35
R12
4.7K
U1 IRS2092S
J1-B
OCset
0.1uF
R5
7
8
9
10
11
12
R50
75k
A26578-ND
10K
open
10K
10K
R35
1R
R17
2k
SD
C3
10uF
A26568-ND
GND2
R13
0 R
Q2
ZXTP25100BFH
D7
DS1
-75VBus
-B
-75VBus
Figure 24 IRAUDAMP9 Schematic Diagram for Daughter Board
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IRAUDAMP9 REV 2.0
Page 29 of 39
IRAUDAMP9 Fabrication Bill Of Materials (BOM)
Table 1 IRAUDAMP9 Mother Board’s BOM
Item
PN
Designator
565-1106-ND
Qty
4
Description
Vendor
DigiKey
DigiKey
1
2
C1, C33, C75, C77
CAP 10UF 50V ELECT SMG RAD
CAP 10UF 16V CERAMIC X7R 1206
C2, C82, C83
C3, C6, C23, C84, C85,
C86
PCC13491CT-ND
3
3
4
565-1147-ND
6
3
3
3
3
3
3
3
3
1
CAP 4.7UF 100V ELECT SMG RAD
CAP CER 1.0UF 100V 10% X7R 1210
CAP CER 22000PF 50V 5% C0G 0805
CAP CERM .47UF 10% 16V X7R 0805
CAP CER 4.7UF 50V 10% X7R 1210
CAP CER 8200PF 50V C0G 5% 0805
CAP 330PF 100V CERAMIC X7R 0805
CAP CERM 6800PF 5% 50V X7R 0805
CAP CERM 2200PF 5% 100V X7R 0805
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
C4, C7, C24
C9, C11, C25
C10, C13, C26
C12, C16, C27
C14, C19, C28
C15, C20, C29
C17, C21, C30
C18, C22, C31
C32
490-1857-1-ND
490-1644-1-ND
478-1403-1-ND
490-1864-1-ND
445-2685-1-ND
PCC1982CT-ND
478-3772-1-ND
478-3746-1-ND
445-2378-1-ND
5
6
7
8
9
10
11
12
CAP CER 150PF 3000V C0G 10% 1812
CAP 2.2 uF 275/280VAC X2 METAL
POLYPRO
13
14
C34
399-5432-ND
1
5
DigiKey
DigiKey
C35, C64, C65, C69,
C79
PCE3101CT-ND
CAP 10UF 16V ELECT FC SMD
C37, R8, R12, R29,
15
16
17
18
19
20
21
22
23
24
25
26
27
28
R131, R132, R156, R157 open
8
1
1
4
4
1
1
1
1
1
1
3
1
1
Bypass vol ctrl, open
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
C39
PCC1931CT-ND
CAP 2.2UF 16V CERAMIC X7R 1206
CAP CERM 33PF 5% 100V NP0 0805
CAP 1200UF 100V ELECT SMG RAD
CAP .1UF 16V CERAMIC X7R 0805
CAP 100UF 16V ELECT SMG RAD
CAP CER .10UF 100V X7R 10% 0805
CAP 100PF 50V CERM CHIP 0805 SMD
CAP 330UF 16V ELECT VR RADIAL
CAP CER 2200PF 100V C0G 5% 0805
CAP 10000PF 50V CERM CHIP 0805
DIODE SCHOTTKY 80V 1A SMA
DIODE SCHOTTKY 100V 1A SMA
DIODE SWITCH 100V 200MW SOD323
C40
478-1281-1-ND
565-1161-ND
C45, C46, C47, C48
C62, C63, C68, C78
PCC1812CT-ND
565-1037-ND
C66
C67
445-1418-1-ND
PCC101CGCT-ND
493-1042-ND
C70
C71
C72
445-2322-1-ND
PCC103BNCT-ND
B180DICT-ND
B1100-FDICT-ND
C80
D1, D2, D4
D3
D5A
BAV19WS-7-F
1N4148WTPMSCT-
ND
29
30
D19, D20, D21
D23
3
1
DIODE SWITCH 100V 150MA SOD123
DigiKey
DigiKey
RS1DB-FDICT-ND
277-1271-ND
A26453-ND
DIODE FAST REC 200V 1A SMB
CONN TERM BLOCK 2POS 9.52MM
PCB
CONN RECEPT 6POS .100 VERT
DUAL
CONN TERM BLOCK 3POS 9.52MM
PCB
31
32
33
34
J1
J2
J3
J4
1
1
1
1
DigiKey
DigiKey
DigiKey
DigiKey
277-1272-ND
A26454-ND
CONN RECEPT 8POS .100 VERT
DUAL
CONN JACK BNC R/A 50 OHM PCB
TIN
35
36
J6
A32248-ND
CP-1418-ND
1
2
DigiKey
DigiKey
J7, J9
CONN RCA JACK R/A BLACK PCB
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IRAUDAMP9 REV 2.0
Page 30 of 39
TERMINAL BLOCK 7.50MM VERT
2POS
CONN RECEPT 6POS .100 VERT
DUAL
ED1567
37
38
J8
1
1
DigiKey
DigiKey
J10
A26453-ND
39
40
L1, L2, L3
513-1051-1-ND
3
1
INDUCTOR SHIELD PWR 470UH SMD
DigiKey
Sagami
L4
7G31A-220M-R
160-1140-ND,
160-1143-ND
22uH Power ferrite inductor
LED 3MM GREEN TRANSPARENT,
LED 3MM HI-EFF RED TRANSPARENT
NORMAL1,
PROTECTION1
41
42
43
44
2
1
2
1
DigiKey
DigiKey
DigiKey
DigiKey
P1
PVT412LPBF-ND
FZT855CT-ND
Power MOSFET Photovoltaic Relay
TRANS NPN 150V 4000MA SOT-223
Q1, Q3
Q2
MMBTA92DICT-ND
MMBT5551-7DICT-
ND
TRANSISTOR PNP -300V SOT-23
TRANS 160V 350MW NPN SMD SOT-
23
45
Q8, Q9, Q9A, Q12, Q14
5
DigiKey
TRANS 150V 350MW PNP SMD SOT-
23
46
47
Q10, Q13
Q18
MMBT5401DICT-ND
2
1
DigiKey
DigiKey
PZT2222ACT-ND
PZT2907AT1GOSCT
-ND
TRANS AMP NPN GP 40V .5A SOT-223
TRANS SS SW PNP 600MA 60V
SOT223
48
49
Q20
1
5
DigiKey
DigiKey
R1, R4, R9, R14, R30
R2, R3, R5, R7, R84,
R92, R99
PT10XCT-ND
RES 10 OHM 1W 5% 2512 SMD
50
51
52
53
54
55
56
57
P10KACT-ND
7
2
1
3
1
2
3
2
RES 10K OHM 1/8W 5% 0805 SMD
RES 20K OHM 1/8W 5% 0805 SMD
RES 8.66K OHM 1/8W 1% 0805 SMD
RES 18.7K OHM 1/8W 1% 0805 SMD
RES 1.00K OHM 1/8W 1% 0805 SMD
RES 4.70K OHM 1/8W 1% 0805 SMD
RES 20.5K OHM 1/8W 1% 0805 SMD
RES 1.00K OHM 1/8W 1% 0805 SMD
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
R6, R142
R10
P20KACT-ND
RHM8.66KCRCT-ND
P18.7KCCT-ND
P1.00KCCT-ND
P4.7KCCT-ND
P20.5KCCT-ND
R11, R17, R32
R13
R15, R31
R16, R19, R37
R18, R36
P1.00KCCT-ND
PPC100KW-3JCT-
ND
58
59
60
61
62
R38
R39
R40
R41
1
1
1
1
1
RES 100K OHM METAL FILM 3W 5%
RES 1.0K OHM 1/4W 5% 1206 SMD
RES 3.3K OHM 1/10W .1% 0805 SMD
RES 22K OHM 1/8W 5% 0805 SMD
RES 2.2K OHM 1W 5% 2512 SMD
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
P1.0KECT-ND
P3.3KZCT-ND
P22KACT-ND
PT2.2KXCT-ND
R43
R45A, R86, R95, R96,
63
64
R105, R111, R123, R129 P47KACT-ND
8
1
RES 47K OHM 1/8W 5% 0805 SMD
RES 470 OHM 1/8W 5% 0805 SMD
DigiKey
DigiKey
R46
311-470ARCT-ND
R56, R82, R88, R101,
65
66
67
68
69
R107, R133, R134, R135 P47ACT-ND
8
2
3
1
2
RES 47 OHM 1/8W 5% 0805 SMD
RES 200K OHM 1/8W 5% 0805 SMD
RES 100 OHM 1/4W 5% 1206 SMD
RES 33K OHM 1/8W 5% 0805 SMD
RES 68K OHM 1/8W 5% 0805 SMD
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
R58, R59
R80, R90, R94
R81
P200KACT-ND
P100ECT-ND
P33KACT-ND
P68KACT-ND
R85, R97
R87, R91, R108, R109,
R112,
R116,
R117,
70
71
72
73
74
75
76
R118, R119
P100KACT-ND
P4.7KACT-ND
P100ACT-ND
3362H-502LF-ND
P330ACT-ND
P82KACT-ND
9
1
2
1
1
1
4
RES 100K OHM 1/8W 5% 0805 SMD
RES 4.7K OHM 1/8W 5% 0805 SMD
RES 100 OHM 1/8W 5% 0805 SMD
POT 5.0K OHM 1/4" SQ CERM SL ST
RES 330 OHM 1/8W 5% 0805 SMD
RES 82K OHM 1/8W 5% 0805 SMD
RES 1.0K OHM 1/8W 5% 0805 SMD
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
R89
R98, R114
R100
R102
R103
R104, R106, R121, R154 311-1.0KARCT-ND,
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IRAUDAMP9 REV 2.0
Page 31 of 39
R110,
R113,
R120,
77
78
79
R124, R126, R127
P5.76KFCT-ND
P10ECT-ND
6
1
4
RES 5.76K OHM 1/4W 1% 1206 SMD
RES 10 OHM 1/4W 5% 1206 SMD
DigiKey
DigiKey
DigiKey
R115
R122, R128, R152, R153 P0.0ECT-ND
RES ZERO OHM 1/4W 5% 1206 SMD
POT 10K OHM 9MM VERT MET
BUSHING
80
81
82
83
84
85
86
87
88
89
90
91
92
R130
P3G7103-ND
RMCF1/100RCT-ND
P47.5KCCT-ND
PT10XCT-ND
PT4.7XCT-ND
EG1944-ND
1
3
3
2
1
2
1
3
1
1
1
1
1
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
Tachyonix
R141, R148, R151
RES 0.0 OHM 1/8W 0805 SMD
R144, R145, R146
RES 47.5K OHM 1/8W 1% 0805 SMD
RES 10 OHM 1W 5% 2512 SMD
RES 4.7 OHM 1W 5% 2512 SMD
SWITCH SLIDE DP3T .2A L=6MM
6MM LIGHT TOUCH SW H=5
R147, R149
R150
S1, S2
S3
P8010S-ND
U2, U3, U4
U8
LM5574MT-ND
296-1089-1-ND
296-11643-1-ND
300-8001-1-ND
296-1194-1-ND
3310IR02
IC REG BUCK 75V 0.5A 16-TSSOP
IC SINGLE INVERTER GATE SOT23-5
DUAL 4-BIT BINARY COUNTERS
OSCILLATOR 1.5440 MHZ SMT
IC HEX SCHMITT-TRIG INV 14-SOIC
U13
U14
U_1
U_2
3310SO6S Digital IC
Amplifiers - Audio Stereo Digital Volume
Control
93
94
95
96
97
98
99
100
U_3
Z1
598-1599-ND
BZT52C15-7DICT-
ND
MMSZ5263BT1OSCT
-ND
BZT52C5V1-7DICT-
ND
BZT52C18-FDICT-
ND
BZT52C36-7DICT-
ND
MMSZ5268BT1GOS
CT-ND
1
1
2
1
1
1
1
2
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DigiKey
DIODE ZENER 15V 500MW SOD-123
DIODE ZENER 500MW 56V SOD123
DIODE ZENER 5.1V 500MW SOD-123
DIODE ZENER 500MW 18V SOD123
DIODE ZENER 36V 500MW SOD-123
DIODE ZENER 82V 500mW SOD-123
DIODE ZENER 5.6V 500MW SOD123
Z2, Z3
Z4
Z7
Z8
Z9
BZT52C5V6-FDICT-
ND
Z10, Z12
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IRAUDAMP9 REV 2.0
Page 32 of 39
Table 2 IRAUDAMP9 Daughter Board’s Bill of Materials
Item
1
Digikey / Mouser PN
445-2325-1-ND
490-1867-1-ND
T491A226K025AT
490-1867-1-ND
445-1432-1-ND
PCC103BNCT-ND
490-3368-1-ND
478-3988-1-ND
399-4678-1-ND
478-5552-1-ND
445-2686-1-ND
Designator
C1, C21, C23
Description
Qty
3
CAP CER 1000PF 250V C0G 5% 0805
CAP CER 10UF 25V 10% X7R 1210
CAP TANTALUM 22UF 25V 10% SMD
CAP CER 10UF 25V 10% X7R 1210
CAP CER 3.3UF 50V X7R 20% 1210
CAP 10000PF 50V CERM CHIP 0805
CAP CER 2.2UF 25V X7R 10% 1210
CAP CER 0.47UF 250V X7R 1812
CAP CER 0.1UF 250V X7R 1206
CAP CER 1000PF 250V X7R 1206
2
C3
1
3
C5
1
4
C10
1
5
C12, C18
C30
2
6
1
7
C31, C32
C33, C34
C35
2
8
2
9
1
10
11
C36, C37
C100
2
CAP CER 0.1UF 10V SL 5% 0805
DIODE SWITCH 100V 200MW
SOD323
1
12
13
14
BAV19WS-FDICT-ND
1N4148WS-FDICT-ND
D1
D4
1
1
1
DIODE SWITCH 75V 200MW SOD323
MURA120T3GOSCT-ND D6
DIODE ULTRA FAST 1A 200V SMA
DIODE ULTRAFAST 200V 1A DO-
214AC
15
16
ES1DFSCT-ND
160-1645-1-ND
D7
1
1
DS1
LED 468NM BLUE CLEAR 0805 SMD
CONN HEADER VERT 6POS .100
17
18
A26568-ND
A26578-ND
J1-A, J1-B
J2-A, J2-B
30AU
2
2
CONN HEADER VERT .100 16POS
30AU
POT 1.0K OHM 3MM CERM SQ TOP
SMD
19
20
21
ST32ETB102CT-ND
ZXTP25100BFHCT-ND
ZXTN25100BFHCT-ND
P1
1
3
2
Q2, Q8, Q101
Q3, Q9
TRANSISTOR PNP 100V 2A SOT23-3
TRANSISTOR NPN 100V 3A SOT23-
TRANS 160V 350MW NPN SMD
SOT23-3
22
MMBT5551-7DICT-ND
Q100
200V 65A N-Channel MOSFET
TO 220
23
24
25
26
27
28
29
IRFB4227PBF
P100ACT-ND
P10ACT-ND
open
Q5A, Q5C, Q6A, Q6C
4
2
1
1
1
1
1
R1, R107
R3
RES 100 OHM 1/8W 5% 0805 SMD
RES 10 OHM 1/8W 5% 0805 SMD
open
R5
P10ECT-ND
P10ACT-ND
P4.7KACT-ND
R7
RES 10 OHM 1/4W 5% 1206 SMD
RES 10 OHM 1/8W 5% 0805 SMD
RES 4.7K OHM 1/8W 5% 0805 SMD
R9
R12
R13, R30, R32, R44,
R45, Rp1
30
31
32
P0.0ACT-ND
P2.0KACT-ND
P8.2KACT-ND
RES 0 OHM 1/8W 5% 0805 SMD
RES 2.0K OHM 1/8W 5% 0805 SMD
RES 8.2K OHM 1/8W 5% 0805 SMD
6
1
1
R17
R19
R20A, R20B, R20C,
R22A, R22B, R22C, R25
33
P10KACT-ND
RES 10K OHM 1/8W 5% 0805 SMD
7
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IRAUDAMP9 REV 2.0
Page 33 of 39
34
RHM470CRCT-ND
R21
RES 470 OHM 1/8W 1% 0805 SMD
1
R21A, R21B, R21C,
R23A, R23B, R23C, R26
35
36
37
38
39
40
41
42
43
44
45
46
P4.7ACT-ND
RESISTOR 4.7 OHM 1/8W 5% 0805
RESISTOR 1.0 OHM 1/8W 5% 0805
RES 10 OHM 1W 5% 2512 SMD
RES 33K OHM 1/8W 5% 0805 SMD
RES 5.6K OHM 1/8W 5% 0805 SMD
RES 2.2K OHM 1/8W 5% 0805 SMD
RES 3.01K OHM 1/8W 1% 0805 SMD
RES 75.0K OHM 1/8W 1% SMD 1206
RES 4.7K OHM 1/8W 5% 0805 SMD
RES 10K OHM 1/8W 5% 0805 SMD
RES 715 OHM 1/8W .5% SMD 1206
High and Low Side Driver
7
1
2
1
1
1
1
2
2
2
1
1
P1.0ACT-ND
R35
PT10XCT-ND
R36, R37
R40
RHM33KARCT-ND
P5.6KACT-ND
R41
P2.2KACT-ND
R43
RHM3.01KCCT-ND
RT1206FRE0775KL-ND
RHM4.7KARCT-ND
RHM10KARCT-ND
R46
R50, R52
R101, R104
R102, R105
RT1206FRE07715RL-ND R103
IRS2092S
U1
Table 3 IRAUDAMP9 Mechanical Bill of Materials
No
1
2
P/N
7-342-2PP-BA
Description
To220 Heatsink 15W HTSNK assy 1
Silpad insulator pad
Quantity
Vendor
Digi-Key
2
4
3
Lock Washer
4
4
5
6
7
mounting screws / nuts
plastic TO220-bushing
Standoff
IRAUDAMP9 Main Board
IRAUDAMP9 Daughter Board
4 sets
4
6
1
1
AMP9 PCB MB
AMP9 PCB DB
8
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IRAUDAMP9 REV 2.0
Page 34 of 39
IRAUDAMP9 PCB Specifications:
1. Two Layers SMT PCB with through holes
2. 1/16 thickness
3. 2/0 OZ Cu
4. FR4 material
5. 10 mil lines and spaces
6. Solder Mask to be Green enamel EMP110 DBG (CARAPACE) or Enthone Endplate DSR-
3241or equivalent.
7. Silk Screen to be white epoxy non conductive per IPC–RB 276 Standard.
8. All exposed copper must finished with TIN-LEAD Sn 60 or 63 for 100u inches thick.
9. Tolerance of PCB size shall be 0.010 –0.000 inches
10. Tolerance of all Holes is -.000 + 0.003”
11. PCB acceptance criteria as defined for class II PCB’S standards.
Gerber Files Apertures Description:
All Gerber files stored in the attached CD-ROM were generated from Protel Altium Designer Altium
Designer 6.
1. .gtl
2. .gbl
3. .gto
Top copper, top side
Bottom copper, bottom side
Top silk screen
4. .gbo Bottom silk screen
5. .gts Top Solder Mask
6. .gbs Bottom Solder Mask
7. .gko Keep Out,
8. .gm1 Mechanical1
9. .gd1 Drill Drawing
10. .gg1 Drill locations
11. .txt
CNC data
12. .apr
Apertures data
Additional files for assembly that may not be related with Gerber files:
13. .pcb PCB file
14. .bom Bill of materials
15. .cpl Components locations
16. .sch Schematic
17. .csv Pick and Place Components
18. .net Net List
19. .bak Back up files
20. .lib
PCB libraries
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IRAUDAMP9 REV 2.0
Page 35 of 39
Figure 25 IRAUDAMP9 Mother board PCB Top Overlay (Top View)
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IRAUDAMP9 REV 2.0
Page 36 of 39
Figure 26 IRAUDAMP9 Mother board PCB Bottom Layer (Top View)
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IRAUDAMP9 REV 2.0
Page 37 of 39
Figure 27 IRAUDAMP9 Daughter board PCB Top Overlay (Top View)
Figure 28 IRAUDAMP9 Daughter board PCB Bottom Layer (Top View)
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IRAUDAMP9 REV 2.0
Page 38 of 39
Revision changes descriptions
Revision
Rev D2
Rev E3
Rev 1.0
Rev 2.A
Changes description
Date
Release for pre-production.
Release for pre-production.
Release for production.
1.Preliminary update on Figures 18-24
(pages 23-29).
Aug, 18 2011
Mar. 18, 2011
Mar. 25, 2011
Feb. 08, 2012
2.Preliminary updates on Mother board
BOM and Daughter board Schematic
diagrams & BOM.
Rev 2.0
1. Update Figures 18-28 (pages 23-39)
and add text for OCP calculation.
Mar. 18, 2012
2.1 Change values in Daughter Board
Schematic Diagram and BOM (DT :R5,
R13, Hi-OCP R43/R41, Lo-OCP R17).
2.2. Add R107 on Daughter Board’s OTP
circuit.
2.3 Updates on Mother board BOM and
Daughter board Schematic diagrams &
BOM.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245
Data and specifications subject to change without notice.
Tel: (310) 252-7105
03/25/2011
www.irf.com
IRAUDAMP9 REV 2.0
Page 39 of 39
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