IPS70R900P7S [INFINEON]

顺应当下和未来反激式拓扑产品的趋势而开发——全新 700V CoolMOS™ P7 超结 MOSFET 系列产品具有比目前所使用超结技术更强的性能,适用于手机充电器或笔记本电脑适配器等低功率 SMPS 市场。客户反馈与 20 多年的超结 MOSFET 经验相结合,700V CoolMOS™ P7 在诸多方面成为目标应用的最佳选择:;
IPS70R900P7S
型号: IPS70R900P7S
厂家: Infineon    Infineon
描述:

顺应当下和未来反激式拓扑产品的趋势而开发——全新 700V CoolMOS™ P7 超结 MOSFET 系列产品具有比目前所使用超结技术更强的性能,适用于手机充电器或笔记本电脑适配器等低功率 SMPS 市场。客户反馈与 20 多年的超结 MOSFET 经验相结合,700V CoolMOS™ P7 在诸多方面成为目标应用的最佳选择:

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IPS70R900P7S  
MOSFET  
IPAKꢀSL  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
tab  
CoolMOS™ꢀisꢀaꢀrevolutionaryꢀtechnologyꢀforꢀhighꢀvoltageꢀpower  
MOSFETs,ꢀdesignedꢀaccordingꢀtoꢀtheꢀsuperjunctionꢀ(SJ)ꢀprincipleꢀand  
pioneeredꢀbyꢀInfineonꢀTechnologies.  
TheꢀlatestꢀCoolMOS™ꢀP7ꢀisꢀanꢀoptimizedꢀplatformꢀtailoredꢀtoꢀtargetꢀcost  
sensitiveꢀapplicationsꢀinꢀconsumerꢀmarketsꢀsuchꢀasꢀcharger,ꢀadapter,  
lighting,ꢀTV,ꢀetc.  
TheꢀnewꢀseriesꢀprovidesꢀallꢀtheꢀbenefitsꢀofꢀaꢀfastꢀswitchingꢀSuperjunction  
MOSFET,ꢀcombinedꢀwithꢀanꢀexcellentꢀprice/performanceꢀratioꢀandꢀstateꢀof  
theꢀartꢀease-of-useꢀlevel.ꢀTheꢀtechnologyꢀmeetsꢀhighestꢀefficiency  
standardsꢀandꢀsupportsꢀhighꢀpowerꢀdensity,ꢀenablingꢀcustomersꢀgoing  
towardsꢀveryꢀslimꢀdesigns.  
Drain  
Pin 2, Tab  
Features  
•ꢀExtremelyꢀlowꢀlossesꢀdueꢀtoꢀveryꢀlowꢀFOMꢀRDS(on)*QgꢀandꢀRDS(on)*Eoss  
•ꢀExcellentꢀthermalꢀbehavior  
•ꢀIntegratedꢀESDꢀprotectionꢀdiode  
Gate  
Pin 1  
•ꢀLowꢀswitchingꢀlossesꢀ(Eoss  
•ꢀProductꢀvalidationꢀacc.ꢀJEDECꢀStandard  
)
Source  
Pin 3  
Benefits  
•ꢀCostꢀcompetitiveꢀtechnology  
•ꢀLowerꢀtemperature  
•ꢀHighꢀESDꢀruggedness  
•ꢀEnablesꢀefficiencyꢀgainsꢀatꢀhigherꢀswitchingꢀfrequencies  
•ꢀEnablesꢀhighꢀpowerꢀdensityꢀdesignsꢀandꢀsmallꢀformꢀfactors  
Potentialꢀapplications  
RecommendedꢀforꢀFlybackꢀtopologiesꢀforꢀexampleꢀusedꢀinꢀChargers,  
Adapters,ꢀLightingꢀApplications,ꢀetc.  
Pleaseꢀnote:ꢀForꢀMOSFETꢀparallelingꢀtheꢀuseꢀofꢀferriteꢀbeadsꢀonꢀtheꢀgate  
orꢀseperateꢀtotemꢀpolesꢀisꢀgenerallyꢀrecommended.  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
VDS @ Tj=25°C  
RDS(on),max  
Value  
700  
0.9  
Unit  
V
Qg,typ  
6.8  
nC  
A
ID,pulse  
12.8  
0.9  
Eoss @ 400V  
V(GS)th,typ  
µJ  
V
3
ESD class (HBM)  
1C  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPS70R900P7S  
PG-TO 251-3  
70S900P7  
see Appendix A  
Final Data Sheet  
1
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Final Data Sheet  
2
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTjꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
6.0  
3.5  
TC = 20°C  
A
Continuous drain current1)  
Pulsed drain current2)  
ID  
TC = 100°C  
ID,pulse  
IAS  
-
-
-
-
-
-
12.8  
3.6  
A
A
TC=25°C  
Application (Flyback) relevant  
avalanche current, single pulse3)  
measured with standard leakage  
inductance of transformer of 5µH  
MOSFET dv/dt ruggedness  
Gate source voltage  
dv/dt  
VGS  
100  
V/ns VDSꢀ=0...400V  
-16  
-30  
-
-
16  
30  
static;  
V
AC (f>1 Hz)  
Power dissipation  
Ptot  
-
-
-
-
-
-
-
-
30.5  
150  
4.1  
12.8  
1
W
°C  
A
TC=25°C  
-
Operating and storage temperature  
Continuous diode forward current  
Diode pulse current2)  
Reverse diode dv/dt4)  
Maximum diode commutation speed4) dif/dt  
Tj,ꢀTstg  
IS  
-40  
-
-
-
-
-
TC=25°C  
TC = 25°C  
IS,pulse  
A
dv/dt  
V/ns VDSꢀ=0...400V,ꢀISD<=IS,ꢀTj=25°C  
A/µs VDSꢀ=0...400V,ꢀISD<=IS,ꢀTj=25°C  
50  
Insulation withstand voltage VISO  
n.a.  
V
Vrms, TC=25°C, t=1min  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
Max.  
4.1  
Thermal resistance, junction  
RthJC  
-
-
-
-
°C/W -  
Thermal resistance, junction - ambient RthJA  
62  
°C/W leaded  
Thermal resistance, junction - ambient  
for SMD version  
RthJA  
-
-
-
-
-
°C/W n.a.  
Soldering temperature, wavesoldering  
only allowed at leads  
Tsold  
260  
°C  
1.6 mm (0.063 in.) from case for 10s  
1) Limited by Tj max. Tj = 20°C. Maximum duty cycle D=0.5  
2) Pulse width tp limited by Tj,max  
3) Proven during verification test. For explanation please read AN - CoolMOSTM 700V P7.  
4)VDClink=400V;ꢀVDS,peak<V(BR)DSS;ꢀidenticalꢀlowꢀsideꢀandꢀhighꢀsideꢀswitchꢀwithꢀidenticalꢀRG  
Final Data Sheet  
3
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
700  
Typ.  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
V(GS)th  
-
V
V
VGS=0V,ꢀID=1mA  
2.50  
3
3.50  
VDS=VGS,ꢀID=0.06mA  
-
-
-
10  
1
-
VDS=700V,ꢀVGS=0V,ꢀTj=25°C  
VDS=700V,ꢀVGS=0V,ꢀTj=150°C  
Zero gate voltage drain current  
IDSS  
µA  
µA  
Gate-source leakage current incl. Zener  
diode  
IGSS  
RDS(on)  
RG  
-
-
1
VGS=20V,ꢀVDS=0V  
-
-
0.74  
1.53  
0.90  
-
VGS=10V,ꢀID=1.1A,ꢀTj=25°C  
VGS=10V,ꢀID=1.1A,ꢀTj=150°C  
Drain-source on-state resistance  
Gate resistance  
-
1.6  
-
f=1ꢀMHz,ꢀopenꢀdrain  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
211  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
Output capacitance  
Ciss  
-
-
-
-
pF  
pF  
VGS=0V,ꢀVDS=400V,ꢀf=250kHz  
VGS=0V,ꢀVDS=400V,ꢀf=250kHz  
Coss  
5
Effective output capacitance, energy  
related1)  
Co(er)  
Co(tr)  
td(on)  
tr  
-
-
-
-
-
-
13  
-
-
-
-
-
-
pF  
pF  
ns  
ns  
ns  
ns  
VGS=0V,ꢀVDS=0...400V  
Effective output capacitance, time  
related2)  
177  
12  
ID=constant,ꢀVGS=0V,ꢀVDS=0...400V  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
Turn-on delay time  
Rise time  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
4.7  
58  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
Turn-off delay time  
Fall time  
td(off)  
tf  
VDD=400V,ꢀVGS=13V,ꢀID=0.9A,  
RG=5.3Ω  
31  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics  
Values  
Typ.  
0.9  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Qgs  
-
-
-
-
-
-
-
-
nC  
nC  
nC  
V
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
VDD=400V,ꢀID=0.9A,ꢀVGS=0ꢀtoꢀ10V  
Qgd  
2.6  
Qg  
6.8  
Gate plateau voltage  
Vplateau  
4.4  
1)Co(er)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V  
2)Co(tr)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V  
Final Data Sheet  
4
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics  
Values  
Typ.  
0.9  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Diode forward voltage  
VSD  
trr  
-
-
-
-
-
-
-
-
V
VGS=0V,ꢀIF=1.4A,ꢀTj=25°C  
Reverse recovery time  
160  
0.5  
ns  
µC  
A
VR=400V,ꢀIF=0.9A,ꢀdiF/dt=50A/µs  
VR=400V,ꢀIF=0.9A,ꢀdiF/dt=50A/µs  
VR=400V,ꢀIF=0.9A,ꢀdiF/dt=50A/µs  
Reverse recovery charge  
Peak reverse recovery current  
Qrr  
Irrm  
7
Final Data Sheet  
5
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀSafeꢀoperatingꢀarea  
40  
102  
35  
30  
25  
20  
15  
10  
5
1 µs  
101  
100  
10 µs  
100 µs  
1 ms  
10 ms  
10-1  
10-2  
10-3  
DC  
0
0
25  
50  
75  
100  
125  
150  
100  
101  
102  
103  
TCꢀ[°C]  
VDSꢀ[V]  
Ptot=f(TC)  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
102  
101  
101  
100  
1 µs  
10 µs  
0.5  
0.2  
100 µs  
1 ms  
100  
0.1  
10 ms  
DC  
10-1  
10-2  
10-3  
0.05  
0.02  
0.01  
single pulse  
10-1  
100  
101  
102  
103  
10-5  
10-4  
10-3  
10-2  
10-1  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=80ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJCꢀ=f(tP);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀoutputꢀcharacteristics  
14  
10  
20 V  
20 V  
10 V  
10 V  
8 V  
9
8
7
6
5
4
3
2
1
0
8 V  
12  
7 V  
7 V  
10  
6 V  
6 V  
5.5 V  
8
6
5.5 V  
5 V  
4
5 V  
4.5 V  
2
4.5 V  
0
0
5
10  
15  
20  
0
5
10  
15  
20  
VDSꢀ[V]  
VDSꢀ[V]  
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
ID=f(VDS);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance  
Diagramꢀ8:ꢀDrain-sourceꢀon-stateꢀresistance  
6
2.00  
1.80  
1.60  
1.40  
5
5.5 V  
5 V  
6.5 V  
6 V  
4
3
2
1
0
98%  
1.20  
1.00  
typ  
7 V  
10 V  
0.80  
0.60  
0.40  
0.20  
0.00  
0
5
10  
15  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
IDꢀ[A]  
Tjꢀ[°C]  
RDS(on)=f(ID);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(Tj);ꢀID=1.1ꢀA;ꢀVGS=10ꢀV  
Final Data Sheet  
7
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
Diagramꢀ9:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ10:ꢀTyp.ꢀgateꢀcharge  
14  
10  
9
8
25 °C  
12  
10  
7
6
5
4
3
2
1
0
120 V  
400 V  
8
150 °C  
6
4
2
0
0
2
4
6
8
10  
12  
0
2
4
6
8
VGSꢀ[V]  
Qgateꢀ[nC]  
ID=f(VGS);ꢀVDS=20V;ꢀparameter:ꢀTj  
VGS=f(Qgate);ꢀID=0.9ꢀAꢀpulsed;ꢀparameter:ꢀVDD  
Diagramꢀ11:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
Diagramꢀ13:ꢀDrain-sourceꢀbreakdownꢀvoltage  
102  
840  
25 °C  
125 °C  
820  
800  
780  
760  
740  
720  
700  
680  
660  
640  
620  
600  
101  
100  
10-1  
0.0  
0.5  
1.0  
1.5  
2.0  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
VSDꢀ[V]  
Tjꢀ[°C]  
IF=f(VSD);ꢀparameter:ꢀTj  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
8
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
Diagramꢀ14:ꢀTyp.ꢀcapacitances  
Diagramꢀ15:ꢀTyp.ꢀCossꢀstoredꢀenergy  
104  
2.00  
1.80  
1.60  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
0.00  
103  
Ciss  
102  
101  
Coss  
100  
Crss  
10-1  
0
100  
200  
300  
400  
500  
0
100  
200  
300  
400  
500  
600  
700  
VDSꢀ[V]  
VDSꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=250ꢀkHz  
Eoss=f(VDS)  
Final Data Sheet  
9
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
5ꢀꢀꢀꢀꢀTestꢀCircuits  
Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics  
Test circuit for diode characteristics  
Diode recovery waveform  
Rg1  
VDS  
Rg 2  
IF  
Rg1 = Rg 2  
Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimes  
Switching times test circuit for inductive load  
Switching times waveform  
VDS  
90%  
10%  
VDS  
VGS  
VGS  
td(off)  
tf  
td(on)  
ton  
tr  
toff  
Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀload  
Unclamped inductive load test circuit  
Unclamped inductive waveform  
V(BR)DS  
ID  
VDS  
VDS  
VDS  
ID  
Final Data Sheet  
10  
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
6ꢀꢀꢀꢀꢀPackageꢀOutlines  
DOCUMENT NO.  
Z8B00181052  
MILLIMETERS  
DIM  
INCHES  
0
MIN  
2.20  
0.90  
0.64  
0.65  
5.20  
0.46  
0.46  
5.98  
5.00  
6.35  
4.63  
MAX  
2.40  
1.14  
0.89  
1.15  
5.50  
0.60  
0.60  
6.22  
5.60  
6.73  
5.21  
MIN  
MAX  
0.094  
0.045  
0.035  
0.045  
0.217  
0.024  
0.024  
0.245  
0.220  
0.265  
0.205  
SCALE  
A
A1  
b
0.087  
0.035  
0.025  
0.026  
0.205  
0.018  
0.018  
0.235  
0.197  
0.250  
0.182  
2.0  
0
2.0  
b2  
b4  
c
4mm  
c2  
D
EUROPEAN PROJECTION  
D1  
E
E1  
e
2.29  
4.57  
3
0.090  
0.180  
3
e1  
N
ISSUE DATE  
06-04-2016  
L
3.30  
0.85  
0.88  
3.60  
1.25  
1.28  
0.130  
0.033  
0.035  
0.142  
0.049  
0.050  
REVISION  
L1  
L2  
01  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TOꢀ251-3,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
11  
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
7ꢀꢀꢀꢀꢀAppendixꢀA  
Tableꢀ11ꢀꢀꢀꢀꢀRelatedꢀLinks  
IFXꢀCoolMOSªꢀP7ꢀWebpage:ꢀwww.infineon.com  
IFXꢀDesignꢀtools:ꢀwww.infineon.com  
Final Data Sheet  
12  
Rev.ꢀ2.1,ꢀꢀ2018-02-13  
700VꢀCoolMOSªꢀP7ꢀPowerꢀTransistor  
IPS70R900P7S  
RevisionꢀHistory  
IPS70R900P7S  
Revision:ꢀ2018-02-13,ꢀRev.ꢀ2.1  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
Release of final version  
Corrected front page text  
2016-11-24  
2018-02-13  
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG  
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,  
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,  
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,  
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,  
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.  
TrademarksꢀupdatedꢀAugustꢀ2015  
OtherꢀTrademarks  
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.  
WeꢀListenꢀtoꢀYourꢀComments  
Anyꢀinformationꢀwithinꢀthisꢀdocumentꢀthatꢀyouꢀfeelꢀisꢀwrong,ꢀunclearꢀorꢀmissingꢀatꢀall?ꢀYourꢀfeedbackꢀwillꢀhelpꢀusꢀtoꢀcontinuously  
improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:  
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Publishedꢀby  
InfineonꢀTechnologiesꢀAG  
81726ꢀMünchen,ꢀGermany  
©ꢀ2018ꢀInfineonꢀTechnologiesꢀAG  
AllꢀRightsꢀReserved.  
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(“Beschaffenheitsgarantie”)ꢀ.  
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe  
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Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,  
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automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
Final Data Sheet  
13  
Rev.ꢀ2.1,ꢀꢀ2018-02-13  

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