AUIRFS3206TRR [INFINEON]
Advanced Process Technology Ultra Low On-Resistance; 先进的工艺技术超低导通电阻型号: | AUIRFS3206TRR |
厂家: | Infineon |
描述: | Advanced Process Technology Ultra Low On-Resistance |
文件: | 总13页 (文件大小:292K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 96401A
AUTOMOTIVE GRADE
AUIRFS3206
AUIRFSL3206
Features
HEXFET® Power MOSFET
Advanced Process Technology
Ultra Low On-Resistance
D
S
V(BR)DSS
RDS(on) typ.
max.
60V
2.4m
3.0m
210A
Enhanced dV/dT and dI/dT capability
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
G
ID
(Silicon Limited)
ID (Package Limited)
120A
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniquestoachieveextremelylowon-resistancepersilicon
area. Additional features of this design are a 175°C junction
operating temperature, fast switching speed and improved
repetitiveavalancherating. Thesefeaturescombinetomake
this design an extremely efficient and reliable device for use
in Automotive applications and a wide variety of other
D
D
S
D
S
D
G
G
D2Pak
TO-262
AUIRFSL3206
AUIRFS3206
applications.
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications
is not implied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. Thethermal
resistanceandpowerdissipationratingsaremeasuredunderboardmountedandstillairconditions.Ambienttemperature(TA)
is 25°C, unless otherwise specified.
Max.
Parameter
Units
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
210
150
A
120
840
Pulsed Drain Current
PD @TC = 25°C
300
Maximum Power Dissipation
Linear Derating Factor
W
W/°C
V
2.0
VGS
± 20
170
Gate-to-Source Voltage
EAS (Thermally limited)
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
IAR
See Fig. 14, 15, 22a, 22b,
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery
mJ
V/ns
5.0
-55 to + 175
Operating Junction and
TSTG
°C
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient (PCB Mount) , D2Pak
Typ.
–––
Max.
0.50
40
Units
°C/W
Rθ
JC
RθJA
–––
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
09/06/11
AUIRFS/SL3206
Static Characteristics @ TJ = 25°C (unless otherwise stated)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
60 ––– –––
––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
gfs
V
–––
2.0
2.4
3.0
4.0
VGS = 10V, ID = 75A
VDS = VGS, ID = 150μA
VDS = 50V, ID = 75A
mΩ
V
–––
Forward Transconductance
210 ––– –––
S
RG
Internal Gate Resistance
–––
0.7
–––
20
Ω
IDSS
Drain-to-Source Leakage Current
––– –––
V
V
V
V
DS =60V, VGS = 0V
DS = 48V, VGS = 0V, TJ = 125°C
GS = 20V
μA
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
GS = -20V
Dynamic Characteristics @ TJ = 25°C (unless otherwise stated)
Parameter
Total Gate Charge
Min. Typ. Max. Units
––– 120 170
Conditions
Qg
ID = 75A
Qgs
Gate-to-Source Charge
–––
–––
–––
–––
–––
–––
–––
29
35
85
19
82
55
83
–––
VDS =30V
nC
Qgd
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 10V
Qsync
–––
–––
–––
–––
–––
ID = 75A, VDS =0V, VGS = 10V
VDD = 30V
td(on)
Turn-On Delay Time
tr
Rise Time
ID = 75A
ns
td(off)
Turn-Off Delay Time
RG =2.7Ω
VGS = 10V
tf
Fall Time
Ciss
Input Capacitance
––– 6540 –––
––– 720 –––
––– 360 –––
––– 1040 –––
––– 1230 –––
V
GS = 0V
Coss
Output Capacitance
VDS = 50V
Crss
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
ƒ = 1.0MHz, See Fig.5
pF
Coss eff. (ER)
Coss eff. (TR)
V
GS = 0V, VDS = 0V to 48V , See Fig.11
GS = 0V, VDS = 0V to 48V
V
Diode Characteristics
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
IS
D
S
––– ––– 210
A
(Body Diode)
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 840
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
50
V
TJ = 25°C, IS = 75A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 51V,
IF = 75A
di/dt = 100A/μs
–––
–––
–––
–––
–––
33
37
41
53
2.1
ns
56
Qrr
Reverse Recovery Charge
62
nC
A
80
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ISD ≤ 75A, di/dt ≤ 360A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
Repetitive rating; pulse width limited by max. junction
temperature.
.
Limited by TJmax, starting TJ = 25°C, L = 0.023mH
RG = 25Ω, IAS = 120A, VGS =10V. Part not recommended for use
above this value.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C
2
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AUIRFS/SL3206
Qualification Information†
Automotive
††
(per AEC-Q101)
Comments:
This part
number(s) passed
Qualification Level
Automotive qualification. IR’s Industrial and
Consumer qualification level is granted by
extension of the higher Automotive level.
MSL1
N/A
3L-D2 PAK
3L-TO-262
Moisture Sensitivity Level
Class M4(+/- 800V )†††
Machine Model
(per AEC-Q101-002)
Class H2(+/- 4000V )†††
(per AEC-Q101-001)
ESD
Human Body Model
Class C5(+/- 2000V )†††
(per AEC-Q101-005)
Charged Device Model
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
††
††† Highest passing voltage
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3
AUIRFS/SL3206
1000
100
10
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
TOP
TOP
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
BOTTOM
BOTTOM
100
4.5V
4.5V
60μs PULSE WIDTH
≤
60μs PULSE WIDTH
Tj = 25°C
≤
Tj = 175°C
10
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 75A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
≤ 60μs PULSE WIDTH
0.1
2.0
3.0
V
4.0
5.0
6.0
7.0
8.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
, Gate-to-Source Voltage (V)
GS
T
, Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
20
12000
10000
8000
6000
4000
2000
0
V
C
= 0V,
f = 1 MHZ
I
= 75A
GS
D
= C + C , C SHORTED
iss
gs
gd ds
V
= 48V
DS
C
= C
rss
gd
16
12
8
VDS= 30V
VDS= 12V
C
= C + C
ds
oss
gd
Ciss
4
Coss
Crss
0
0
40
80
120
160
200
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
4
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AUIRFS/SL3206
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
1msec
100μsec
T
= 25°C
J
10msec
1
1
Tc = 25°C
Tj = 175°C
Single Pulse
DC
V
= 0V
GS
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, Source-to-Drain Voltage (V)
0.1
0.1
0.1
1
10
100
V
, Drain-toSource Voltage (V)
V
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
240
200
160
120
80
80
75
70
65
60
55
I
= 5mA
D
Limited By Package
40
0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
25
50
75
100
125
150
175
T
, Junction Temperature (°C)
T
, Case Temperature (°C)
J
C
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.0
1.5
1.0
0.5
0.0
800
600
400
200
0
I
D
TOP
21A
33A
BOTTOM 120A
0
10
V
20
30
40
50
60
25
50
75
100
125
150
175
Drain-to-Source Voltage (V)
Starting T , Junction Temperature (°C)
DS,
J
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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5
AUIRFS/SL3206
1
D = 0.50
0.20
0.10
0.1
0.01
0.05
R1
R1
R2
R2
R3
R3
τι
(sec)
Ri (°C/W)
0.02
0.01
τ
J τJ
τ
Cτ
0.106416 0.0001
0.201878 0.001262
0.190923 0.011922
τ
τ
1 τ1
τ
2 τ2
3τ3
Ci= τi/Ri
Ci= τi/Ri
SINGLE PULSE
( THERMAL RESPONSE )
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
200
160
120
80
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 1% Duty Cycle
= 120A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
40
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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AUIRFS/SL3206
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
18
16
14
12
10
8
I
I
I
= 1.0A
D
D
D
= 1.0mA
= 250μA
ID = 150μA
6
I
= 30A
F
4
V
= 51V
R
T
= 125°C
= 25°C
J
J
2
T
0
-75 -50 -25
0
25 50 75 100 125 150 175
100 200 300 400 500 600 700 800 900 1000
T , Temperature ( °C )
di / dt - (A / μs)
J
f
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage Vs. Temperature
350
300
250
200
150
18
16
14
12
10
8
6
I
= 30A
= 51V
I
= 45A
= 51V
100
50
0
F
F
4
2
0
V
V
R
R
T
= 125°C
= 25°C
T
= 125°C
= 25°C
J
J
T
T
J
J
100 200 300 400 500 600 700 800 900 1000
100 200 300 400 500 600 700 800 900 1000
di / dt - (A / μs)
di / dt - (A / μs)
f
f
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
350
300
250
200
150
100
50
I
= 45A
F
V
= 51V
R
T
= 125°C
= 25°C
J
J
T
0
100 200 300 400 500 600 700 800 900 1000
di / dt - (A / μs)
f
Fig. 20 - Typical Stored Charge vs. dif/dt
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7
AUIRFS/SL3206
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
CircuitLayoutConsiderations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dtcontrolledbyRG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
InductorCurrent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1μs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2μF
12V
.3μF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
8
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AUIRFS/SL3206
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
PartNumber
AUFS3206
DateCode
Y= Year
WW= Work Week
A= Automotive, Lead Free
IRLogo
YWWA
XX or XX
LotCode
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
AUIRFS/SL3206
TO-262 Package Outline ( Dimensions are shown in millimeters (inches))
TO-262 Part Marking Information
PartNumber
AUFSL3206
DateCode
Y= Year
WW= Work Week
A= Automotive, Lead Free
IRLogo
YWWA
XX or XX
LotCode
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFS/SL3206
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
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11
AUIRFS/SL3206
Ordering Information
Base part
Package Type
Standard Pack
Form
Complete Part Number
Quantity
AUIRFSL3206
AUIRFS3206
TO-262
D2Pak
Tube
Tube
50
50
AUIRFSL3206
AUIRFS3206
Tape and Reel Left
Tape and Reel Right
800
800
AUIRFS3206TRL
AUIRFS3206TRR
12
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AUIRFS/SL3206
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IR will not be responsible for any failure to meet such requirements.
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相关型号:
AUIRFS3306TRL
Power Field-Effect Transistor, 120A I(D), 60V, 0.0042ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, D2PAK-3
INFINEON
AUIRFS3607
Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, ROHS COMPLIANT, PLASTIC, D2PAK-3
INFINEON
AUIRFS3607TRL
Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, ROHS COMPLIANT, PLASTIC, D2PAK-3
INFINEON
AUIRFS3607TRR
Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, ROHS COMPLIANT, PLASTIC, D2PAK-3
INFINEON
AUIRFS3806
Power Field-Effect Transistor, 43A I(D), 60V, 0.0158ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, D2PAK-3
INFINEON
AUIRFS3806TRL
Power Field-Effect Transistor, 43A I(D), 60V, 0.0158ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, D2PAK-3
INFINEON
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