ICM7372QG [ICMIC]

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS with Serial Interface and Adjustable Output Offset; 双12 /10/ 8位电压输出DAC ，串行接口和可调输出失调


型号：	ICM7372QG
厂家：	IC MICROSYSTEMS
描述：	DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS with Serial Interface and Adjustable Output Offset 双12 /10/ 8位电压输出DAC ，串行接口和可调输出失调转换器光电二极管输出元件
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ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

FEATURES

OVERVIEW

The ICM7372, ICM7352 and ICM7332 are 12-Bit, 10-Bit

and 8-Bit voltage output DACs respectively, with

guaranteed monotonic behavior. These DACs are

available in 16-pin QSOP package. They include

adjustable output offset for ease of use and flexibility. The

reference output is available on a separate pin and can be

used to drive external loads. The operating supply range is

2.7V to 5.5V.

•

12/10/8-Bit Monotonic Dual DAC in 16 Lead

QSOP Package

•

Adjustable Output Offset

Wide Output Voltage Swing

100 µA per DAC at 3V Supply

On Board Reference

Three-wire SPI/QSP and Microwire Interface

Compatible

•

Serial Data Out for Daisy-Chaining

8 µS Full scale Settling Time

The input interface is an easy to use three-wire SPI/QSPI

and Microwire compatible interface. The DAC has a

double buffered digital input for added flexibility.

APPLICATIONS

Battery-Powered Applications

Industrial Process Control

Digital Gain and Offset Adjustment

BLOCK DIAGRAM

REFB

REFA

ICM7372/7352/7332

DAC A

INPUT AND DAC LATCH

50 KΩ

VOA

OSA

DAC B

INPUT AND DAC LATCH

50 KΩ

VOB

OSB

REFERENCE

INPUT CONTROL LOGIC, REGISTERS AND LATCHES

SDO

SDI

SCK

CLR

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

PACKAGE

16 Lead QSOP

AGND

VOA

OSA

REFA

CLR

VDD

VOB

OSB

REFB

N/C

REFOUT

SDO

SDI

SCK

DGND

TOP VIEW

PIN DESCRIPTION (16 Lead QSOP)

Name

I/O

Description

AGND

VOA

Analog Ground

DAC A Output Voltage

OSA

DAC A Offset Adjustment

Reference Voltage Input to DAC A

REFA

CLR

Active Low Clear Input (CMOS). Resets All Registers to Zero. DAC outputs go to 0 V

Active Low Chip Select (CMOS)

Serial Data Input (CMOS)

Serial Clock Input (CMOS)

Digital Ground

SDI

SCK

DGND

SDO

REFOUT

N/C

Serial data Output

Reference Output

No Connection

REFB

OSB

Reference Voltage Input to DAC B

DAC B Offset Adjustment

DAC B Output Voltage

Supply Voltage

VOB

VDD

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

ABSOLUTE MAXIMUM RATING

Symbol

Parameter

Value

-0.3 to 7.0

Unit

Supply Voltage

Input Current

+/- 25.0

-0.3 to 7.0

-65 to +150

300

Digital Input Voltage (SCK, SDI , CLR , CS )

Reference Input Voltage

IN REF

STG

Storage Temperature

^oC

Soldering Temperature

SOL

Note: Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect reliability.

ORDERING INFORMATION

Part

Operating Temperature Range

Package

ICM7372

ICM7352

ICM7332

-40 ^oC to 85 ^oC

16-Pin QSOP

DC ELECTRICAL CHARACTERISTICS

(V = 2.7V to 5.5V, V

unloaded; all specifications T

toT

unless otherwise noted)

MAX

OUT

MIN

Symbol

Parameter

Test Conditions

Min

Typ.

Max

Unit

DC PERFORMANCE

ICM7372

Resolution

Bits

DNL

INL

Differential Nonlinearity

Integral Nonlinearity

(Notes 1 & 3)

0.4

+1.0

LSB

(Notes 1 & 3)

4.0

+12.0

ICM7352

Resolution

Bits

LSB

DNL

INL

Differential Nonlinearity

Integral Nonlinearity

(Notes 1 & 3)

0.1

1.0

+1.0

+3.0

ICM7332

Resolution

Bits

LSB

DNL

INL

Differential Nonlinearity

Integral Nonlinearity

(Notes 1 & 3)

0.05

0.25

+1.0

+0.75

Gain Error

+0.5

+25

% of FS

Offset Error

POWER REQUIREMENTS

Supply Voltage

Supply Current

2.7

5.5

1.5

(Note 4)

0.6

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

Symbol

Parameter

Test Conditions

Min

Typ.

Max

Unit

OUTPUT CHARACTERISTICS

Output Voltage Range

(Note 3)

V_DD

Short Circuit Current

Amp Output Impedance

Output Line Regulation

150

At Mid-scale (Note 2)

At 0-scale (Note 2)

1.0

100

5.0

200

Ω

OUT

0.4

3.0

mV/V

=2.7 to 5.5 V

LOGIC INPUTS

Digital Input High

(Note 2)

2.4

1.2

Digital Input Low

0.8

Digital Input Leakage

µΑ

REFERENCE

Reference Output

1.25

0.8

1.3

4.0

REFOUT

Reference Output Line

Regulation

mV/V

AC ELECTRICAL CHARACTERISTICS

(V = 2.7V to 5.5V, V_OUTunloaded; all specifications T

to T unless otherwise noted)

MAX

MIN

Symbol

Parameter

Slew Rate

Test Conditions

Min

Typ.

Max

Unit

V/µs

Settling Time

Full-scale settling

µs

Mid-scale Transition Glitch

Energy

nV-S

Note 1: Linearity is defined from code 64 to 4095 (ICM7372)

Linearity is defined from code 16 to 1023 (ICM7352)

Linearity is defined from code 4 to 255 (ICM7332)

Note 2: Guaranteed by design; not tested in production

Note 3: See Applications Information

Note 4: All digital Inputs at GND or V_DD

TIMING CHARACTERISTICS

(V = 2.7V to 5.5V, all specifications T

to T

unless otherwise noted)

MIN

MAX

Symbol

Parameter

SCK Cycle Time

Test Conditions

Min

Typ

Max

Unit

(Note 2)

Data Setup Time

Data Hold Time

SCK Falling edge to CS Rising Edge

Falling Edge to SCK Rising Edge

Pulse Width

SDO Delay

100

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

SCK

SDI

LSB

Input Word for DAC N

SDO

Input Word for DAC N

Figure 1. Serial Interface Timing Diagram

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

(ENABLE

SCK)

(UPDATE

OUTPUT)

SCK

SDI

D11

D10

CONTROL WORD

DATA WORD

INPUT WORD W

SDO

D11

D10

INPUT WORD W

-1

Figure 2. Serial Interface Operation Diagram

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

CONTENTS OF INPUT SHIFT REGISTER

ICM7372 (12-Bit DAC)

MSB

LSB

D11

D10

CONTROL WORD

DATA WORD

Figure 3. Contents of ICM7372 Input Shift Register

ICM7352 (10-Bit DAC)

MSB

LSB

CONTROL WORD

DATA WORD

Figure 4. Contents of ICM7352 Input Shift Register

ICM7332 (8-Bit DAC)

MSB

LSB

CONTROL WORD

DATA WORD

Figure 5. Contents of ICM7332 Input Shift Register

DATA (D11 – D0)

FUNCTION

Data

Load Input Latch DAC A

Update DAC A

Load Input Latch and Update DAC A

Load Input Latch DAC B

Update DAC B

Load Input Latch and Update DAC B

No Operation

Data

Load Input Latch All DACs

Update DAC All DACs

Load Input Latch and Update All DACs

No Operation

Table 1. Serial Interface Input Word

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

The Chip Select pin which is the 6^thpin of 16 QSOP

package is active low. This pin must be low when data is

being clocked into the part. After the 16^thclock pulse the

Chip Select pin must be pulled high (level-triggered) for

the data to be transferred to an input bank of latches. This

pin also disables the SCK pin internally when pulled high

and the SCK pin must be low before this pin is pulled back

low. As the Chip Select pin is pulled high the shift register

contents are transferred to a bank of 16 latches (see

Figure 2.). The 4 bit control word (C3~C0) is then decoded

and the DAC is updated or loaded depending on the

control word (see Table 1).

DETAILED DESCRIPTION

The ICM7372 is a 12-bit voltage output dual DAC. The

ICM7352 is the 10-bit version of this family and the

ICM7332 is the 8-bit version. These devices have a 16-bit

data-in/data-out shift register and double buffered input.

The amplifier’s offset adjustment pins allow for a DC shift

in the DAC’s output.

This family of DACs employs a resistor string architecture

a 1.25V

guaranteeing monotonic behavior. There is

onboard reference and an operating supply range of 2.7V

to 5.5V.

The DAC has a double-buffered input with an input latch

and a DAC latch. The DAC output will swing to its new

value when data is loaded into the DAC latch. The user

has three options: loading only the input latch, updating

the DAC with data previously loaded into the input latch or

loading the input latch and updating the DAC at the same

time with a new code.

Reference Input

Each DAC has its own reference input pin which can be

driven from ground to V_DD-1.5V. Determine the output

voltage using the following equation when output

adjustment pin, OSA or OSB is connected to ground 0V.

= 2 x (V

x (D / (2ⁿ)))

REF

OUT

Serial Data Output

SDO (Serial Data Output) is the internal shift register’s

output. This pin can be used as the data output pin for

Daisy-Chaining and data readback. It is compatible with

SPI/QSPI and Microwire interfaces.

Where D is the numeric value of DAC’s decimal input

code, V is the reference voltage and n is number of

bits, i.e. 12 for ICM7372, 10 for ICM7352 and 8 for

ICM7332.

REF

Power-On Reset

Reference Output

The reference output is nominally 1.25V and is brought out

to a separate pin and can be used to drive external loads.

The outputs will nominally swing from 0 to 2.5V when

using this reference.

There is a power-on reset on board that will clear the

contents of all the latches to all 0s on power-up and the

DAC voltage output will go to ground.

APPLICATIONS INFORMATION

Output Amplifier

The Dual DAC has 2 output amplifiers with a wide output

voltage swing. The actual swing of the output amplifiers

will be limited by offset error and gain error. See the

Power Supply Bypassing and Layout

Considerations

As in any precision circuit, careful consideration has to be

given to layout of the supply and ground. The return path

from the GND to the supply ground should be short with

low impedance. Using a ground plane would be ideal. The

supply should have some bypassing on it. A 10 µF

tantalum capacitor in parallel with a 0.1 µF ceramic with a

low ESR can be used. Ideally these would be placed as

close as possible to the device. Avoid crossing digital and

analog signals, specially the reference, or running them

close to each other.

Applications Information Section for

discussion.

a more detailed

The offset adjustment pins, either OSA or OSB can be

used to produce an adjustable offset voltage at the output.

For instance, to achieve a 1V offset, apply -1V to the offset

adjustment pin to produce an output range from 1V to (1V

+ VREF x 2). Note that the DAC’s output range is still

limited by offset error and gain error. See the Applications

Information Section for a more detailed discussion.

Output Swing Limitations

The ideal rail-to-rail DAC would swing from GND to V

The output amplifier can drive a load of 2.0 kΩ to V

GND in parallel with a 500 pF load capacitance.

However, offset and gain error limit this ability. Figure 6

illustrates how a negative offset error will affect the output.

The output will limit close to ground since this is single

supply part, resulting in a dead-band area. As a larger

input is loaded into the DAC the output will eventually rise

above ground. This is why the linearity is specified for a

starting code greater than zero.

The output amplifier has a full-scale typical settling time of

8 µs and it dissipates about 100 µA with a 3V supply

voltage.

Serial Interface and Input Logic

This dual DAC family uses a standard 3-wire connection

compatible with SPI/QSPI and Microwire interfaces. Data

is loaded in 16-bit words which consist of 4 address and

control bits (MSBs) followed by 12 bits of data (see table

1). The ICM7352 has the last 2 LSBs as don’t care and the

ICM7332 has the last 4 LSBs as don’t care. The DAC is

double buffered with an input latch and a DAC latch.

Figure 7 illustrates how a gain error or positive offset error

will affect the output when it is close to V . A positive

gain error or positive offset will cause the output to be

limited to the positive supply voltage resulting in a dead-

band of codes close to full-scale.

Serial Data Input

SDI (Serial Data Input) pin is the data input pin for all

DACs. Data is clocked in on the rising edge of SCK which

has a Schmitt trigger internally to allow for noise immunity

on the SCK pin. This specially eases the use for opto-

coupled interfaces.

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

DEADBAND

NEGATIVE

OFFSET

Figure 6. Effect of Negative Offset

OFFSET AND

GAIN ERROR

V_DD

DEADBAND

POSITIVE

OFFSET

Figure 7. Effect of Gain Error and Positive Offset

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

PACKAGE INFORMATION

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372/7352/7332

mic

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

IC MICROSYSTEMS

with Serial Interface and Adjustable Output Offset

ORDERING INFORMATION

ICM73X2 P G

G = RoHS Compliant Lead-Free package.

Blank = Standard package. Non lead-free.

Device

7 - ICM7372

5 - ICM7352

3 - ICM7332

Package

Q = 16-Lead QSOP

Rev. A10

ICmic reserves the right to change the specifications without prior notice.

ICM7372QG [ICMIC]

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