ICM7362M [ICMIC]

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS; 双12 /10/ 8位电压输出DAC


型号：	ICM7362M
厂家：	IC MICROSYSTEMS
描述：	DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS 双12 /10/ 8位电压输出DAC 输出元件
文件：	总9页 (文件大小：136K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

with guaranteed monotonic behavior. They include a

1.25V reference for ease of use and flexibility. The

reference output is available on a separate pin and can be

used to drive the reference input of each DAC. Alternately,

each DAC can be driven by an external reference. The

operating supply range is 2.7V to 5.5V.

FEATURES

•

12/10/8-Bit Monotonic Dual DACs in 10 lead

MSOP Package

•

Wide Output Voltage Swing

100 µA per DAC

On Board Reference

Serial Interface with three-wire SPI/QSPI and

Microwire Interface Compatible

8µs Full-Scale Settling Time

The input interface is an easy to use three-wire SPI/QSPI

compatible interface. Each DAC can be individually

controlled and has a double buffered digital input.

•

APPLICATIONS

•

Battery-Powered Applications

Industrial Process Control

Digital Gain and Offset Adjustment

OVERVIEW

The ICM7362, ICM7342 and ICM7322 are Dual 12-Bit, 10-

Bit and 8-Bit wide output voltage swing DACs respectively,

BLOCK DIAGRAM

V_DD

REF_B

REF_A

REFOUT

ICM 7362/7342/7322

Reference

Input and

DAC Latch

12/10/8 -Bit

V_{OUT A}

DAC A

Input and

DAC Latch

12/10/8 -Bit

DAC B

V_{OUT B}

Input Control Logic, Registers and Latches

SDI

Power-On-

Reset

SCK

GND

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

PACKAGE

10-Pin MSOP

V_DD

REF_A

V_{OUT A}

REF_B

V_{OUT B}

GND

SDI

SCK

REFOUT

PIN DESCRIPTION

Pin No Symbol

Description

V_DD

Supply Voltage

REF _A

V_{OUT A}

REF _B

V_{OUT B}

REFOUT

DAC A Reference Input

DAC A Output

DAC B Reference Input

DAC B Output

Reference Output (1.25V)

SCK

Chip Select (TTL or CMOS)

Serial Clock Input (TTL or CMOS)

SDI

Serial Data Input (TTL or CMOS)

Ground

GND

ABSOLUTE MAXIMUM RATING

Symbol

Parameter

Value

-0.3 to 7.0

+/- 25.0

-0.3 to 7.0

-65 to +150

300

Unit

V_DD

I_IN

V_{IN_}

V_{IN_REF}

T_STG

T_SOL

Supply Voltage

Input Current

Digital Input Voltage (SCK, SDI, CS)

Reference Input Voltage

Storage Temperature

Soldering Temperature

^oC

Note: Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect reliability.

ORDERING INFORMATION

Part

Temperature Range

Package

10-Pin MSOP

ICM7362

ICM7342

ICM7322

-40 ^oC to 85 ^oC

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

DC ELECTRICAL CHARACTERISTICS

(V_{DD =}2.7V to 5.5V, V_{REF IN =}1.25V ; V_OUTunloaded; all specifications T_MINtoT_MAXunless otherwise noted)

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

DC PERFORMANCE

ICM7362

DNL

INL

Resolution

Differential Nonlinearity

Integral Nonlinearity

Bits

LSB

(Notes 1 & 3)

0.4

4.0

+1.0

+12.0

ICM7342

Resolution

Bits

LSB

DNL

INL

Differential Nonlinearity

Integral Nonlinearity

(Notes 1 & 3)

0.1

1.0

+1.0

+3.0

ICM7322

Resolution

Bits

LSB

DNL

INL

Differential Nonlinearity

Integral Nonlinearity

(Notes 1 & 3)

0.05

0.25

+1.0

+0.75

Gain Error

Offset Error

+0.5

+25

% of FS

POWER REQUIREMENTS

V_DD

I_DD

Supply Voltage

Supply Current

2.7

5.5

1.0

(Note 4)

0.4

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

OUTPUT CHARACTERISTICS

Output Voltage Range

(Note 3)

V_DD

VO_SC

R_OUT

Short Circuit Current

Amp Output Impedance

1.0

100

150

5.0

200

Ω

At Mid-scale (Note 2)

At 0-scale (Note 2)

Ω

Output Line Regulation

Vdd=2.7 to 5.5 V

0.4

3.0

mV/V

LOGIC INPUTS

V_IH

V_IL

Digital Input High

Digital Input Low

Digital Input Leakage

(Note 2)

2.4

0.8

µA

REFERENCE

R_IN

Reference Input Resistance

Reference Input Range

Reference Output

Reference Output Line

Regulation

kΩ

mV/V

(Note 2)

0.5

1.2

V_DD-1.5

1.3

4.0

V_REFOUT

1.25

0.8

Vdd=2.7 to 5.5 V

AC ELECTRICAL CHARACTERISTICS

(V_{DD =}2.7V to 5.5V, V_{REF IN =}1.25V ; V_OUTunloaded; all specifications T_MINtoT_MAXunless otherwise noted)

Symbol Parameter Test Conditions Min Typ Max

Unit

Slew Rate

V/µs

µs

Settling Time

Full-scale settling

Mid-scale Transition Glitch

Energy

nV-S

Note 1: Linearity is defined from code 64 to 4095 (ICM7362)

Linearity is defined from code 16 to 1023 (ICM7342)

Linearity is defined from code 4 to 255 (ICM7322)

Note 2: Guaranteed by design; not tested in production

Note 3: See Applications Information

Note 4: All digital inputs are either at GND or Vdd

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

TIMING CHARACTERISTICS

(V_{DD =}2.7V to 5.5V; all specifications T_MINtoT_MAXunless otherwise noted)

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

t₁

t₂

t₃

SCK Cycle Time

Data Setup Time

Data Hold Time

(Note 2)

t₄

SCK Falling edge to CS

Rising Edge

(Note 2)

t₅

CS Falling Edge to SCK

Rising Edge

(Note 2)

t₆

CS Pulse Width

t₁

SCK

SDI

t₃

t₂

MSB

t₅

Input Word for DAC N

t₄

t₆

Figure 1: Serial Interface Timing Diagram

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

CONTENTS OF INPUT SHIFT REGISTER

ICM7362 (12-Bit DAC)

MSB

LSB

D11

D10

Figure 2: Contents of ICM7362 Input Shift Register

ICM7342 (10-Bit DAC)

MSB

LSB

Figure 3: Contents of ICM7342 Input Shift Register

ICM7322 (8-Bit DAC)

MSB

LSB

Figure 4: Contents of ICM7322 Input Shift Register

DATA

DAC

FUNCTION

Data

A & B

Load Input Latch

Update DAC

Load Input Latch and Update DAC

Load Input Latch

Update DAC

Load Input Latch and Update DAC

No Operation

Load Input Latch

Update DAC

Load Input Latch and Update DAC

No Operation

Data

Table 1: Serial Interface Control Command

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

a bank of 16 latches. The 4 bit control word (C3~C0) is

then decoded and the appropriate DAC is updated or

loaded depending on the control word (see Table 1).

DETAILED DESCRIPTION

The ICM7362 is a 12-bit dual voltage output DAC. The

ICM7342 is the 10-bit version of this family and the

ICM7322 is the 8-bit version.

Each DAC has a double-buffered input with an input latch

and a DAC latch. The DAC output will swing to its new

value when data is loaded into the DAC latch. For each

DAC, the user has three options: loading only the input

latch, updating the DAC with data previously loaded into

the input latch or loading the input latch and updating the

DAC at the same time with a new code. The user also has

the ability to perform this operation simultaneously for both

DACs as shown in Table 1.

This family of DACs employs a resistor string architecture

a 1.25V

guaranteeing monotonic behavior. There is

onboard reference and an operating supply range of 2.7V

to 5.5V.

Reference Input and Output

Each DAC has its own reference input pin which can be

driven from ground to V_DD-1.5V. The input resistance on

each of these pins is typically 41 k Ω. There is a gain of

two in the output amplifiers which means they swing from

ground at code 0 to 2 x V_{REF IN}at full-scale :

Power-On Reset

There is a power-on reset on board that will clear the

contents of all the latches to all 0s on power-up and the

DAC voltage outputs will go to ground.

Vout = 2 x (V_{REF IN}xD)/2ⁿ

Where D=digital input (decimal) and n= number of bits, i.e.

12 for ICM7362, 10 for ICM7342 and 8 for ICM7322.

There is also an onboard band-gap reference on all these

parts. This reference output is nominally 1.25V and is

brought out to a separate pin, REFOUT and can be used

to drive the reference input of the DACs. The outputs will

nominally swing from 0 to 2.5V when using this reference.

Output Amplifier

Each DAC has its own output amplifier with a wide output

voltage swing. The actual swing of the output amplifier will

be limited by offset error and gain error. See the

Applications Information Section for

discussion.

a more detailed

The amplifiers are configured in a gain of 2 with internal

gain resistors of about 50 kΩ. The output swing will be

from 0V to 2 x V_{REF IN}at full-scale.

The output amplifier can drive a load of 2.0 kΩ to V_DDor

GND in parallel with a 500 pF load capacitance.

The output amplifier has a full-scale typical settling time of

8 µs and it dissipates about 100 µA with a 3V supply

voltage.

Serial Interface and Input Logic

This dual DAC family uses a standard 3-wire connection

compatible with SPI/QSPI interfaces. Data is loaded in 16-

bit words which consist of 4 address and control bits

(MSBs) followed by 12 bits of data (see table 1). The

ICM7342 has the last two LSBs as don’t cares and the

ICM7322 has the last 4 LSBs as don’t cares. Each DAC is

double buffered with an input latch and a DAC latch.

All the digital inputs are CMOS/TTL compatible. The

current dissipation of the device however, will be higher

when the inputs are driven at TTL levels.

Data is clocked in on the rising edge of SCK which has a

Schmitt trigger internally to allow for noise immunity on the

SCK pin. This specially eases the use for opto-coupled

interfaces.

The CS pin must be low when data is being clocked into

the part. After the 16^thclock pulse the CS pin must be

pulled high (level-triggered) for the data to be transferred

to an input bank of latches. The CS pin also disables the

SCK pin internally when pulled high and the SCK pin must

be low before the CS pin is pulled back low. As the CS pin

is pulled high the shift register contents are transferred to

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

above ground. This is why the linearity is specified for a

starting code greater than zero.

APPLICATIONS INFORMATION

Figure 6 illustrates how a gain error or positive offset error

will affect the output when it is close to V_DD. A positive gain

error or positive offset will cause the output to be limited to

the positive supply voltage resulting in a dead-band of

codes close to full-scale. This can be avoided by using a

reference voltage slightly less then 0.5 x V_DDensuring that

Power

Considerations

Supply

Bypassing

and

Layout

As in any precision circuit, careful consideration has to be

given to layout of the supply and ground. The return path

from the GND to the supply ground should be short with

low impedance. Using a ground plane would be ideal. The

supply should have some bypassing on it. A 10 µF

tantalum capacitor in parallel with a 0.1 µF ceramic with a

low ESR can be used. Ideally these would be placed as

close as possible to the device. Avoid crossing digital and

analog signals, specially the reference, or running them

close to each other.

the full-scale of the DAC is always less than V_DD

Output Swing Limitations

DEADBAND

The ideal rail-to-rail DAC would swing from GND to V_DD

however, offset and gain error limit this ability. Figure 5

illustrates how a negative offset error will affect the output.

The output will limit close to ground since this is single

supply part, resulting in a dead-band area. As a larger

input is loaded into the DAC the output will eventually rise

NEGATIVE

OFFSET

Figure 5: Effect of Negative Offset

OFFSET AND

GAIN ERROR

V_DD

DEADBAND

POSITIVE

OFFSET

Figure 6: Effect of Gain Error and Positive Offset

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

PACKAGE DIAGRAM

10-Pin MSOP Package

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

mic

ICM7362/7342/7322

IC MICROSYSTEMS

DUAL 12/10/8-BIT VOLTAGE-OUTPUT DACS

ORDERING INFORMATION

ICM73X2 P G

Device

G = RoHS Compliant Lead-Free package.

Blank = Standard package. Non lead-free.

6 - ICM7362

4 - ICM7342

2 - ICM7322

Package

M = 10-Lead MSOP

Rev. A8

ICmic reserves the right to change the specifications without prior notice.

ICM7362M [ICMIC]

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