HD74LV2GT04AUS [HITACHI]
Inverter, LV/LV-A/LVX/H Series, 3-Func, 1-Input, CMOS, PDSO8, SSOP-8;型号: | HD74LV2GT04AUS |
厂家: | HITACHI SEMICONDUCTOR |
描述: | Inverter, LV/LV-A/LVX/H Series, 3-Func, 1-Input, CMOS, PDSO8, SSOP-8 光电二极管 逻辑集成电路 |
文件: | 总9页 (文件大小:79K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74LV2GT04A
Triple Inverters
ADE-205-664 (Z)
Rev.0
Jan. 2002
Description
The HD74LV2GT04A has triple inverters in a 8 pin package. Low voltage and high speed operation is
suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
•
•
•
The basic gate function is lined up as hitachi uni logic series.
Supplied on emboss taping for high speed automatic mounting.
TTL compatible input level.
Supply voltage range : 4.5 to 5.5 V
Operating temperature range : –40 to +85°C
•
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
•
•
•
Output current ±±2 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Package type
Package type
Package code
Package suffix
Taping code
SSOP-8 pin
TTP-8DB
US
E (3,000 pcs / Reel)
HD74LV2GT04A
Outline and Article Indication
• HD74LV2GT04A
Index band
Lot No.
Y M W
Y : Year code
(the last digit of year)
M : Month code
W : Week code
T 0 4
SSOP-8
Type No.
Function Table
Input A
Output Y
H
L
L
H
H : High level
L : Low level
Rev.0, Jan. 2002, page 2 of 9
HD74LV2GT04A
Pin Arrangement
1
2
3
4
1A
3
8
7
6
5
VCC
1
2A
3A
2
GND
(Top view)
Rev.0, Jan. 2002, page 3 of 9
HD74LV2GT04A
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
Unit Test Conditions
Supply voltage range
Input voltage range *1
Output voltage range *1, 2
VCC
VI
V
V
VO
V
Output : H or L
VCC : OFF
Input clamp current
IIK
IOK
IO
mA
mA
mA
mA
VI < 0
Output clamp current
Continuous output current
50
VO < 0 or VO > VCC
VO = 0 to VCC
25
Continuous current through
VCC or GND
I
CC or IGND
50
Maximum power dissipation
at Ta = 25°C (in still air) *3
PT
200
mW
°C
Storage temperature
Tstg
–65 to 150
Notes:
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Symbol
Min
4.5
0
Max
5.5
5.5
VCC
12
Unit
V
Conditions
Supply voltage range
Input voltage range
Output voltage range
Output current
VCC
VI
V
VO
IOH
IOL
0
V
—
—
0
mA
VCC = 4.5 to 5.5 V
–12
20
VCC = 4.5 to 5.5 V
Input transition rise or fall rate ∆t / ∆v
ns / V VCC = 4.5 to 5.5 V
°C
Operating free-air temperature Ta
–40
85
Note: Unused or floating inputs must be held high or low.
Rev.0, Jan. 2002, page 4 of 9
HD74LV2GT04A
Electrical Characteristic
•
Ta = –40 to 85°C
Item
Symbol VCC (V) *
Min
2.0
—
Typ
—
Max
—
Unit Test condition
Input voltage
VIH
VIL
4.5 to 5.5
4.5 to 5.5
5.0
V
—
0.8
—
Hysteresis voltage VH
—
0.15
—
V
V
VT+ – VT–
Output voltage
VOH
Min to Max VCC–0.1
—
IOH = –50 µA
IOH = –12 mA
IOL = 50 µA
IOL = 12 mA
4.5
3.8
—
—
—
—
—
—
VOL
Min to Max
4.5
—
0.1
0.55
1
—
Input current
IIN
0 to 5.5
5.5
—
µA VIN = 5.5 V or GND
Quiescent
supply current
ICC
—
10
µA VIN = VCC or GND,
IO = 0
∆ICC
5.5
0
—
—
—
—
1.5
5
mA One input VIN = 3.4 V,
other input VCC or GND
Output leakage
current
IOFF
—
µA VI or VO = 0 to 5.5 V
Input capacitance CIN
5.0
3.0
—
pF VIN = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
Rev.0, Jan. 2002, page 5 of 9
HD74LV2GT04A
Switching Characteristics
•
VCC = 5.0 ±0.5 V
Item
Symbol Ta = 25°C
Ta = –40 to 85°C Unit Test
FROM
TO
Conditions (Input) (Output)
Min
—
Typ Max Min
Max
8.0
Propagation tPLH
5.0
8.0
7.0
1.0
ns
CL = 15 pF
CL = 50 pF
A
Y
delay time
tPHL
—
10.5 1.0
12.0
Operating Characteristics
•
CL = 50 pF
Item
Symbol
VCC (V) Ta = 25°C
Unit
Test Conditions
Min
Typ
10.0
Max
Power dissipation
capacitance
CPD
5.0
—
—
pF
f = 10 MHz
Test Circuit
VCC
Output
Input
Pulse
generator
CL
50Ω
Note: CL includes probe and jig capacitance.
Rev.0, Jan. 2002, page 6 of 9
HD74LV2GT04A
• Waveforms
tr
tf
3 V
90%
1.5 V
10%
90%
1.5 V
10%
Input
GND
VOH
50%
50%
tPLH
Output
VOL
tPHL
Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
2. The output are measured one at a time with one transition per measurement.
Rev.0, Jan. 2002, page 7 of 9
HD74LV2GT04A
Package Dimensions
2.0 0.2
1.5 0.2
As of July, 2001
Unit: mm
(0.5) (0.5) (0.5)
+ 0.1
− 0.05
8 − 0.2
Hitachi Code
JEDEC
JEITA
TTP-8DB
Mass (reference value)
0.010 g
Rev.0, Jan. 2002, page 8 of 9
HD74LV2GT04A
Disclaimer
±. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Sales offices
Hitachi, Ltd.
Semiconductor & Integrated Circuits
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: (03) 3270-2111 Fax: (03) 3270-5109
URL
http://www.hitachisemiconductor.com/
For further information write to:
Hitachi Semiconductor
(America) Inc.
Hitachi Europe Ltd.
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Postfach 201, D-85619 Feldkirchen
Germany
Tel: <49> (89) 9 9180-0
Fax: <49> (89) 9 29 30 00
Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan.
Colophon 5.0
Rev.0, Jan. 2002, page 9 of 9
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