HCPL2611VM [FAIRCHILD]
Logic IC Output Optocoupler, 1-Element, 5000V Isolation, 10MBps, LEAD FREE, DIP-8;
| 型号： | HCPL2611VM |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Logic IC Output Optocoupler, 1-Element, 5000V Isolation, 10MBps, LEAD FREE, DIP-8 输出元件 光电 |
| 文件： | 总18页 (文件大小：3353K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 2013
Single-Channel: 6N137M, HCPL2601M, HCPL2611M
Dual-Channel: HCPL2630M, HCPL2631M
High-Speed 10 MBit/s Logic Gate Optocouplers
Features
Description
■ Very High Speed – 10 MBit/s
■ Superior CMR – 10 kV/µs
■ Fan-out of 8 Over -40°C to +85°C
■ Logic Gate Output
■ Strobable Output
■ Wired OR-open Collector
■ U.L. Recognized (File # E90700, Vol. 2)
The 6N137M, HCPL2601M, HCPL2611M single-channel
and HCPL2630M, HCPL2631M dual-channel optocou-
plers consist of a 850 nm AlGaAS LED, optically coupled
to a very high speed integrated photo-detector logic gate
with a strobable output. This output features an open col-
lector, thereby permitting wired OR outputs. The
switching parameters are guaranteed over the tempera-
ture range of -40°C to +85°C. A maximum input signal of
5 mA will provide a minimum output sink current of
13 mA (fan out of 8).
Applications
■ Ground Loop Elimination
■ LSTTL to TTL, LSTTL or 5 V CMOS
■ Line Receiver, Data Transmission
■ Data Multiplexing
■ Switching Power Supplies
■ Pulse Transformer Replacement
■ Computer-peripheral Interface
An internal noise shield provides superior common
mode rejection of typically 10 kV/µs. The HCPL2601M
and HCPL2631M has a minimum CMR of 5 kV/µs. The
HCPL2611M has a minimum CMR of 10 kV/µs.
Schematics
Package Outlines
8
8
VCC
N/C
+
1
8
VCC
+
1
8
1
1
VF1
_
VE
2
3
7
6
5
V01
2
3
7
6
5
VF
_
8
8
_
VO
V02
1
1
VF2
Figure 2. Package Options
Truth Table (Positive Logic)
GND
N/C
4
GND
+
4
Input
Enable
Output
H
L
H
H
L
H
H
H
L
6N137M
HCPL2601M
HCPL2611M
HCPL2630M
HCPL2631M
(Preliminary)
H
L
L
L
(1)
A 0.1µF bypass capacitor must be connected between pins 8 and 5
.
H
L
NC
NC
Figure 1. Schematics
H
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
Safety and Insulation Ratings for 8-Pin DIP White
As per DIN_EN/IEC 60747-5-2. This optocoupler is suitable for “safe electrical insulation” only within the safety limit
data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Min.
Typ.
Max. Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For Rated Mains Voltage < 150 V
For Rated Mains Voltage < 300 V
For Rated Mains Voltage < 450 V
For Rated Mains Voltage < 600 V
Climatic Classification
I–IV
I–IV
RMS
RMS
RMS
RMS
I–III
I–III
40/100/21
2
Pollution Degree (DIN VDE 0110/1.89)
Comparative Tracking Index
CTI
175
V
Input to Output Test Voltage, Method b,
1,669
PR
V
x 1.875 = V , 100% Production Test with
IORM
PR
tm = 1 s, Partial Discharge < 5 pC
Input to Output Test Voltage, Method a,
1,335
V
x 1.5 = V , Type and Sample Test with
IORM
PR
tm = 60 s, Partial Discharge < 5 pC
Max Working Insulation Voltage
Highest Allowable Over Voltage
External Creepage
V
890
6,000
8.0
V
V
IORM
PEAK
V
IOTM
PEAK
mm
mm
mm
mm
External Clearance
7.4
External Clearance (for Option T, 0.4” Lead Spacing)
Insulation Thickness
10.16
0.5
Safety Limit Values, Maximum Values Allowed in the
Event of a Failure
T
Case Temperature
150
200
300
°C
mA
mW
Ω
S
I
Input Current
S,INPUT
P
Output Power (Duty Factor ≤ 2.7%)
Insulation Resistance at T , V = 500 V
S,OUTPUT
9
R
10
IO
S
IO
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. T = 25°C unless otherwise specified.
A
Symbol
Parameter
Value
Units
°C
T
Storage Temperature
Operating Temperature
Lead Solder Temperature
-40 to +125
-40 to +100
260 for 10 s
STG
T
°C
OPR
T
°C
SOL
Emitter
I
DC/Average Forward
Input Current
Single Channel
Dual Channel (Each Channel)
50
30
mA
V
F
V
V
Enable Input Voltage Not to Exceed Single Channel
by more than 500 mV
5.5
E
V
CC
Reverse Input Voltage
Power Dissipation
Each Channel
5.0
100
45
V
R
P
Single Channel
mW
I
Dual Channel (Each Channel)
Detector
V
Supply Voltage
Output Current
7.0
V
CC
(1 minute max)
I
Single Channel
50
50
7.0
85
60
mA
O
Dual Channel (Each Channel)
Each Channel
V
Output Voltage
V
O
P
Collector Output
Power Dissipation
Single Channel
mW
O
Dual Channel (Each Channel)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
0
Max.
250
15
Units
µA
mA
V
I
Input Current, Low Level
FL
I
Input Current, High Level
Supply Voltage, Output
*6.3
4.5
0
FH
V
5.5
CC
V
Enable Voltage, Low Level
Enable Voltage, High Level
Ambient Operating Temperature
Fan Out (TTL load)
0.8
V
EL
V
2.0
-40
V
V
EH
CC
T
+85
8
°C
A
N
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value
is 5.0 mA or less.
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
3
Electrical Characteristics (T = 0 to 70°C unless otherwise specified)
A
Individual Component Characteristics
Symbol
Parameter
Test Conditions
Min. Typ.* Max. Unit
EMITTER
V
Input Forward Voltage
I = 10 mA
1.8
V
V
F
F
T = 25°C
1.4
1.75
A
B
Input Reverse Breakdown
Voltage
I
= 10 µA
R
5.0
VR
C
Input Capacitance
V = 0, f = 1 MHz
60
pF
IN
F
ΔV / ΔT
Input Diode Temperature
Coefficient
I = 10 mA
-1.4
mV/°C
F
A
F
DETECTOR
I
High Level Supply Current
Low Level Supply Current
V
V
= 5.5 V, I = 0 mA,
= 0.5 V
Single Channel
Dual Channel
6
10
8
10
15
13
mA
mA
CCH
CC
F
E
I
Single Channel
V
= 5.5 V,
CC
CCL
I = 10 mA
F
Dual Channel
V
= 0.5 V
14
21
E
I
Low Level Enable Current
High Level Enable Current
High Level Enable Voltage
Low Level Enable Voltage
V
V
V
V
= 5.5 V, V = 0.5 V
-0.7
-0.5
-1.6
-1.6
mA
mA
V
EL
CC
CC
CC
CC
E
I
= 5.5 V, V = 2.0 V
E
EH
V
= 5.5 V, I = 10 mA
2.0
EH
F
(3)
V
= 5.5 V, I = 10 mA
0.8
V
EL
F
Switching Characteristics (T = -40°C to +85°C, V = 5 V, I = 7.5 mA unless otherwise specified)
A
CC
F
Symbol
AC Characteristics
Test Conditions
Min.
Typ.* Max. Unit
T
Propagation Delay
Time to Output HIGH
Level
R = 350 Ω,
L
T = 25°C
20
40
75
ns
PLH
L
A
(4)
C = 15 pF (Fig. 14)
100
(5)
T
Propagation Delay
Time to Output LOW
Level
T = 25°C
25
40
75
ns
PHL
A
R = 350 Ω, C = 15 pF (Fig. 14)
100
L
L
|T
–T
|
Pulse Width Distortion R = 350 Ω, C = 15 pF (Fig. 14)
1
35
ns
ns
PHL PLH
L
L
(6)
t
Output Rise Time
(10% to 90%)
R = 350 Ω, C = 15 pF (Fig. 14)
30
r
L
L
(7)
t
Output Rise Time
(90% to 10%)
R = 350 Ω, C = 15 pF (Fig. 14)
10
15
ns
ns
f
L
L
(8)
(9)
t
Enable Propagation
Delay Time to Output
HIGH Level
I = 7.5 mA, V = 3.5 V, R = 350 Ω, C = 15 pF
ELH
F
EH
L
L
(Fig. 15)
t
Enable Propagation
Delay Time to Output
LOW Level
I = 7.5 mA, V = 3.5 V, R = 350 Ω, C = 15 pF
15
ns
EHL
F
EH
L
L
(Fig. 15)
|CM |
Common Mode
T = 25°C, |V | = 50 V 6N137M, HCPL2630M
10,000
V/µs
H
A
CM
Transient Immunity
(at Output HIGH Level)
(Peak), I = 0 mA,
F
HCPL2601M,
HCPL2631M
5000 10,000
V
(Min.) = 2.0 V,
OH
(10)
R = 350 Ω
(Fig. 16)
L
|V | = 400 V
HCPL2611M
10,000 15,000
10,000
V/µs
CM
|CM |
Common Mode
Transient Immunity
R = 350 Ω, I = 7.5 mA, 6N137M, HCPL2630M
L
L
F
V
(Max.) = 0.8 V,
OL
HCPL2601M,
HCPL2631M
5000 10,000
(11)
(at Output LOW Level) T = 25°C
(Fig. 16)
A
|V | = 400 V
HCPL2611M
10,000 15,000
CM
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
4
Electrical Characteristics (Continued)
Transfer Characteristics (T = -40 to +85°C unless otherwise specified)
A
Symbol
DC Characteristics
Test Conditions
Min.
Typ.* Max.
Unit
I
HIGH Level Output Current
V
= 5.5 V, V = 5.5 V,
100
µA
OH
CC
O
(2)
I = 250 µA, V = 2.0 V
F
E
V
LOW Level Output Current
Input Threshold Current
V
= 5.5 V, I = 5 mA, V = 2.0 V,
= 13 mA
0.4
3
0.6
5
V
OL
FT
CC
F
E
(2)
I
CL
I
V
= 5.5 V, V = 0.6 V, V = 2.0 V,
mA
CC
O
E
I
= 13 mA
OL
Isolation Characteristics (T = -40°C to +85°C unless otherwise specified.)
A
Symbol
Characteristics
Test Conditions
Min.
Typ.*
Max.
Unit
I
Input-Output Insulation
Leakage Current
Relative humidity = 45%,
1.0*
µA
I-O
T = 25°C, t = 5 s,
A
(12)
V
= 3000 VDC
I-O
V
Withstand Insulation Test
Voltage
RH < 50%, T = 25°C,
5000
V
RMS
ISO
A
(12)
I
≤ 10 µA, t = 1 min.
I-O
(12)
11
R
C
Resistance (Input to Output)
V
= 500 V
10
Ω
I-O
I-O
(12)
Capacitance (Input to Output) f = 1 MHz
1
pF
I-O
*All Typicals at V = 5 V, T = 25°C
CC
A
Notes:
1. The V supply to each optoisolator must be bypassed by a 0.1 µF capacitor or larger. This can be either a ceramic
CC
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package V and GND pins of each device.
CC
2. Each channel.
3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
4. t
– Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current
PLH
pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
5. t – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current
PHL
pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
6. t – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
r
7. t – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
f
8. t
– Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input
ELH
voltage pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
9. t – Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input
EHL
voltage pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
10. CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
H
HIGH state (i.e., V
> 2.0 V). Measured in volts per microsecond (V/µs).
OUT
11. CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
L
LOW output state (i.e., V
< 0.8 V). Measured in volts per microsecond (V/µs).
OUT
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
5
Typical Performance Curves
For Single-Channel Devices: 6N137M, HCPL2601M, and HCPL2611M
0.8
I
V
V
= 5 mA
F
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
= 2 V
E
10
1
= 5.5 V
CC
I
OL
= 12.8 mA
I
= 16 mA
OL
0.100
I
OL
= 6.4 mA
I
OL
= 9.6 mA
0.010
0.001
-40
-20
0
20
40
60
80
100
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
T
– AMBIENT TEMPERATURE (°C)
V
F
– FORWARD VOLTAGE (V)
A
Figure 3. Low Level Output Voltage vs. Ambient Temperature
Figure 4. Input Diode Forward Voltage vs. Forward Current
120
100
80
50
V
T
= 5 V
CC
= 25°C
A
45
40
I
I
= 15 mA
= 10 mA
F
R
R
= 4 kΩ (t
= 1 kΩ (t
)
)
L
PLH
F
R
L
= 350 Ω (t )
PLH
35
60
L
PLH
I
F
= 5 mA
40
20
0
30
25
R
= 4 kΩ (t
= 1 kΩ (t
= 350 Ω (t
)
)
L
L
L
PHL
V
V
V
= 5 V
= 2 V
= 0.6 V
CC
R
R
PHL
E
)
OL
PHL
20
-40
-20
0
20
40
60
80
100
5
7
9
11
13
15
T
A
– AMBIENT TEMPERATURE (°C)
I
– FORWARD CURRENT (mA)
F
Figure 5. Switching Time vs. Forward Current
Figure 6. Low Level Output vs. Ambient Temperature
6
5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
= 5 V
= 2 V
= 0.6 V
CC
V
V
E
OL
4
3
2
R
= 350 Ω
L
R
= 1 kΩ
L
R
R
= 1 kΩ
= 4 kΩ
L
R
= 350 Ω
L
L
R
= 4 kΩ
L
1
0
-40
-20
0
20
40
60
80
100
0
1
2
3
4
5
6
T
A
– AMBIENT TEMPERATURE (°C)
I
- FORWARD CURRENT (mA)
F
Figure 7. Input Threshold Current vs. Ambient Temperature
Figure 8. Output Voltage vs. Input Forward Current
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
6
Typical Performance Curves (Continued)
(For Single-Channel Devices: 6N137M, HCPL2601M, HCPL2611M)
60
500
400
300
200
100
0
I
V
= 7.5 mA
F
I
V
= 7.5 mA
= 5 V
F
= 5 V
CC
50
40
30
20
10
0
CC
R
L
= 4 kΩ (t
)
R
R
= 4 kΩ
L
R
R
= 1 kΩ (t
)
L
R
R
= 1 kΩ
L
= 350 Ω (t
)
L
R
R
L
R
L
R
L
= 4 kΩ (t
= 1 kΩ (t
)
F
R
= 350 Ω
L
)
F
= 350 Ω (t
)
F
-100
-10
-40
-20
0
20
40
60
80
100
-40
-20
0
20
T – AMBIENT TEMPERATURE (°C)
A
40
60
80
100
T
A
– AMBIENT TEMPERATURE (°C)
Figure 9. Pulse Width Distortion vs. Temperature
Figure 10. Rise and Fall Time vs. Temperature
100
80
60
40
20
0
100
90
80
70
60
50
40
30
20
I
V
= 7.5 mA
= 5 V
F
I
V
= 7.5 mA
F
CC
= 5 V
CC
R
= 4 kΩ (t )
PLH
L
R
L
= 4 kΩ (t
)
ELH
R
L
= 1 kΩ (t
)
PLH
R
L
= 1 kΩ (t
)
ELH
R
L
= 350 Ω (t
)
PLH
R
L
R
L
R
L
= 4 kΩ (t
= 1 kΩ (t
= 350 Ω (t
)
)
PHL
R
L
= 350 Ω (t )
ELH
PHL
)
PHL
R
L
= 4 kΩ / 1 kΩ / 350 Ω (t
)
EHL
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
T
A
– AMBIENT TEMPERATURE (°C)
T – AMBIENT TEMPERATURE (°C)
A
Figure 11. Enable Propagation Delay vs. Temperature
Figure 12. Switching Time vs. Temperature
1.6
V
V
V
= 5 V
= 5.5 V
= 2 V
CC
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
O
E
I
F
= 250 μA
-40
-20
0
20
40
60
80
100
T
A
– AMBIENT TEMPERATURE (°C)
Figure 13. High Level Output Current vs. Temperature
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
7
Typical Performance Curves (Continued)
For Dual-Channel Devices: HCPL2630M and HCPL2631M
0.8
100
10
IF = 5 mA
0.7
VCC= 5.5 V
0.6
IOL = 16 mA
IOL = 12.8 mA
0.5
0.4
0.3
0.2
0.1
0.0
1
IOL = 6.4 mA
IOL = 9.6 mA
0.1
0.01
0.001
-40
-20
0
20
40
60
80
100
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
T
A
– AMBIENT TEMPERATURE (°C)
V
F
– FORWARD VOLTAGE (V)
Figure 14. Low Level Output Voltage vs. Ambient Temperature
Figure 15. Input Diode Forward Voltage
vs. Forward Current
120
50
45
40
35
30
25
20
VCC = 5 V
TA = 25°C
100
IF = 15 mA
RL = 4 kΩ (TPLH
)
IF = 10 mA
IF = 5 mA
80
60
40
20
0
RL = 1 kΩ (TPLH
)
)
R
L = 350 Ω (TPLH
VCC= 5 V
OL = 0.6 V
RL = 1 kΩ
RL = 4 kΩ
(TPHL
L = 350 Ω
)
V
R
5
7
9
11
13
15
-40
-20
0
20
40
60
80
100
I
– FORWARD CURRENT (mA)
T – AMBIENT TEMPERATURE (°C)
A
F
Figure 17. Low Level Output Current
vs. Ambient Temperature
Figure 16. Switching Time vs. Forward Current
6
4
3
2
1
V
CC= 5.0 V
5
4
3
2
1
0
VOL = 0.6 V
RL = 350 Ω
RL = 350 Ω
RL = 4 kΩ
R
L = 1 kΩ
RL = 4 kΩ
RL = 1 kΩ
-40
-20
0
20
40
60
80
100
0
1
2
3
4
5
6
T
– AMBIENT TEMPERATURE (°C)
I - FORWARD CURRENT (mA)
F
A
Figure 19. Output Voltage vs. Input Forward Current
Figure 18. Input Threshold Current
vs. Ambient Temperature
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
8
Typical Performance Curves (Continued)
For Dual-Channel Devices: HCPL2630M and HCPL2631M
80
600
500
400
300
200
100
0
IF = 7.5 mA
VCC = 5 V
RL = 4 kΩ
60
RL = 4 kΩ (tr)
IF = 7.5 mA
VCC = 5 V
40
RL = 1 kΩ
RL = 4 kΩ
(tf)
RL = 350 Ω
20
RL = 1 kΩ
RL = 1 kΩ (tr)
RL = 350 Ω (tr)
RL = 350 Ω
0
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T
– TEMPERATURE (°C)
T – TEMPERATURE (°C)
A
A
Figure 20. Pulse Width Distortion vs.Temperature
Figure 21. Rise and Fall Time vs.Temperature
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
120
100
80
RL = 4 kΩ (T
)
PLH
V
V
= 5.5 V
= 5.5 V
= 250 μA
CC
O
I
F
IF = 7.5 mA
VCC = 5 V
60
RL = 1 kΩ (T
)
PLH
RL = 350 Ω (T
)
PLH
40
RL = 1 kΩ
RL = 4 kΩ
RL = 350 Ω
(T
)
PHL
20
-60
-60
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
T
– TEMPERATURE (°C)
A
T
– TEMPERATURE (°C)
A
Figure 23. High Level Output Current
vs.Temperature
Figure 22. Switching Time vs.Temperature
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
9
Test Circuits
Pulse
Generator
tr = 5 ns
ZO= 50 Ω
+5 V
IF = 7.5 mA
VCC
IF = 3.75 mA
Input
(IF)
1
2
3
4
8
7
6
5
tPHL
tPLH
Output
(VO)
.1 μF
bypass
RL
CL
1.5 V
Output
(VO)
Input
Monitor
(IF)
90%
10%
Output
(VO)
47
GND
tf
tr
Figure 24. Test Circuit and Waveforms for tPLH, tPHL, tr and tf
Pulse
Input
Monitor
(VE)
Generator
tr = 5 ns
ZO= 50 Ω
+5 V
3.0 V
1.5 V
Input
(VE )
VCC
1
2
3
4
8
tEHL
tELH
7.5 mA
Output
(VO)
RL
7
.1 μF
1.5 V
bypass
Output
6
(VO)
CL
5
GND
Figure 25. Test Circuit tEHL and tELH
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
10
Test Circuits (Continued)
VCC
+5 V
1
2
3
4
8
7
6
5
IF
.1 μF
bypass
350 Ω
A
B
Output
(VO)
VFF
GND
VCM
Pulse Gen
Peak
VCM
0V
5V
VO
CMH
Switching Pos. (A), IF= 0
VO (Min)
VO (Max)
Switching Pos. (B), IF = 7.5 mA
VO
CML
0.5 V
Figure 26. Test Circuit Common Mode Transient Immunity
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
11
Package Dimensions
Through Hole
0.4" Lead Spacing (Option TV) (Pending)
PIN 1
ID.
PIN 1
ID.
1
0.270 (6.86)
0.250 (6.35)
0.270 (6.86)
0.250 (6.35)
0.390 (9.91)
0.370 (9.40)
0.156 (3.94)
0.144 (3.68)
0.070 (1.78)
0.045 (1.14)
0.390 (9.91)
0.370 (9.40)
0.020 (0.51)
MIN
0.200 (5.08)
MAX
0.156 (3.94)
0.144 (3.68)
0.070 (1.78)
0.045 (1.14)
0.020 (0.51)
MIN
0.154 (3.90)
0.120 (3.05)
0.200 (5.08)
MAX
15° MAX
0.022 (0.56)
0.016 (0.41)
0.016 (0.40)
0.008 (0.20)
0.154 (3.90)
0.120 (3.05)
0.300 (7.62)
TYP
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0° to 15°
0.016 (0.40)
0.008 (0.20)
0.400 (10.16)
TYP
0.100 (2.54) TYP
0.031 (0.78)
Surface Mount – 0.3" Lead Spacing (Option S)
8-Pin Surface Mount DIP – Land Pattern
(Option S)
0.390 (9.91)
0.370 (9.40)
PIN 1
0.070 (1.78)
ID.
0.060 (1.52)
0.270 (6.86)
0.250 (6.35)
0.100 (2.54)
0.295 (7.49)
0.415 (10.54)
0.030 (0.76)
0.156 (3.94)
0.144 (3.68)
0.300 (7.62)
TYP
0.070 (1.78)
0.045 (1.14)
0.020 (0.51)
MIN
0.016 (0.40)
0.008 (0.20)
0.015 (0.40) MIN
Both Sides
0.200 (5.08)
MAX
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
0.315 (8.00)
MIN
0.405 (10.30)
MAX.
Note:
All dimensions are in inches (millimeters)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
12
Package Dimensions (Continued)
Surface Mount – 0.4" Lead Spacing (Option TS)
8-Pin Surface Mount DIP – Land Pattern
(Option TS)
0.390 (9.91)
0.370 (9.40)
PIN 1
0.070 (1.78)
ID.
0.060 (1.52)
0.270 (6.86)
0.250 (6.35)
0.100 (2.54)
0.392 (9.96)
0.030 (0.76)
0.511 (13.0)
0.156 (3.94)
0.144 (3.68)
0.300 (7.62)
TYP
0.070 (1.78)
0.045 (1.14)
0.020 (0.51)
MIN
0.016 (0.40)
0.008 (0.20)
0.015 (0.40) MIN
Both Sides
0.031 (0.775)
0.200 (5.08)
MAX
0.022 (0.56)
0.016 (0.41)
0.400 (10.16)
0.100 (2.54)
TYP
0.497 (12.6)
MAX.
Note:
All dimensions are in inches (millimeters)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
13
Ordering Information
Example Part
Option
No Suffix
S
Number
Description
Standard Through Hole Device, 50 pcs per tube
Surface Mount Lead Bend
6N137M
6N137SM
SD
6N137SDM
6N137VM
Surface Mount; Tape and Reel
V
DIN_EN/IEC60747-5-2 (VDE)
TV
6N137TVM
6N137SVM
6N137SDVM
6N137TSM
6N137TSVM
6N137TSR2M
6N137TSR2VM
DIN_EN/IEC60747-5-2 (VDE), 0.4” lead spacing
DIN_EN/IEC60747-5-2 (VDE), surface mount
DIN_EN/IEC60747-5-2 (VDE), surface mount, tape and reel
Surface Mount, 0.4” lead spacing
SV
SDV
TS
TSV
TSR2
TSR2V
Surface Mount, 0.4” lead spacing, IEC60747-5-2 approval pending (VDE)
Surface Mount, Tape and Reel, 0.4” lead spacing
Surface Mount, Tape and Reel, 0.4” lead spacing, IEC60747-5-2 approval
pending (VDE)
Marking Information
1
2
6N137
6
V XX YY B
5
3
4
Definitions
1
2
Fairchild logo
Device number
DIN_EN/IEC60747-5-2 (VDE) mark (Note: Only appears
on parts ordered with VDE option – See order entry table)
3
4
5
6
Two digit year code, e.g., ‘13’
Two digit work week ranging from ‘01’ to ‘53’
Assembly package code
Note:
‘HCPL’ devices are marked only with the numerical characters (for example, HCPL2630 is
marked as ‘2630’).
The ‘M’ suffix on the part number is an order identifier only. It is used to identify orders for the
white package version. The ‘M’ does not appear on the device’s top mark.
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
14
Carrier Tape Specifications (Option SD)
D0
P0
P2
t
E
K0
F
W
W1
P
User Direction of Feed
d
D1
Symbol
Description
Dimension in mm
16.0 0.3
0.30 0.05
4.0 0.1
W
t
Tape Width
Tape Thickness
P
Sprocket Hole Pitch
Sprocket Hole Diameter
Sprocket Hole Location
Pocket Location
0
D
1.55 0.05
1.75 0.10
7.5 0.1
0
E
F
P
2.0 0.1
2
P
Pocket Pitch
12.0 0.1
10.30 0.20
10.30 0.20
4.90 0.20
13.2 0.2
0.1 maximum
10°
A
Pocket Dimensions
0
0
0
B
K
W
Cover Tape Width
1
d
Cover Tape Thickness
Max. Component Rotation or Tilt
Min. Bending Radius
R
30
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
15
Carrier Tape Specifications (Option TSR2)
D0
P0
P2
t
E
K0
F
W
W1
P
User Direction of Feed
d
D1
Symbol
Description
Dimension in mm
24.0 0.3
0.40 0.1
4.0 0.1
W
t
Tape Width
Tape Thickness
P
Sprocket Hole Pitch
Sprocket Hole Diameter
Sprocket Hole Location
Pocket Location
0
D
1.55 0.05
1.75 0.10
11.5 0.1
2.0 0.1
0
E
F
P
2
P
Pocket Pitch
16.0 0.1
12.80 0.1
10.35 0.1
5.7 0.1
A
Pocket Dimensions
0
0
0
B
K
W
Cover Tape Width
21.0 0.1
0.1 max
1
d
Cover Tape Thickness
Max. Component Rotation or Tilt
Min. Bending Radius
10°
R
30
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
16
Reflow Profile
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
T
P
260
240
220
200
180
160
140
120
100
80
t
P
T
L
Tsmax
t
L
Preheat Area
Tsmin
t
s
60
40
20
0
120
Time 25°C to Peak
240
360
Time (seconds)
Profile Freature
Pb-Free Assembly Profile
150°C
Temperature Minimum (Tsmin)
Temperature Maximum (Tsmax)
200°C
Time (t ) from (Tsmin to Tsmax)
60 to 120 seconds
3°C/second maximum
217°C
S
Ramp-up Rate (t to t )
L
P
Liquidous Temperature (T )
L
Time (t ) Maintained Above (T )
60 to 150 seconds
260°C +0°C / –5°C
30 seconds
L
L
Peak Body Package Temperature
Time (t ) within 5°C of 260°C
P
Ramp-down Rate (T to T )
6°C/second maximum
8 minutes maximum
P
L
Time 25°C to Peak Temperature
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
17
©2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
www.fairchildsemi.com
18
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