HCPL2611W [ONSEMI]

Logic IC Output Optocoupler;
HCPL2611W
型号: HCPL2611W
厂家: ONSEMI    ONSEMI
描述:

Logic IC Output Optocoupler

输出元件 光电
文件: 总15页 (文件大小:1286K)
中文:  中文翻译
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January 2011  
Single-Channel: 6N137, HCPL2601, HCPL2611  
Dual-Channel: HCPL2630, HCPL2631  
High Speed 10MBit/s Logic Gate Optocouplers  
Features  
Description  
Very high speed – 10 MBit/s  
Superior CMR – 10 kV/µs  
Double working voltage-480V  
Fan-out of 8 over -40°C to +85°C  
Logic gate output  
Strobable output  
Wired OR-open collector  
U.L. recognized (File # E90700)  
The 6N137, HCPL2601, HCPL2611 single-channel and  
HCPL2630, HCPL2631 dual-channel optocouplers  
consist of a 850 nm AlGaAS LED, optically coupled to a  
very high speed integrated photo-detector logic gate with  
a strobable output. This output features an open collec-  
tor, thereby permitting wired OR outputs. The coupled  
parameters are guaranteed over the temperature range  
of -40°C to +85°C. A maximum input signal of 5mA will  
provide a minimum output sink current of 13mA (fan out  
of 8).  
Applications  
Ground loop elimination  
An internal noise shield provides superior common  
mode rejection of typically 10kV/µs. The HCPL2601 and  
HCPL2631 has a minimum CMR of 5kV/µs. The  
HCPL2611 has a minimum CMR of 10kV/µs.  
LSTTL to TTL, LSTTL or 5-volt CMOS  
Line receiver, data transmission  
Data multiplexing  
Switching power supplies  
Pulse transformer replacement  
Computer-peripheral interface  
Schematics  
Package Outlines  
8
VCC  
N/C  
+
1
8
VCC  
8
+
1
1
VF1  
_
VE  
2
3
7
6
5
V01  
2
3
7
6
5
VF  
_
8
8
_
VO  
V02  
1
1
VF2  
+
GND  
N/C  
4
GND  
Truth Table (Positive Logic)  
4
Input  
Enable  
Output  
H
L
H
H
L
H
H
H
L
6N137  
HCPL2601  
HCPL2611  
HCPL2630  
HCPL2631  
H
L
L
L
(1)  
A 0.1µF bypass capacitor must be connected between pins 8 and 5  
.
H
L
NC  
NC  
H
©2005 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
Absolute Maximum Ratings (T = 25°C unless otherwise specified)  
A
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Value  
Units  
°C  
T
Storage Temperature  
Operating Temperature  
-55 to +125  
-40 to +85  
STG  
T
°C  
OPR  
T
Lead Solder Temperature (for wave soldering only)*  
260 for 10 sec  
°C  
SOL  
EMITTER  
I
DC/Average Forward  
Input Current  
Single Channel  
50  
30  
mA  
V
F
Dual Channel (Each Channel)  
V
V
Enable Input Voltage Not to Exceed Single Channel  
by more than 500mV  
5.5  
E
V
CC  
Reverse Input Voltage  
Power Dissipation  
Each Channel  
5.0  
100  
45  
V
R
P
Single Channel  
mW  
I
Dual Channel (Each Channel)  
DETECTOR  
V
Supply Voltage  
Output Current  
7.0  
V
CC  
(1 minute max)  
I
Single Channel  
50  
50  
7.0  
85  
60  
mA  
O
Dual Channel (Each Channel)  
Each Channel  
V
Output Voltage  
V
O
P
Collector Output  
Power Dissipation  
Single Channel  
mW  
O
Dual Channel (Each Channel)  
*For peak soldering reflow, please refer to the Reflow Profile on page 11.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
Parameter  
Min.  
0
Max.  
250  
15  
Units  
µA  
mA  
V
I
Input Current, Low Level  
FL  
I
Input Current, High Level  
Supply Voltage, Output  
Enable Voltage, Low Level  
Enable Voltage, High Level  
Low Level Supply Current  
Fan Out (TTL load)  
*6.3  
4.5  
0
FH  
V
5.5  
CC  
V
0.8  
V
EL  
V
2.0  
-40  
V
V
EH  
CC  
T
+85  
8
°C  
A
N
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value  
is 5.0mA or less.  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
2
Electrical Characteristics (T = 0 to 70°C unless otherwise specified)  
A
Individual Component Characteristics  
Symbol  
Parameter  
Test Conditions  
Min. Typ.* Max. Unit  
EMITTER  
V
Input Forward Voltage  
I = 10mA  
1.8  
V
V
F
F
T = 25°C  
1.4  
1.75  
A
B
Input Reverse Breakdown  
Voltage  
I
= 10µA  
R
5.0  
VR  
C
Input Capacitance  
V = 0, f = 1MHz  
60  
pF  
IN  
F
V / T  
Input Diode Temperature  
Coefficient  
I = 10mA  
-1.4  
mV/°C  
F
A
F
DETECTOR  
I
High Level Supply Current  
Low Level Supply Current  
V
= 5.5V, I = 0mA,  
Single Channel  
Dual Channel  
7
10  
9
10  
15  
13  
mA  
mA  
CCH  
CC  
F
V = 0.5V  
E
I
Single Channel  
V
= 5.5V,  
CC  
CCL  
I = 10mA  
F
Dual Channel  
V = 0.5V  
14  
21  
E
I
Low Level Enable Current  
High Level Enable Current  
High Level Enable Voltage  
Low Level Enable Voltage  
V
V
V
V
= 5.5V, V = 0.5V  
-0.8  
-0.6  
-1.6  
-1.6  
mA  
mA  
V
EL  
CC  
CC  
CC  
CC  
E
I
= 5.5V, V = 2.0V  
E
EH  
V
= 5.5V, I = 10mA  
2.0  
EH  
F
(3)  
V
= 5.5V, I = 10mA  
0.8  
V
EL  
F
Switching Characteristics (T = -40°C to +85°C, V = 5V, I = 7.5mA unless otherwise specified)  
A
CC  
F
Symbol  
AC Characteristics  
Test Conditions  
Min.  
Typ.* Max. Unit  
T
Propagation Delay  
Time to Output HIGH  
Level  
R = 350,  
L
T = 25°C  
20  
45  
75  
ns  
PLH  
L
A
(4)  
C = 15pF (Fig. 12)  
100  
(5)  
T
Propagation Delay  
Time to Output LOW  
Level  
T = 25°C  
25  
45  
75  
ns  
PHL  
A
R = 350, C = 15pF (Fig. 12)  
100  
L
L
|T  
–T  
| Pulse Width Distortion (R = 350, C = 15pF (Fig. 12)  
3
35  
ns  
ns  
PHL PLH  
L
L
(6)  
t
Output Rise Time  
(10–90%)  
R = 350, C = 15pF (Fig. 12)  
50  
r
L
L
(7)  
t
Output Rise Time  
(90–10%)  
R = 350, C = 15pF (Fig. 12)  
12  
20  
ns  
ns  
f
L
L
(8)  
(9)  
t
Enable Propagation  
Delay Time to Output  
HIGH Level  
I = 7.5mA, V = 3.5V, R = 350, C = 15pF  
ELH  
F
EH  
L
L
(Fig. 13)  
t
Enable Propagation  
Delay Time to Output  
LOW Level  
I = 7.5mA, V = 3.5V, R = 350, C = 15pF  
20  
ns  
EHL  
F
EH  
L
L
(Fig. 13)  
|CM |  
Common Mode  
T = 25°C, |V | = 50V 6N137, HCPL2630  
10,000  
V/µs  
H
A
CM  
Transient Immunity  
(at Output HIGH Level)  
(Peak), I = 0mA,  
F
HCPL2601, HCPL2631 5000 10,000  
V
(Min.) = 2.0V,  
OH  
(10)  
R = 350Ω  
(Fig. 14)  
L
|V | = 400V  
HCPL2611  
10,000 15,000  
10,000  
V/µs  
CM  
|CM |  
Common Mode  
Transient Immunity  
R = 350, I = 7.5mA, 6N137, HCPL2630  
L
L
F
V
(Max.) = 0.8V,  
OL  
HCPL2601, HCPL2631 5000 10,000  
(11)  
(at Output LOW Level) T = 25°C  
(Fig. 14)  
A
|V | = 400V  
HCPL2611  
10,000 15,000  
CM  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
3
Electrical Characteristics (Continued)  
Transfer Characteristics (T = -40 to +85°C unless otherwise specified)  
A
Symbol  
DC Characteristics  
Test Conditions  
Min.  
Typ.* Max.  
Unit  
I
HIGH Level Output Current  
V
= 5.5V, V = 5.5V,  
100  
µA  
OH  
CC  
O
(2)  
I = 250µA, V = 2.0V  
F
E
V
LOW Level Output Current  
Input Threshold Current  
V
= 5.5V, I = 5mA, V = 2.0V,  
= 13mA  
.35  
3
0.6  
5
V
OL  
FT  
CC  
F
E
(2)  
I
CL  
I
V
= 5.5V, V = 0.6V, V = 2.0V,  
mA  
CC  
O
E
I
= 13mA  
OL  
Isolation Characteristics (T = -40°C to +85°C unless otherwise specified.)  
A
Symbol  
Characteristics  
Test Conditions  
Min.  
Typ.*  
Max.  
Unit  
I
Input-Output Insulation  
Leakage Current  
Relative humidity = 45%,  
1.0*  
µA  
I-O  
T = 25°C, t = 5s,  
A
(12)  
V
= 3000 VDC  
I-O  
V
Withstand Insulation Test  
Voltage  
RH < 50%, T = 25°C,  
2500  
V
RMS  
ISO  
A
(12)  
I
2µA, t = 1 min.  
I-O  
(12)  
12  
R
C
Resistance (Input to Output)  
V
= 500V  
10  
0.6  
I-O  
I-O  
(12)  
Capacitance (Input to Output) f = 1MHz  
pF  
I-O  
*All Typicals at V = 5V, T = 25°C  
CC  
A
Notes:  
1. The V supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic  
CC  
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible  
to the package V and GND pins of each device.  
CC  
2. Each channel.  
3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.  
4. t  
– Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current  
PLH  
pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.  
5. t – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current  
PHL  
pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.  
6. t – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.  
r
7. t – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.  
f
8. t  
– Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input  
ELH  
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.  
9. t – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input  
EHL  
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.  
10. CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the  
H
HIGH state (i.e., V  
> 2.0V). Measured in volts per microsecond (V/µs).  
OUT  
11. CM – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the  
L
LOW output state (i.e., V  
< 0.8V). Measured in volts per microsecond (V/µs).  
OUT  
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted  
together.  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
4
Typical Performance Curves  
Fig.1 Low Level Output Voltage vs. Ambient Temperature  
Fig. 2 Input Diode Forward Voltage  
vs. Forward Current  
0.8  
Conditions:  
30  
I
V
F = 5 mA  
E = 2 V  
VCC= 5.5V  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
16  
10  
I
OL = 12.8 mA  
1
0.1  
IOL = 16mA  
IOL = 6.4mA  
0.01  
0.001  
IOL = 9.6mA  
-40  
-20  
0
20  
40  
60  
80  
0.9  
1.0  
1.1  
1.2  
1.3  
1.4  
1.5  
1.6  
T
A
– AMBIENT TEMPERATURE (°C)  
V
F
– FORWARD VOLTAGE (V)  
Fig. 4 Low Level Output Current  
vs. Ambient Temperature  
Fig.3 Switching Time vs. Forward Current  
120  
100  
80  
60  
40  
20  
0
50  
45  
40  
35  
30  
25  
20  
VCC = 5 V  
IF = 15mA  
IF = 10mA  
RL = 4 k(TPLH  
)
IF = 5mA  
RL = 1 k(TPLH  
)
Conditions:  
V
V
V
CC= 5V  
E = 2V  
OL = 0.6V  
RL = 1 kΩ  
RL = 4 kΩ  
(TPHL  
L = 350 kΩ  
)
RL = 350 (TPLH  
)
R
5
7
9
11  
13  
15  
-40  
-20  
0
20  
T – AMBIENT TEMPERATURE (°C)  
A
40  
60  
80  
I
– FORWARD CURRENT (mA)  
F
Fig. 6 Output Voltage vs. Input Forward Current  
Fig. 5 Input Threshold Current  
vs. Ambient Temperature  
6
5
4
3
2
1
0
4
Conditions:  
VCC= 5.0 V  
VO = 0.6 V  
RL = 350Ω  
3
2
1
RL = 350Ω  
RL = 4kΩ  
RL = 1kΩ  
RL = 1kΩ  
RL = 4kΩ  
0
1
2
3
4
5
6
-40  
-20  
0
20  
40  
60  
80  
T
– AMBIENT TEMPERATURE (°C)  
I - FORWARD CURRENT (mA)  
F
A
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
5
Typical Performance Curves (Continued)  
Fig. 7 Pulse Width Distortion vs.Temperature  
Fig. 8 Rise and Fall Time vs.Temperature  
80  
600  
500  
400  
300  
200  
100  
0
RL = 4 k(tr)  
RL = 4 kΩ  
60  
Conditions:  
IF = 7.5 mA  
VCC = 5 V  
Conditions:  
IF = 7.5mA  
VCC = 5A  
40  
20  
RL = 1 kΩ  
RL = 1 k(tr)  
RL = 350(tr)  
0
RL = 350Ω  
RL = 1 kΩ  
RL = 4 kΩ  
RL = 350Ω  
(tf)  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
T
A
– TEMPERATURE (°C)  
T – TEMPERATURE (°C)  
A
Fig. 9 Enable Propagation Delay vs.Temperature  
Fig. 10 Switching Time vs.Temperature  
120  
120  
100  
80  
RL = 4 kTPLH  
100  
80  
60  
40  
20  
0
RL = 4 k(TELH)  
60  
RL = 1 kTPLH  
RL = 350TPLH  
RL = 1 kΩ  
RL = 1 k(TELH)  
RL = 350(TELH)  
40  
RL = 350Ω  
RL = 1 kΩ  
RL = 4 kΩ  
(TEHL)  
80  
TPHL  
RL = 4 kΩ  
RL = 350Ω  
20  
-60  
-60  
-40  
-20  
0
20  
40  
60  
100  
-40  
-20  
0
20  
40  
60  
80  
100  
T
A
– TEMPERATURE (°C)  
T
– TEMPERATURE (°C)  
A
Fig. 11 High Level Output Current  
vs.Temperature  
20  
15  
10  
5
Conditions:  
VCC = 5.5 V  
V
V
O = 5.5 V  
E = 2.0 V  
IF = 250 µA  
0
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
T
A
– TEMPERATURE (°C)  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
6
Test Circuits  
Pulse  
Generator  
tr = 5ns  
ZO= 50Ω  
+5V  
IF = 7.5 mA  
IF = 3.75 mA  
Input  
(IF)  
VCC  
1
2
3
4
8
7
6
5
tPHL  
tPLH  
Output  
(VO)  
.1 µf  
bypass  
RL  
CL  
1.5 V  
Output  
(VO)  
Input  
Monitor  
(IF)  
90%  
10%  
Output  
(VO)  
GND  
47  
tf  
tr  
Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, tr and tf  
Pulse  
Input  
Monitor  
(VE)  
Generator  
tr = 5ns  
ZO= 50Ω  
+5V  
3.0 V  
1.5 V  
Input  
(VE )  
VCC  
1
2
3
4
8
tEHL  
tELH  
7.5 mA  
Output  
(VO)  
RL  
7
.1 µf  
1.5 V  
bypass  
Output  
6
(VO)  
CL  
5
GND  
Fig. 13 Test Circuit tEHL and tELH  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
7
Test Circuits (Continued)  
VCC  
+5V  
1
2
3
4
8
7
6
5
IF  
.1 µf  
bypass  
350Ω  
A
B
Output  
(VO)  
VFF  
GND  
VCM  
Pulse Gen  
Peak  
VCM  
0V  
5V  
VO  
CMH  
Switching Pos. (A), IF= 0  
VO (Min)  
VO (Max)  
Switching Pos. (B), IF = 7.5 mA  
VO  
CML  
0.5 V  
Fig. 14 Test Circuit Common Mode Transient Immunity  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
8
Ordering Information  
Option  
S
Example Part Number  
6N137S  
Description  
Surface Mount Lead Bend  
SD  
W
6N137SD  
Surface Mount; Tape and Reel  
0.4" Lead Spacing  
6N137W  
V
6N137V  
VDE0884  
WV  
SV  
6N137WV  
VDE0884; 0.4” Lead Spacing  
VDE0884; Surface Mount  
VDE0884; Surface Mount; Tape and Reel  
6N137SV  
SDV  
6N137SDV  
Marking Information  
1
2
2601  
6
V XX YY T1  
5
3
4
Definitions  
1
Fairchild logo  
2
3
Device number  
VDE mark (Note: Only appears on parts ordered with VDE option –  
See order entry table)  
4
5
6
Two digit year code, e.g., ‘03’  
Two digit work week ranging from ‘01’ to ‘53’  
Assembly package code  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
9
Tape Specifications  
12.0 0.1  
4.0 0.1  
4.90 0.20  
Ø1.55 0.05  
1.75 0.10  
4.0 0.1  
0.30 0.05  
7.5 0.1  
16.0 0.3  
10.30 0.20  
13.2 0.2  
Ø1.6 0.1  
10.30 0.20  
User Direction of Feed  
0.1 MAX  
Reflow Profile  
300  
250  
200  
150  
100  
50  
215C, 10–30 s  
225C peak  
Time above 183C, 60–150 sec  
Ramp up = 3C/sec  
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
Time (Minute)  
• Peak reflow temperature: 225C (package surface temperature)  
• Time of temperature higher than 183C for 60–150 seconds  
• One time soldering reflow is recommended  
©2005 Fairchild Semiconductor Corporation  
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8  
www.fairchildsemi.com  
10  
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USA/Canada  
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