FSAL200QSC [FAIRCHILD]
Wide Bandwidth Quad 2:1 Analog Multiplexer/Demultiplexer Switch; 宽带四路2 : 1模拟多路复用器/多路解复用器开关型号: | FSAL200QSC |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Wide Bandwidth Quad 2:1 Analog Multiplexer/Demultiplexer Switch |
文件: | 总6页 (文件大小:87K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
January 2002
Revised March 2003
FSAL200
Wide Bandwidth Quad 2:1 Analog
Multiplexer/Demultiplexer Switch
General Description
Features
■ Typical 6Ω switch connection between two ports
■ Minimal propagation delay through the switch
■ Low ICC
The Fairchild Switch FSAL200 is a rail-to-rail quad 2:1
high-speed CMOS TTL-compatible analog multiplexer/
demultiplexer switch. The low On Resistance of the switch
allows inputs to be connected to outputs without adding
propagation delay or generating additional ground bounce
noise.
■ Zero bounce in flow-through mode
■ Control inputs compatible with TTL level
■ Rail-to-rail signal handling
■ Low insertion loss
When OE is LOW, the select pin connects the A Port to the
selected B Port output. When OE is HIGH, the switch is
OPEN and a high-impedance state exists between the two
ports.
■ Route communications signals including:
10/100 Ethernet
USB1.1
100VG-AnyLAN
Token Ring 4/16 Mbps
ATM25
SONET OCI 51.8 Mbps
T1/E1
Ordering Code:
Order Number Package Number
Package Description
FSAL200QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Analog Symbol
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
S
X
L
OE
Function
Disconnect
A = B1
OE
S
Switch Enable
Select Input
Data Port
H
L
L
A, B1, B2
H
A = B2
© 2003 Fairchild Semiconductor Corporation
DS500649
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Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
)
−0.5V to +7.0V
−0.5V to VCC +0.5V
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
DC Input Voltage (VIN) (Note 2)
Supply Voltage Operating (VCC
Control Input Voltage (VIN
Switch Input Voltage (VIN
Output Voltage (VOUT
)
3.0V to 5.5V
0V to VCC
)
DC Input Diode Current (IIK
)
)
0V to VCC
@ (IIK) VIN < 0V
−50 mA
120 mA
)
0V to VCC
DC Output Current (IOUT
)
Operating Temperature (TA)
Input Rise and Fall Time (tr, tf)
−40°C to +85°C
DC VCC or Ground Current (ICC/IGND
)
±100 mA
Storage Temperature Range (TSTG
Power Dissipation (PD) @ +85°C
Ambient Temperature with
Power Applied
)
−65°C to +150°C
0.5 W
Control Input VCC = 2.3V - 3.6V
Control Input VCC = 4.5V - 5.5V
0 ns/V to 10 ns/V
0 ns/V to 5 ns/V
350°C/W
Thermal Resistance (θJA
)
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside datasheet specifi-
cations.
−40°C to +85°C
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Control input must be held HIGH or LOW, it must not float.
DC Electrical Characteristics
VCC
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
Min
2.0
Typ
Max
HIGH Level Input Voltage
4.5 - 5.5
3.0 - 3.6
4.5 - 5.5
3.0 - 3.6
0 − 5.5
4.5 - 5.5
3.0 - 3.6
5.5
V
2.0
VIL
LOW Level Input Voltage
−0.5
−0.5
0.8
0.8
100
12
V
IOZ
OFF State Leakage Current
Switch On Resistance
(Note 4)
nA
Ω
0 ≤ VIN ≤ 5.5V
RON
6
I
I
ON = 10 - 30 mA
ON = 10 - 30 mA
15
22
IIN
Control Input Leakage Current
±1
µA
V
V
V
IN = VCC or GND
IN = VCC or GND
IN = VCC or GND
3.6
±1
ICC
Quiescent Supply Current
All Channels ON or OFF
Analog Signal Range
5.5
1
µA
V
I
OUT = 0
VCC
0
VCC
2
∆RON
On Resistance Match Between
Channels (Note 4)(Note 5)
Output Current
4.5 - 5.5
3.0 - 3.6
4.5 - 5.5
3.0 - 3.6
4.5 - 5.5
3.0 - 3.6
0.4
1
I
I
A = −30 mA, VBn = 3.15
A = −10 mA, VBn 2.1
Ω
3
IO
100
80
mA
Bn, Bn, S = 0V to 5V
Rflat
On Resistance Flatness
(Note 4)(Note 6)
3
7
A, B1, B2 = 0V to 5V
A, B1, B2 = 0V to 5V
Ω
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B Ports).
Note 5: ∆RON = RON max − RON min measured at identical VCC, temperature and voltage levels.
Note 6: Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
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2
AC Electrical Characteristics
VCC
TA = −40°C to +85°C
Figure
Symbol
tON
Parameter
Units
Conditions
VBn = 3V
(V)
Min
Typ
10
28
5
Max
Number
Turn On Time
4.5 − 5.5
3.0 - 3.6
4.5 − 5.5
3.0 - 3.6
5.0
20
40
10
20
ns
ns
ns
ns
Figures
1, 2
S to Output
Turn Off Time
S to Output
Charge Injection
(Note 7)
VBn = 1.5V
VBn = 3V
tOFF
Figures
1, 2
4
VBn = 1.5V
Q
7
C
R
R
L = 0.1 nF, VGEN = 0V
pC
dB
dB
dB
dB
Figure 3
Figure 4
Figure 4
Figure 5
Figure 5
3.3
3
GEN = 0 Ω
OIRR
Off Isolation
(Note 8)
L = 100 Ω
4.5 - 5.5
3.0 - 3.6
4.5 - 5.5
3.0 - 3.6
−55
−75
−70
−75
f = 30 MHz
L = 50 Ω
f = 1 MHz
L = 100 Ω
f = 30 MHz
L = 50 Ω
f = 1 MHz
R
Xtalk
Crosstalk
R
R
BW
D
−3dB Bandwidth
4.5 - 5.5
3.0 - 3.6
4.5 - 5.5
3.0 - 3.6
137
110
2
MHz
MHz
R
L = 100 Ω
L = 50 Ω
Figure 8
Figure 8
R
∆RON/RL Distortion
%
RL = 100 Ω
(Note 7)
3
Note 7: Guaranteed by Design.
Note 8: Off Isolation = 20 log10 [VA / VBn
]
Capacitance (Note 9)
Figure
Symbol
Parameter
Typ
Max
Units
Conditions
Number
CIN
CIO-B
Control Pin Input Capacitance
B Port Off Capacitance
A Port Off Capacitance
Channel On Capacitance
2.3
12
20
15
pF
pF
pF
pF
V
V
V
V
CC = 0V
CC = 5.0V and 3.0V
CC = 5.0V and 3.0V
CC = 5.0V and 3.0V
Figure 6
Figure 7
Figure 7
CON
Note 9: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested in production.
3
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AC Loading and Waveforms
FIGURE 1. AC Waveforms
FIGURE 2. tON, tOFF Loading
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4
AC Loading and Waveforms (Continued)
FIGURE 3. Charge Injection Test
Note: RL = 50 Ω when VCC = 3.3±10% for the Off Isolation, Crosstalk and Bandwidth test.
FIGURE 4. Off Isolation
FIGURE 5. Crosstalk
FIGURE 6. Channel Off Capacitance
FIGURE 7. Channel On Capacitance
FIGURE 8. Bandwidth
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Package Number MQA16
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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6
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