FSAM15SH60A [FAIRCHILD]
SPM (Smart Power Module); SPM （智能功率模块）
| 型号： | FSAM15SH60A |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | SPM (Smart Power Module) |
| 文件： | 总16页 (文件大小：2024K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FSAM15SH60A
TM
SPM (Smart Power Module)
General Description
Features
FSAM15SH60A is an advanced smart power module
(SPM) that Fairchild has newly developed and designed to
provide very compact and high performance ac motor
drives mainly targeting high speed low-power inverter-
driven application like washing machines. It combines
optimized circuit protection and drive matched to low-loss
IGBTs. Highly effective short-circuit current detection/
protection is realized through the use of advanced current
sensing IGBT chips that allow continuous monitoring of the
IGBTs current. System reliability is further enhanced by the
built-in over-temperature monitoring and integrated under-
voltage lock-out protection. The high speed built-in HVIC
provides opto-coupler-less IGBT gate driving capability that
further reduce the overall size of the inverter system design.
In addition the incorporated HVIC facilitates the use of
single-supply drive topology enabling the FSAM15SH60A
to be driven by only one drive supply voltage without
negative bias. Inverter current sensing application can be
achieved due to the divided negative dc terminals.
•
UL Certified No. E209204
•
600V-15A 3-phase IGBT inverter bridge including control
ICs for gate driving and protection
•
Divided negative dc-link terminals for inverter current
sensing applications
•
•
•
•
•
•
•
Single-grounded power supply due to built-in HVIC
Typical switching frequency of 15kHz
Built-in thermistor for over-temperature monitoring
Inverter power rating of 0.8kW / 100~253 Vac
Isolation rating of 2500Vrms/min.
Very low leakage current due to using ceramic substrate
Adjustable current protection level by varying series
resistor value with sense-IGBTs
Applications
•
•
•
AC 100V ~ 253V 3-phase inverter drive for small power
(0.8kW) ac motor drives
Home appliances applications requiring high switching
frequency operation like washing machines drive system
Application ratings:
- Power : 0.8kW / 100~253 Vac
- Switching frequency : Typical 15kHz (PWM Control)
- 100% load current : 5.0A (Irms)
- 150% load current : 7.5A (Irms) for 1 minute
External View
Top View
Bottom View
60mm
31mm
Fig. 1.
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Integrated Power Functions
•
600V-15A IGBT inverter for 3-phase DC/AC power conversion (Please refer to Fig. 3)
Integrated Drive, Protection and System Control Functions
•
For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting
Control circuit under-voltage (UV) protection
Note) Available bootstrap circuit example is given in Figs. 14 and 15.
For inverter low-side IGBTs: Gate drive circuit, Short-Circuit (SC) protection
Control supply circuit under-voltage (UV) protection
•
•
Temperature Monitoring: System over-temperature monitoring using built-in thermistor
Note) Available temperature monitoring circuit is given in Fig. 15.
Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side control supply circuit)
Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input
•
•
Pin Configuration
Top View
(1) VCC(L)
(24) VTH
(25) RTH
(26) NU
(27) NV
(28) NW
(2) com(L)
(3) IN(UL)
(4) IN(VL)
(5) IN(WL)
(6) com(L)
(7) FO
(8) CFOD
(9) CSC
(10) RSC
(29) U
(30) V
(31) W
(11) IN(UH)
(12) VCC(UH)
Case Temperature (TC)
Detecting Point
(13) VB(U)
(14) VS(U)
(15) IN(VH)
(16) com(H)
(17) VCC(VH)
(18) VB(V)
(19) VS(V)
Ceramic Substrate
(20) IN(WH)
(32) P
(21) VCC(WH)
(22) VB(W)
(23) VS(W)
Fig. 2.
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Pin Descriptions
Pin Number
Pin Name
Pin Description
Low-side Common Bias Voltage for IC and IGBTs Driving
Low-side Common Supply Ground
Signal Input for Low-side U Phase
Signal Input for Low-side V Phase
1
V
CC(L)
2
3
4
COM
(L)
(UL)
IN
IN
(VL)
5
IN
Signal Input for Low-side W Phase
(WL)
6
7
COM
V
Low-side Common Supply Ground
Fault Output
(L)
FO
8
9
C
C
R
IN
Capacitor for Fault Output Duration Time Selection
Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input
Resistor for Short-Circuit Current Detection
Signal Input for High-side U Phase
High-side Bias Voltage for U Phase IC
High-side Bias Voltage for U Phase IGBT Driving
High-side Bias Voltage Ground for U Phase IGBT Driving
Signal Input for High-side V Phase
FOD
SC
SC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
(UH)
V
CC(UH)
V
V
IN
B(U)
S(U)
(VH)
COM
High-side Common Supply Ground
(H)
V
High-side Bias Voltage for V Phase IC
High-side Bias Voltage for V Phase IGBT Driving
High-side Bias Voltage Ground for V Phase IGBT Driving
Signal Input for High-side W Phase
High-side Bias Voltage for W Phase IC
High-side Bias Voltage for W Phase IGBT Driving
High-side Bias Voltage Ground for W Phase IGBT Driving
Thermistor Bias Voltage
Series Resistor for the Use of Thermistor (Temperature Detection)
Negative DC–Link Input for U Phase
Negative DC–Link Input for V Phase
Negative DC–Link Input for W Phase
Output for U Phase
CC(VH)
V
V
IN
B(V)
S(V)
(WH)
V
CC(WH)
V
V
B(W)
S(W)
V
R
N
N
TH
TH
U
V
N
W
U
V
W
P
Output for V Phase
Output for W Phase
Positive DC–Link Input
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Internal Equivalent Circuit and Input/Output Pins
Bottom View
(32) P
(31) W
(22) VB(W )
VB
(21) VCC(W H)
VCC
OUT
VS
COM
IN
(20) IN(W H)
(23) VS(W )
(18) VB(V)
VB
(17) VCC(VH)
VCC
OUT
VS
(16) COM(H)
(15) IN(VH)
COM
IN
(30) V
(19) VS(V)
(13) VB(U)
VB
(12) VCC(UH)
VCC
OUT
VS
COM
IN
(11) IN(UH)
(14) VS(U)
(29) U
(10) RSC
OUT(W L)
(9) CSC
C(SC)
C(FOD)
VFO
(8) CFOD
(7) VFO
(28) NW
(27) NV
(6) COM(L)
(5) IN(W L)
IN(W L)
IN(VL)
IN(UL)
OUT(VL)
OUT(UL)
(4) IN(VL)
(3) IN(UL)
(2) COM(L)
(1) VCC(L)
COM(L)
VCC
(26) NU
(25) RTH
(24) VTH
THERMISTOR
Note:
1) Inverter low-side is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and
protection functions.
2) Inverter power side is composed of four inverter dc-link input pins and three inverter output pins.
3) Inverter high-side is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.
Fig. 3.
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Absolute Maximum Ratings (T = 25°C, Unless Otherwise Specified)
J
Inverter Part
Item
Symbol
Condition
Applied between P- N , N ,N
Rating
450
500
600
15
11
30
Unit
V
V
V
A
A
A
Supply Voltage
Supply Voltage (Surge)
Collector-Emitter Voltage
Each IGBT Collector Current
Each IGBT Collector Current
Each IGBT Collector Current (Peak)
V
PN
U
V
W
W
V
Applied between P- N , N ,N
PN(Surge)
U
V
V
CES
± I
± I
T
T
T
= 25°C
= 100°C
= 25°C,
C
C
C
C
C
± I
CP
Instantaneous Value (Pulse)
= 25°C per One Chip
Collector Dissipation
P
T
50
W
C
C
Operating Junction Temperature
T
(Note 1)
-20 ~ 125
°C
J
Note:
1. It would be recommended that the average junction temperature should be limited to T ≤ 125°C (@T ≤ 100°C) in order to guarantee safe operation.
J
C
Control Part
Item
Symbol
Condition
Rating
Unit
Control Supply Voltage
High-side Control Bias Voltage
Input Signal Voltage
V
Applied between V
, V
, V
- COM ,
(H)
20
V
CC
CC(UH)
CC(VH)
CC(WH)
V
- COM
CC(L)
(L)
V
Applied between V
- V
, V
- V
, V
-
20
V
V
BS
B(U)
S(U)
B(V)
S(V)
B(W)
(H)
V
S(W)
V
Applied between IN
, IN
(WL) (L)
, IN
- COM
-0.3 ~ V +0.3
CC
IN
(UH)
(VH)
(WH)
IN
, IN
, IN
- COM
(UL)
(VL)
Fault Output Supply Voltage
Fault Output Current
Current Sensing Input Voltage
V
I
V
Applied between V - COM
-0.3 ~ V +0.3
V
mA
V
FO
FO
FO
(L)
CC
Sink Current at V Pin
5
FO
Applied between C - COM
-0.3 ~ V +0.3
SC
SC
(L)
CC
Total System
Item
Symbol
PN(PROT)
Condition
Rating
400
Unit
V
Self Protection Supply Voltage Limit
(Short-Circuit Protection Capability)
V
V
J
= V = 13.5 ~ 16.5V
CC
BS
T = 25°C, Non-repetitive, less than 6µs
Module Case Operation Temperature
Storage Temperature
Isolation Voltage
T
Note Fig.2
-20 ~ 100
-20 ~ 125
2500
°C
°C
C
T
STG
V
60Hz, Sinusoidal, AC 1 minute, Connection
Pins to Heat-sink Plate
V
ISO
rms
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Absolute Maximum Ratings
Thermal Resistance
Item
Symbol
Condition
Min. Typ. Max. Unit
Junction to Case Thermal
Resistance
R
Each IGBT under Inverter Operating Condition
-
-
-
-
-
-
2.5
°C/W
th(j-c)Q
R
Each FWDi under Inverter Operating Condition
3.6
°C/W
th(j-c)F
Contact Thermal
Resistance
R
Ceramic Substrate (per 1 Module)
Thermal Grease Applied (Note 3)
0.06 °C/W
th(c-h)
Note:
2. For the measurement point of case temperature(T ), please refer to Fig. 2.
C
3. The thickness of thermal grease should not be more than 100um.
Electrical Characteristics (T = 25°C, Unless Otherwise Specified)
J
Inverter Part
Item
Symbol
CE(SAT)
Condition
Min.
Typ.
Max. Unit
Collector - Emitter
Saturation Voltage
FWDi Forward Voltage
Switching Times
V
V
V
= V = 15V
I
= 15A, T = 25°C
-
-
2.5
V
CC
IN
BS
C
J
= 0V
= 5V
V
V
V
I
= 15A, T = 25°C
-
-
-
-
-
-
-
-
2.5
V
FM
ON
IN
C
J
t
= 300V, V = V = 15V
0.34
0.15
0.73
0.24
0.13
-
-
-
-
-
-
us
us
us
us
us
µA
PN
CC
BS
I
= 15A, T = 25°C
t
C
J
C(ON)
V
= 5V ↔ 0V, Inductive Load
IN
t
OFF
(High, Low-side)
t
C(OFF)
t
(Note 4)
rr
Collector -Emitter
Leakage Current
I
V
= V
, T = 25°C
250
CES
CE
CES
J
Note:
4.
t
and t
include the propagation delay time of the internal drive IC. t
and t
are the switching time of IGBT itself under the given gate driving condition
C(OFF)
ON
OFF
C(ON)
internally. For the detailed information, please see Fig. 4.
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
100% IC
t rr
IC
VCE
VCE
IC
V IN
t ON
VIN
tOFF
VIN(O N)
t
C(ON)
tC(OFF)
VIN(OFF)
(a) Turn-on
Fig. 4. Switching Time Definition
(b) Turn-off
IC : 5A/div.
VCE : 100V/div.
VCE : 100V/div.
IC : 5A/div.
time : 0.1us/div.
time : 0.1us/div.
(b) Turn-off
(
(a)Turn-on
Fig. 5. Experimental Results of Switching Waveforms
Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), TJ=25°C
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Electrical Characteristics (T = 25°C, Unless Otherwise Specified)
J
Control Part
Item
Symbol
QCCL
Condition
CC(L)
Min. Typ. Max. Unit
Quiescent V Supply Cur-
I
V
= 15V
(UL, VL, WL)
= 15V
(UH, VH, WH)
= 15V
(UH, VH, WH)
V
- COM
-
-
-
-
-
-
26
mA
CC
CC
(L)
rent
IN
= 5V
I
V
V
, V
, V -
CC(WH)
130 uA
420 uA
QCCH
CC
CC(UH)
CC(VH)
IN
= 5V
= 5V
COM
(H)
Quiescent V Supply Cur-
I
V
V
V
- V
, V
-V
,
S(V)
BS
QBS
BS
B(U)
S(U)
B(V)
rent
IN
- V
B(W) S(W)
Fault Output Voltage
V
V
V
V
V
= 0V, V Circuit: 4.7kΩ to 5V Pull-up
4.5
-
-
-
-
V
V
V
V
FOH
SC
SC
CC
FO
= 1V, V Circuit: 4.7kΩ to 5V Pull-up
1.1
FOL
FO
Short-Circuit Trip Level
Sensing Voltage
of IGBT Current
V
= 15V (Note 5)
0.45 0.51 0.56
0.45 0.51 0.56
SC(ref)
V
R
= 50 Ω, R = R = R
= 0 Ω and I = 22.5A
SW C
SEN
SC
SU
SV
(Note Fig. 7)
Supply Circuit Under-
Voltage Protection
UV
Detection Level
Reset Level
Detection Level
Reset Level
11.5
12
7.3
12 12.5
12.5 13
9.0 10.8
V
V
V
CCD
CCR
BSD
BSR
UV
UV
UV
8.6 10.3 12
V
Fault Output Pulse Width
ON Threshold Voltage
OFF Threshold Voltage
ON Threshold Voltage
OFF Threshold Voltage
Resistance of Thermistor
t
C
= 33nF (Note 6)
1.4
1.8 2.0
ms
V
V
V
V
FOD
FOD
V
High-Side
Applied between IN
(WH)
, IN ,
(VH)
-
3.0
-
3.0
-
-
-
0.8
-
IN(ON)
(UH)
IN
- COM
(H)
V
IN(OFF)
V
Low-Side
Applied between IN
, IN ,
(VL)
-
0.8
IN(ON)
(UL)
IN
- COM
(L)
V
(WL)
-
-
-
-
IN(OFF)
R
@ T = 25°C (Note Fig. 6) (Note 7)
@ T = 100°C (Note Fig. 6) (Note 7)
50
3.4
kΩ
kΩ
TH
TH
-
TH
Note:
5. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (R ) should be
SC
selected around 50 Ω in order to make the SC trip-level of about 22.5A at the shunt resistors (R ,R ,R ) of 0Ω . For the detailed information about the
SU SV SW
relationship between the external sensing resistor (R ) and the shunt resistors (R ,R ,R ), please see Fig. 7.
SC
SU SV SW
-6
6. The fault-out pulse width t
depends on the capacitance value of C
according to the following approximate equation : C
= 18.3 x 10 x t
[F]
FOD
FOD
FOD
FOD
7.
T
is the temperature of thermistor itself. To know case temperature (T ), please make the experiment considering your application.
T
H
C
Recommended Operating Conditions
Values
Min. Typ. Max.
Item
Symbol
Condition
Unit
Supply Voltage
V
V
Applied between P - N , N , N
-
300
15
400
16.5
V
V
PN
CC
U
V
W
Control Supply Voltage
High-side Bias Voltage
Applied between V
, V
, V -
CC(WH)
13.5
CC(UH)
CC(VH)
COM , V
- COM
(H)
CC(L)
(L)
V
Applied between V
- V
, V
- V ,
S(V)
13.5
15
-
16.5
V
BS
B(U)
S(U)
B(V)
V
- V
B(W)
S(W)
Blanking Time for Preventing
Arm-short
PWM Input Signal
t
For Each Input Signal
3
-
-
-
us
dead
PWM
f
T
≤ 100°C, T ≤ 125°C
15
kHz
V
C
J
Input ON Threshold Voltage
V
Applied between IN
, IN
(WL)
, IN -
(WH)
0 ~ 0.65
IN(ON)
(UH)
(VH)
COM , IN
, IN
, IN
- COM
(H)
(UL)
(VL)
(L)
Input OFF Threshold Voltage
V
Applied between IN
, IN
, IN
-
4 ~ 5.5
V
IN(OFF)
(UH)
(VH)
(WH)
COM , IN
, IN
, IN
- COM
(WL) (L)
(H)
(UL)
(VL)
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
R-T Curve
70
60
50
40
30
20
10
0
20
30
40
50
60
70
80
90
100
110
120
130
℃
[ ]
Temperature TTH
Fig. 6. R-T Curve of The Built-in Thermistor
100
80
60
40
20
0
(1)
(2)
0.00
0.02
0.04
0.06
0.08
0.10
RSU,RSV,RSW [Ω]
Fig. 7. RSC Variation by change of Shunt Resistors (RSU, RSV, RSW) for Short-Circuit Protection
(1) @ around 100% Rated Current Trip (IC ·=· 15A)
(2) @ around 150% Rated Current Trip (IC ·=· 22.5A)
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Mechanical Characteristics and Ratings
Limits
Typ.
10
0.98
-
Item
Condition
Unit
Min.
Max.
12
1.17
+120
-
Mounting Torque
Mounting Screw: M4
(Note 8 and 9)
Recommended 10Kg•cm
Recommended 0.98N•m
Note Fig.8
8
0.78
0
Kg•cm
N•m
um
Ceramic Flatness
Weight
-
35
g
(+)
(+)
(+)
Datum Line
Fig. 8. Flatness Measurement Position of The Ceramic Substrate
Note:
8. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction.
9. Avoid one side tightening stress. Fig.9 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to
be damaged.
2
1
Fig. 9. Mounting Screws Torque Order
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Time Charts of SPMs Protective Function
Input Signal
Internal IGBT
Gate-Emitter Voltage
P3
P2
P5
UV reset
P6
Control Supply Voltage
UV detect
P1
Output Current
P4
Fault Output Signal
P1 : Normal operation - IGBT ON and conducting current
P2 : Under-Voltage detection
P3 : IGBT gate interrupt
P4 : Fault signal generation
P5 : Under-Voltage reset
P6 : Normal operation - IGBT ON and conducting current
Fig. 10. Under-Voltage Protection (Low-side)
Input Signal
P3
P2
UV reset
P6
P5
UV detect
P1
VBS
Output Current
Fault Output Signal
P4
P1 : Normal operation - IGBT ON and conducting current
P2 : Under-Voltage detection
P3 : IGBT gate interrupt
P4 : No fault signal
P5 : Under-Voltage reset
P6 : Normal operation - IGBT ON and conducting current
Fig. 11. Under-Voltage Protection (High-side)
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
P5
Input Signal
Internal IGBT
P6
Gate-Emitter Voltage
SC Detection
P1
P4
P7
Output Current
P2
SC Reference
Voltage (0.5V)
Sensing Voltage
RC Filter Delay
P8
Fault Output Signal
P3
P1 : Normal operation - IGBT ON and conducting current
P2 : Short-Circuit current detection
P3 : IGBT gate interrupt / Fault signal generation
P4 : IGBT is slowly turned off
P5 : IGBT OFF signal
P6 : IGBT ON signal - but IGBT cannot be turned on during the fault Output activation
P7 : IGBT OFF state
P8 : Fault Output reset and normal operation start
Fig. 12. Short-Circuit Current Protection (Low-side Operation only)
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
5V-Line
SPM
RPF
RPL
=
RPH
4.7kΩ
2kΩ
4.7kΩ
100 Ω
100 Ω
100 Ω
,
,
,
IN(UH) IN(VH)
IN(WH)
IN(WL)
,
IN(UL) IN(VL)
CPU
VFO
CPF
1nF
CPL
0.47nF
CPH
1.2nF
1nF
COM
Note:
1) It would be recommended that by-pass capacitors for the gating input signals, IN
, IN , IN
, IN
, IN
and IN
should be placed on the SPM pins
(UL)
(VL)
(WL)
(UH)
(VH)
(WH)
and on the both sides of CPU and SPM for the fault output signal, V , as close as possible.
FO
2) The logic input is compatible with standard CMOS or LSTTL outputs.
3) R
C
/R
C
/R
C
coupling at each SPM input is recommended in order to prevent input/output signals’ oscillation and it should be as close as possible to
PL PL PH PH PF PF
each of SPM pins.
Fig. 13. Recommended CPU I/O Interface Circuit
These Values depend on PWM Control Algorithm
One-Leg Diagram of SPM
15V-Line
P
20Ω
DBS
Vcc VB
IN HO
COM VS
33uF
0.1uF
Inverter
Output
Vcc
IN
OUT
470uF
0.1uF
COM
N
Note:
It would be recommended that the bootstrap diode, D , has soft and fast recovery characteristics.
BS
Fig. 14. Recommended Bootstrap Operation Circuit and Parameters
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
15V line
5V line
RBS
DBS
P
(32)
(31)
(22) VB(W)
VB
VCC
(21) VCC(WH)
RPH
OUT
VS
COM
IN
RS
RS
RS
CBS
CBSC
CBSC
CBSC
(20) IN(WH)
(23) VS(W)
W
Gating WH
Gating VH
CPH
RBS
DBS
(18) VB(V)
VB
(17) VCC(VH)
VCC
RPH
(16) COM(H)
(15) IN(VH)
OUT
VS
COM
IN
CBS
V
U
(30)
(19) VS(V)
M
CPH
DBS
RBS
(13) VB(U)
VB
C
P
U
(12) VCC(UH)
VCC
CDCS
Vdc
OUT
VS
RPH
COM
IN
CBS
(11) IN(UH)
(14) VS(U)
(29)
Gating UH
CPH
RSC
RF
5V line
(10) RSC
RCSC
(9) CSC
OUT(WL)
OUT(VL)
OUT(UL)
C(SC)
C(FOD)
VFO
(8) CFOD
RPL RPL RPL RPF
CSC
RSW
NW (28)
RS
RS
CFOD
(7) VFO
Fault
(6) COM(L)
(5) IN(WL)
(4) IN(VL)
(3) IN(UL)
Gating WH
Gating VH
Gating UH
IN(WL)
IN(VL)
IN(UL)
RS
RS
RSV
NV (27)
(2) COM(L)
(1) VCC(L)
COM(L)
VCC
CBPF
CPL CPL CPL CPF
RSU
NU (26)
5V line
VTH (24)
CSPC15
CSP15
THERMISTOR
RTH (25)
RTH
CSPC05
CSP05
Temp. Monitoring
RFW
W-Phase Current
V-Phase Current
RFV
RFU
U-Phase Current
CFW
CFU
CFV
Note:
1) R
C
/R
C
/R
C
coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each
PL PL PH PH
PF PF
SPM input pin.
2) By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is
possible.
3) V output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please
FO
refer to Fig. 15.
4) C
of around 7 times larger than bootstrap capacitor C is recommended.
BS
SP15
FO
5) V output pulse width should be determined by connecting an external capacitor(C
) between C
(pin8) and COM (pin2). (Example : if C
= 33 nF, then
FOD
FOD
FOD
(L)
t
= 1.8 ms (typ.)) Please refer to the note 6 for calculation method.
FO
6) Each input signal line should be pulled up to the 5V power supply with approximately 4.7kΩ (at high side input) or 2kΩ (at low side input) resistance (other RC
coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board).
Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals.
7) To prevent errors of the protection function, the wiring around R , R and C should be as short as possible.
SC
F
SC
8) In the short-circuit protection circuit, please select the R C time constant in the range 3~4 µs.
F
SC
9) To enhance the noise immunity, C pin should be connected to the external circuit through a series resistor, R
, which is approximately 390Ω. R
should
SC
CSC
SCS
be connected to C pin as close as possible.
SC
10)Each capacitor should be mounted as close to the pins of the SPM as possible.
11)To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-
inductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended.
12)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and
the relays. It is recommended that the distance be 5cm at least.
Fig. 15. Typical Application Circuit
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
Detailed Package Outline Drawings
SPM32-AA
28x2.00 0.30=(56.0)
(2.00)
MAX1.05
0.60 0.10
0.40
MAX1.00
0.60 0.10
0.40
2.00 0.30
28.0 0.30
#23
#1
#32
19.86 0.30
#24
7.20 0.5
(46.60)
53.0 0.30
60.0 0.50
12.30 0.5
3x7.62 0.30=(22.86)
3x4.0 0.30=(12.0
2.00 0.30
)
11.0 0.30
10.14
(
)
0.80
1.30 0.10
MAX3.20
0.80
0.40
1.30 0.10
MAX2.50
0.60 0.10
MAX1.60
Dimensions in Millimeters
©2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
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MSXPro™
OCX™
OCXPro™
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OPTOPLANAR™
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POP™
FACT Quiet Series™
FAST
FASTr™
FRFET™
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DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
QS™
QT Optoelectronics™ TINYOPTO™
Quiet Series™
RapidConfigure™
RapidConnect™
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UHC™
UltraFET
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Across the board. Around the world.™
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I5
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