FDS8958A [FAIRCHILD]
Dual N & P-Channel Enhancement Mode Field Effect Transistor; 双N和P沟道增强型场效应晶体管![FDS8958A](http://pdffile.icpdf.com/pdf1/p00062/img/icpdf/FDS8958A_327487_icpdf.jpg)
型号: | FDS8958A |
厂家: | ![]() |
描述: | Dual N & P-Channel Enhancement Mode Field Effect Transistor |
文件: | 总11页 (文件大小:285K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
January 2001
FDS8958A
Dual N & P-Channel PowerTrench MOSFET
General Description
Features
These dual N- and P-Channel enhancement mode
power field effect transistors are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state ressitance and yet maintain superior switching
performance.
•
Q1:
N-Channel
7.0A, 30V
RDS(on) = 0.028Ω @ VGS = 10V
DS(on) = 0.040Ω @ VGS = 4.5V
R
•
Q2:
P-Channel
-5A, -30V
R
DS(on) = 0.052Ω @ VGS = -10V
DS(on) = 0.080Ω @ VGS = -4.5V
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
R
•
•
Fast switching speed
High power and handling capability in a widely
used surface mount package
Q2
D2
5
6
7
8
4
3
2
1
D2
D1
D1
Q1
G2
SO-8
S2
G1
S1
Pin 1
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
Parameter
Q1
Q2
Units
VDSS
VGSS
ID
Drain-Source Voltage
30
±20
7
30
±20
-5
V
V
A
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
(Note 1a)
20
-20
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
2
W
(Note 1a)
(Note 1b)
1.6
1
(Note 1c)
0.9
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
RθJA
°C/W
°C/W
RθJC
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS8958A
FDS8958A
13”
12mm
2500 units
FDS8958A Rev D(W)
2001 Fairchild Semiconductor International
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown
Q1
Q2
30
-30
V
VGS = 0 V, ID = 250 µA
VGS = 0 V, ID = -250 µA
Voltage
Breakdown Voltage
Temperature Coefficient
Q1
Q2
25
-22
∆BVDSS
∆TJ
IDSS
ID = 250 µA, Referenced to 25°C
ID = -250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
mV/°C
µA
Zero Gate Voltage Drain
Current
Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V
Q1
Q2
All
1
-1
100
V
DS = -24 V, VGS = 0 V
IGSSF
IGSSR
nA
nA
Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V
All
-100
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
Q1
Q2
1
-1
1.6
-1.7
3
-3
V
V
DS = VGS, ID = 250 µA
VDS = VGS, ID = -250 µA
Gate Threshold Voltage
Temperature Coefficient
Q1
Q2
-4.3
4
∆VGS(th)
∆TJ
RDS(on)
ID = 250 µA, Referenced to 25°C
ID = -250 µA, Referenced to 25°C
VGS = 10 V, ID = 7 A
VGS = 10 V, ID = 7 A, TJ = 125°C
VGS = 4.5 V, ID = 6 A
mV/°C
mΩ
Static Drain-Source
On-Resistance
Q1
21
32
27
28
42
40
VGS = -10 V, ID = -5 A
VGS = -10 V, ID = -5 A, TJ = 125°C
VGS = -4.5 V, ID = -4 A
VGS = 10 V, VDS = 5 V
VGS = -10 V, VDS = -5 V
VDS = 5 V, ID = 7 A
Q2
41
58
58
52
78
80
ID(on)
gFS
On-State Drain Current
Q1
Q2
Q1
Q2
20
-20
A
S
Forward Transconductance
19
11
VDS = -5 V, ID =-5 A
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Q1
Q1
Q2
Q1
Q2
Q1
Q2
789
690
173
306
66
pF
pF
pF
VDS = 10 V, VGS = 0 V, f = 1.0 MHz
Output Capacitance
Q2
VDS = -10 V, VGS = 0 V, f = 1.0 MHz
Reverse Transfer Capacitance
77
FDS8958A Rev D(W)
Electrical Characteristics (continued)
TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions
Type Min Typ Max Units
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q1
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
2.2
6.7
7.5
9.7
11.8
19.8
3.7
12.3
16
4.4
13.4
15
19.4
21.3
35.6
7.4
22.2
26
23
ns
ns
VDD = 10 V, ID = 1 A,
VGS = 10V, RGEN = 6 Ω
Q2
ns
VDD = -10 V, ID = -1 A,
VGS = -10V, RGEN = 6 Ω
ns
Qg
Qgs
Qgd
Q1
nC
nC
nC
VDS = 15 V, ID = 7 A, VGS = 10 V
14
2.5
2.4
2.6
4.8
Q2
VDS = -15 V, ID = -5 A,VGS = -10 V
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Q1
Q2
Q1
Q2
1.3
-1.3
1.2
A
V
VSD
Drain-Source Diode Forward VGS = 0 V, IS = 1.3 A
(Note 2)
(Note 2)
0.74
-0.76
Voltage
VGS = 0 V, IS = -1.3 A
-1.2
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°/W when
mounted on a
0.5 in2 pad of 2 oz
copper
b) 125°/W when
c) 135°/W when mounted on a
minimum pad.
mounted on a .02 in2
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS8958A Rev D(W)
Typical Characteristics: Q1
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
30
VGS = 10V
4.0V
VGS = 3.0V
7.0V
3.5V
5.0V
20
4.5V
3.5V
4.0V
3.0V
4.5V
10
5.0V
6.0V
7.0V
10V
2.5V
0
0
6
12
18
24
30
0
1
2
3
4
5
150
5
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
1.9
ID = 7A
ID = 7A
VGS = 10V
1.6
1.3
1.0
0.7
0.4
TA = 125oC
TA = 25oC
-50
-25
0
25
50
75
100
125
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
V
GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
30
VGS = 0V
VDS = 10V
25oC
TA = -55oC
25
20
15
10
5
10
TA = 125oC
125oC
1
0.1
25oC
-55oC
0.8
0.01
0.001
0
0
0.2
0.4
0.6
1
1.2
1.4
1
2
3
4
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS8958A Rev D(W)
Typical Characteristics: Q1
10
1200
900
600
300
0
f = 1MHz
GS = 0 V
VDS = 5V
ID =7A
10V
V
8
6
4
2
0
15V
CISS
COSS
CRSS
0
4
8
12
16
0.0
5.0
10.0
15.0
20.0
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
10
50
40
30
20
10
0
RDS(ON) LIMIT
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
µ
100
1ms
10ms
s
100ms
1s
1
10s
DC
VGS = 10V
SINGLE PULSE
0.1
0.01
RθJA = 135oC/W
TA = 25oC
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS8958A Rev D(W)
Typical Characteristics Q2
30
2.5
2
VGS = -10.0V
VGS = -3.5V
25
-7.0V
-5.0V
-6.0V
20
15
10
5
-4.0V
-4.0V
-4.5V
1.5
1
-5.0V
-6.0V
-3.5V
-7.0V
-10.0V
-3.0V
4
0
0.5
0
1
2
3
5
150
5.5
0
6
12
18
24
30
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 11. On-Region Characteristics.
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
0.2
ID = -5A
ID = -5A
V
GS = -10V
1.4
1.2
1.0
0.8
0.6
0.15
0.1
0.05
0
TA = 125oC
TA = 25oC
2
4
6
8
10
-50
-25
0
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation with
Temperature.
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
30
25
20
15
10
5
100
VGS = 0V
TA = -55oC
VDS = -10V
10
25oC
TA = 125oC
1
25oC
125oC
-55oC
0.1
0.01
0
0.001
1.5
2.5
3.5
4.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS8958A Rev D(W)
Typical Characteristics Q2
10
1000
800
600
400
200
0
f = 1 MHz
GS = 0 V
ID = -5.3A
VDS = -5V
8
V
-10V
CISS
-15V
6
4
2
0
COSS
CRSS
10
0
5
10
15
0
5
15
20
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 17. Gate Charge Characteristics.
Figure 18. Capacitance Characteristics.
100
10
50
40
30
20
10
0
RDS(ON) LIMIT
µ
100
s
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
1ms
10ms
100ms
1s
1
10s
DC
VGS = -10V
SINGLE PULSE
0.1
0.01
RθJA = 135oC/W
TA = 25oC
0.1
1
10
100
0.001
0.01
0.1
1
10
100
-VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + Rθ
RθJA = 135oC/W
JA
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
SINGLE PULSE
0.01
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS8958A Rev D(W)
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging
Configuration: Figure 1.0
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
ELECTROSTATIC
SENSITIVE DEVICES
DO NO
T
S
M
HI
P
OR
S
TO
RE
N
E
AR
S
T
RO NG
E
L
E
CTROS
T
ATIC
made from
a dissipative (carbon filled) polycarbonate
E
L
E
CTRO
AGN
E
TI
C,
M
AG NE
T
IC
O
R R ADIO ACTIVE FI ELD S
TNR DATE
PT NUMB E
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
R
PEEL STRENGTH MIN ______________gms
MAX _____________gms
Antistatic Cover Tape
ESD Label
These full reels are individually barcode labeled and
placed inside
a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside
comes in different sizes depending on the number of parts
shipped.
a barcode labeled shipping box which
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
F
NDS
9959
852
Customized
Label
F
F
F
F
Pin 1
SOIC (8lds) Packaging Information
Standard
L86Z
F011
D84Z
Packaging Option
(no flow code)
SOIC-8 Unit Orientation
Packaging type
TNR
2,500
Rail/Tube
TNR
4,000
TNR
500
Qty per Reel/Tube/Bag
Reel Size
95
-
13" Dia
13" Dia
7" Dia
Box Dimension (mm)
Max qty per Box
343x64x343 530x130x83 343x64x343 184x187x47
5,000
0.0774
0.6060
30,000
0.0774
-
8,000
0.0774
0.9696
1,000
0.0774
0.1182
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
F63TNLabel
ESD Label
F63TN Label
LOT: CBVK741B019
FSID: FDS9953A
QTY: 2500
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
(F63TNR)3
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
Leader Tape
640mm minimum or
80 empty pockets
1680mm minimum or
210 empty pockets
July 1999, Rev. B
©2000 Fairchild Semiconductor International
SOIC-8 Tape and Reel Data, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
E2
F
W
K0
Wc
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
Pkg type
0.450
+/-
0.150
(8lds)
SOIC
(12mm)
6.50
+/-0.10
5.30
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
2.1
+/-0.10
9.2
+/-0.3
0.06
+/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
0.5mm
maximum
B0
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
Sketch B (Top View)
Component Rotation
SOIC(8lds) Reel Configuration: Figure 4.0
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7"Diameter Option
B Min
Dim C
See detail AA
Dim D
min
W3
13" Diameter Option
W2 max Measured at Hub
DETAIL AA
Dim W2
Dimensions are in inches and millimeters
Reel
Option
Tape Size
12mm
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W3 (LSL-USL)
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
7" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
13" Dia
July 1999, Rev. B
SOIC-8 Package Dimensions
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
©2000 Fairchild Semiconductor International
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
PowerTrench
QFET™
QS™
SyncFET™
TinyLogic™
UHC™
ACEx™
FASTr™
GlobalOptoisolator™
GTO™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
QT Optoelectronics™
VCX™
HiSeC™
Quiet Series™
SILENT SWITCHER
SMART START™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ISOPLANAR™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. G
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Power Field-Effect Transistor, 7A I(D), 30V, 0.028ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, SOIC-8
FAIRCHILD
![](http://pdffile.icpdf.com/pdf2/p00233/img/page/FDS8958AD84Z_1368491_files/FDS8958AD84Z_1368491_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00233/img/page/FDS8958AD84Z_1368491_files/FDS8958AD84Z_1368491_2.jpg)
FDS8958AL86Z
Power Field-Effect Transistor, 7A I(D), 30V, 0.028ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8
FAIRCHILD
![](http://pdffile.icpdf.com/pdf2/p00233/img/page/FDS8958AD84Z_1368491_files/FDS8958AD84Z_1368491_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00233/img/page/FDS8958AD84Z_1368491_files/FDS8958AD84Z_1368491_2.jpg)
FDS8958AS62Z
Power Field-Effect Transistor, 7A I(D), 30V, 0.028ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8
FAIRCHILD
![](http://pdffile.icpdf.com/pdf2/p00233/img/page/FDS8958A-F08_1368487_files/FDS8958A-F08_1368487_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00233/img/page/FDS8958A-F08_1368487_files/FDS8958A-F08_1368487_2.jpg)
FDS8958A_F085
Power Field-Effect Transistor, 7A I(D), 30V, 0.028ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, SOP-8
FAIRCHILD
![](http://pdffile.icpdf.com/pdf2/p00239/img/page/FDS8958A-NF0_1443956_files/FDS8958A-NF0_1443956_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00239/img/page/FDS8958A-NF0_1443956_files/FDS8958A-NF0_1443956_2.jpg)
FDS8958A_NF073
Power Field-Effect Transistor, 7A I(D), 30V, 0.028ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, SO-8, 8 PIN
FAIRCHILD
![](http://pdffile.icpdf.com/pdf1/p00062/img/page/FDS8958_327486_files/FDS8958_327486_1.jpg)
![](http://pdffile.icpdf.com/pdf1/p00062/img/page/FDS8958_327486_files/FDS8958_327486_2.jpg)
FDS8958A_NL
Power Field-Effect Transistor, 7A I(D), 30V, 0.028ohm, 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, SO-8, 8 PIN
FAIRCHILD
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