FDS4072N7_04 [FAIRCHILD]
40V N-Channel PowerTrench MOSFET; 40V N沟道PowerTrench MOSFET的![FDS4072N7_04](http://pdffile.icpdf.com/pdf1/p00112/img/icpdf/FDS4072N7_608956_icpdf.jpg)
型号: | FDS4072N7_04 |
厂家: | ![]() |
描述: | 40V N-Channel PowerTrench MOSFET |
文件: | 总7页 (文件大小:179K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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February 2004
FDS4072N7
40V N-Channel PowerTrench MOSFET
General Description
Features
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
“low side” synchronous rectifier operation, providing an
extremely low RDS(ON) in a small package.
• 12.4 A, 40 V RDS(ON) = 11 mΩ @ VGS = 4.5 V
RDS(ON) 9 mΩ @ VGS = 10 V
=
• High performance trench technology for extremely
low RDS(ON)
Applications
• High power and current handling capability
• Fast switching
• Synchronous rectifier
• DC/DC converter
• FLMP SO-8 package: Enhanced thermal
performance in industry-standard package size
Bottom-side
Drain Contact
5
6
7
8
4
3
2
1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
40
± 12
V
V
A
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
12.4
60
3.0
1.5
PD
Power Dissipation
(Note 1a)
(Note 1b)
W
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
40
0.5
RθJA
RθJC
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS4072N7
FDS4072N7
13’’
12mm
2500 units
FDS4072N7 Rev C2 (W)
2004 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain-Source Avalanche Ratings (Note 2)
EAS
IAS
Drain-Source Avalanche Energy
Drain-Source Avalanche Current
Single Pulse, VDD = 20V, ID=12.4 A
200
12.4
mJ
A
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
40
V
VGS = 0 V,
ID = 250 µA
∆BVDSS
∆TJ
Breakdown Voltage Temperature
38
ID = 250 µA, Referenced to 25°C
mV/°C
Coefficient
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VDS = 32 V,
VGS = 12 V,
VGS = –12 V ,
VGS = 0 V
VDS = 0 V
VDS = 0 V
1
µA
nA
nA
100
–100
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
1
1.3
3
V
VDS = VGS
,
ID = 250 µA
∆VGS(th)
Gate Threshold Voltage
–4.5
ID = 250 µA, Referenced to 25°C
mV/°C
Temperature Coefficient
∆TJ
RDS(on)
Static Drain–Source
On–Resistance
VGS = 4.5 V, ID = 12.4 A
9
8
11
9
mΩ
VGS = 10 V, ID = 13.7 A
14
18
VGS = 4.5 V, ID = 12.4 A,TJ = 125°C
gFS
Forward Transconductance
VDS = 10 V,
ID = 12.4 A
84
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
4299
351
149
pF
pF
pF
V
DS = 20 V,
V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
f = 1.0 MHz
Switching Characteristics (Note 2)
VDD = 20 V,
ID = 1 A,
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
20
12
52
18
33
7.8
8.1
36
22
83
32
46
ns
ns
ns
VGS = 4.5 V,
RGEN = 6 Ω
ns
VDS = 20 V,
VGS = 4.5 V
ID = 12.4 A,
Qg
Qgs
Qgd
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
2.5
1.2
A
V
Drain–Source Diode Forward
VGS = 0 V, IS = 2.5 A
Voltage
VSD
(Note 2)
0.7
trr
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
IF = 12.4 A,
30
90
nS
nC
diF/dt = 100 A/µs
Qrr
FDS4072N7 Rev C2 (W)
Electrical Characteristics
TA = 25°C unless otherwise noted
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
40°C/W when mounted
on a 1in2 pad of 2 oz
copper
b)
85°C/W when mounted on
a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4072N7 Rev C2 (W)
Typical Characteristics
80
1.6
1.4
1.2
1
VGS =10V
4.5V
3.0V
2.5V
60
40
20
0
VGS = 2.5V
3.0V
3.5V
40
4.5V
10V
0.8
0
20
60
80
0
1
2
3
4
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.025
1.9
ID = 12.4A
VGS = 4.5V
ID = 6.2A
1.6
1.3
1
0.02
0.015
0.01
TA = 125oC
TA = 25oC
0.7
0.4
0.005
1
4
7
10
-50
-25
0
25
50
75
100
125
150
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
80
60
40
20
0
100
VGS = 0V
VDS = 5V
10
TA = 125oC
1
0.1
0.01
25oC
-55oC
0.8
TA =125oC
0.001
0.0001
25oC
-55oC
1
1.5
2
2.5
3
0
0.2
0.4
0.6
1
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4072N7 Rev C2 (W)
Typical Characteristics
6000
5000
4000
3000
2000
1000
0
10
f = 1MHz
VGS = 0 V
ID = 12.4A
VDS = 10V
20V
8
6
4
2
0
CISS
30V
COSS
CRSS
0
10
V
20
30
40
0
20
40
Qg, GATE CHARGE (nC)
60
80
DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
1000
50
SINGLE PULSE
R
θJA = 85°C/W
100
10
40
30
20
10
0
TA = 25°C
RDS(ON) LIMIT
100µs
1ms
10ms
100ms
1s
10s
DC
1
VGS = 4.5V
SINGLE PULSE
R
θJA = 85oC/W
TA = 25oC
0.1
0.01
0.01
0.1
1
10
100
0.01
0.1
1
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θJA(t) = r(t) * RθJA
θJA = 85 °C/W
0.2
0.1
0.01
0.1
P(pk)
0.05
0.02
0.01
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDS4072N7 Rev C2 (W)
Dimensional Outline and Pad Layout
FDS4072N7 Rev C2 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
POP™
Stealth™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
FACT Quiet Series™
FAST
FASTr™
FPS™
FRFET™
ActiveArray™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
Power247™
PowerSaver™
PowerTrench
QFET
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
QS™
GlobalOptoisolator™
GTO™
QT Optoelectronics™ TinyLogic
Quiet Series™
RapidConfigure™
RapidConnect™
TINYOPTO™
TruTranslation™
UHC™
HiSeC™
I2C™
ImpliedDisconnect™
SILENT SWITCHER UltraFET
OPTOLOGIC
OPTOPLANAR™
PACMAN™
Across the board. Around the world.™
The Power Franchise™
ProgrammableActive Droop™
SMART START™
SPM™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I8
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